ath9k: Initialize and configure tx status for EDMA

[deliverable/linux.git] / drivers / net / wireless / ath / ath9k / hw.h

diff --git a/drivers/net/wireless/ath/ath9k/hw.h b/drivers/net/wireless/ath/ath9k/hw.h
index 25713beb8e710161df8927708bc6dae263575397..9d3796a68920086c905b021814fe5927f37ac231 100644 (file)
--- a/drivers/net/wireless/ath/ath9k/hw.h
+++ b/drivers/net/wireless/ath/ath9k/hw.h
@@ -28,7 +28,6 @@
 #include "reg.h"
 #include "phy.h"
 #include "btcoex.h"
-#include "ar9003_mac.h"
 
 #include "../regd.h"
 #include "../debug.h"
@@ -179,6 +178,7 @@ enum ath9k_hw_caps {
        ATH9K_HW_CAP_AUTOSLEEP                  = BIT(15),
        ATH9K_HW_CAP_4KB_SPLITTRANS             = BIT(16),
        ATH9K_HW_CAP_EDMA                       = BIT(17),
+       ATH9K_HW_CAP_RAC_SUPPORTED              = BIT(18),
 };
 
 enum ath9k_capability_type {
@@ -209,6 +209,7 @@ struct ath9k_hw_capabilities {
        u8 rx_lp_qdepth;
        u8 rx_status_len;
        u8 tx_desc_len;
+       u8 txs_len;
 };
 
 struct ath9k_ops_config {
@@ -555,6 +556,33 @@ struct ath_hw_ops {
                          u8 rxchainmask,
                          bool longcal);
        bool (*get_isr)(struct ath_hw *ah, enum ath9k_int *masked);
+       void (*fill_txdesc)(struct ath_hw *ah, void *ds, u32 seglen,
+                           bool is_firstseg, bool is_is_lastseg,
+                           const void *ds0, dma_addr_t buf_addr,
+                           unsigned int qcu);
+       int (*proc_txdesc)(struct ath_hw *ah, void *ds,
+                          struct ath_tx_status *ts);
+       void (*set11n_txdesc)(struct ath_hw *ah, void *ds,
+                             u32 pktLen, enum ath9k_pkt_type type,
+                             u32 txPower, u32 keyIx,
+                             enum ath9k_key_type keyType,
+                             u32 flags);
+       void (*set11n_ratescenario)(struct ath_hw *ah, void *ds,
+                               void *lastds,
+                               u32 durUpdateEn, u32 rtsctsRate,
+                               u32 rtsctsDuration,
+                               struct ath9k_11n_rate_series series[],
+                               u32 nseries, u32 flags);
+       void (*set11n_aggr_first)(struct ath_hw *ah, void *ds,
+                                 u32 aggrLen);
+       void (*set11n_aggr_middle)(struct ath_hw *ah, void *ds,
+                                  u32 numDelims);
+       void (*set11n_aggr_last)(struct ath_hw *ah, void *ds);
+       void (*clr11n_aggr)(struct ath_hw *ah, void *ds);
+       void (*set11n_burstduration)(struct ath_hw *ah, void *ds,
+                                    u32 burstDuration);
+       void (*set11n_virtualmorefrag)(struct ath_hw *ah, void *ds,
+                                      u32 vmf);
 };
 
 struct ath_hw {
@@ -733,6 +761,13 @@ struct ath_hw {
        u32 intr_gen_timer_trigger;
        u32 intr_gen_timer_thresh;
        struct ath_gen_timer_table hw_gen_timers;
+
+       struct ar9003_txs *ts_ring;
+       void *ts_start;
+       u32 ts_paddr_start;
+       u32 ts_paddr_end;
+       u16 ts_tail;
+       u8 ts_size;
 };
 
 static inline struct ath_common *ath9k_hw_common(struct ath_hw *ah)
@@ -843,7 +878,14 @@ void ath9k_hw_htc_resetinit(struct ath_hw *ah);
 void ath9k_hw_get_delta_slope_vals(struct ath_hw *ah, u32 coef_scaled,
                                   u32 *coef_mantissa, u32 *coef_exponent);
 
+/*
+ * Code Specific to AR5008, AR9001 or AR9002,
+ * we stuff these here to avoid callbacks for AR9003.
+ */
 void ar9002_hw_cck_chan14_spread(struct ath_hw *ah);
+int ar9002_hw_rf_claim(struct ath_hw *ah);
+void ar9002_hw_enable_async_fifo(struct ath_hw *ah);
+void ar9002_hw_enable_wep_aggregation(struct ath_hw *ah);
 
 /*
  * Code specifric to AR9003, we stuff these here to avoid callbacks