b43: Add PIO support for PCMCIA devices
[deliverable/linux.git] / drivers / net / wireless / b43 / dma.c
index 63217b1e312d76b56da4b571c84b20aaf8d93cd8..f1b983cb9c1fb2891507bb2537c49a115ecf7ef4 100644 (file)
@@ -37,6 +37,9 @@
 #include <linux/pci.h>
 #include <linux/delay.h>
 #include <linux/skbuff.h>
+#include <linux/etherdevice.h>
+#include <asm/div64.h>
+
 
 /* 32bit DMA ops. */
 static
@@ -289,55 +292,7 @@ static inline int request_slot(struct b43_dmaring *ring)
        return slot;
 }
 
-/* Mac80211-queue to b43-ring mapping */
-static struct b43_dmaring *priority_to_txring(struct b43_wldev *dev,
-                                             int queue_priority)
-{
-       struct b43_dmaring *ring;
-
-/*FIXME: For now we always run on TX-ring-1 */
-       return dev->dma.tx_ring1;
-
-       /* 0 = highest priority */
-       switch (queue_priority) {
-       default:
-               B43_WARN_ON(1);
-               /* fallthrough */
-       case 0:
-               ring = dev->dma.tx_ring3;
-               break;
-       case 1:
-               ring = dev->dma.tx_ring2;
-               break;
-       case 2:
-               ring = dev->dma.tx_ring1;
-               break;
-       case 3:
-               ring = dev->dma.tx_ring0;
-               break;
-       case 4:
-               ring = dev->dma.tx_ring4;
-               break;
-       case 5:
-               ring = dev->dma.tx_ring5;
-               break;
-       }
-
-       return ring;
-}
-
-/* Bcm43xx-ring to mac80211-queue mapping */
-static inline int txring_to_priority(struct b43_dmaring *ring)
-{
-       static const u8 idx_to_prio[] = { 3, 2, 1, 0, 4, 5, };
-
-/*FIXME: have only one queue, for now */
-       return 0;
-
-       return idx_to_prio[ring->index];
-}
-
-u16 b43_dmacontroller_base(int dma64bit, int controller_idx)
+static u16 b43_dmacontroller_base(enum b43_dmatype type, int controller_idx)
 {
        static const u16 map64[] = {
                B43_MMIO_DMA64_BASE0,
@@ -356,7 +311,7 @@ u16 b43_dmacontroller_base(int dma64bit, int controller_idx)
                B43_MMIO_DMA32_BASE5,
        };
 
-       if (dma64bit) {
+       if (type == B43_DMA_64BIT) {
                B43_WARN_ON(!(controller_idx >= 0 &&
                              controller_idx < ARRAY_SIZE(map64)));
                return map64[controller_idx];
@@ -437,7 +392,7 @@ static int alloc_ringmemory(struct b43_dmaring *ring)
         * 02, which uses 64-bit DMA, needs the ring buffer in very low memory,
         * which accounts for the GFP_DMA flag below.
         */
-       if (ring->dma64)
+       if (ring->type == B43_DMA_64BIT)
                flags |= GFP_DMA;
        ring->descbase = dma_alloc_coherent(dev, B43_DMA_RINGMEMSIZE,
                                            &(ring->dmabase), flags);
@@ -459,7 +414,8 @@ static void free_ringmemory(struct b43_dmaring *ring)
 }
 
 /* Reset the RX DMA channel */
-int b43_dmacontroller_rx_reset(struct b43_wldev *dev, u16 mmio_base, int dma64)
+static int b43_dmacontroller_rx_reset(struct b43_wldev *dev, u16 mmio_base,
+                                     enum b43_dmatype type)
 {
        int i;
        u32 value;
@@ -467,12 +423,13 @@ int b43_dmacontroller_rx_reset(struct b43_wldev *dev, u16 mmio_base, int dma64)
 
        might_sleep();
 
-       offset = dma64 ? B43_DMA64_RXCTL : B43_DMA32_RXCTL;
+       offset = (type == B43_DMA_64BIT) ? B43_DMA64_RXCTL : B43_DMA32_RXCTL;
        b43_write32(dev, mmio_base + offset, 0);
        for (i = 0; i < 10; i++) {
-               offset = dma64 ? B43_DMA64_RXSTATUS : B43_DMA32_RXSTATUS;
+               offset = (type == B43_DMA_64BIT) ? B43_DMA64_RXSTATUS :
+                                                  B43_DMA32_RXSTATUS;
                value = b43_read32(dev, mmio_base + offset);
-               if (dma64) {
+               if (type == B43_DMA_64BIT) {
                        value &= B43_DMA64_RXSTAT;
                        if (value == B43_DMA64_RXSTAT_DISABLED) {
                                i = -1;
@@ -496,7 +453,8 @@ int b43_dmacontroller_rx_reset(struct b43_wldev *dev, u16 mmio_base, int dma64)
 }
 
 /* Reset the TX DMA channel */
-int b43_dmacontroller_tx_reset(struct b43_wldev *dev, u16 mmio_base, int dma64)
+static int b43_dmacontroller_tx_reset(struct b43_wldev *dev, u16 mmio_base,
+                                     enum b43_dmatype type)
 {
        int i;
        u32 value;
@@ -505,9 +463,10 @@ int b43_dmacontroller_tx_reset(struct b43_wldev *dev, u16 mmio_base, int dma64)
        might_sleep();
 
        for (i = 0; i < 10; i++) {
-               offset = dma64 ? B43_DMA64_TXSTATUS : B43_DMA32_TXSTATUS;
+               offset = (type == B43_DMA_64BIT) ? B43_DMA64_TXSTATUS :
+                                                  B43_DMA32_TXSTATUS;
                value = b43_read32(dev, mmio_base + offset);
-               if (dma64) {
+               if (type == B43_DMA_64BIT) {
                        value &= B43_DMA64_TXSTAT;
                        if (value == B43_DMA64_TXSTAT_DISABLED ||
                            value == B43_DMA64_TXSTAT_IDLEWAIT ||
@@ -522,12 +481,13 @@ int b43_dmacontroller_tx_reset(struct b43_wldev *dev, u16 mmio_base, int dma64)
                }
                msleep(1);
        }
-       offset = dma64 ? B43_DMA64_TXCTL : B43_DMA32_TXCTL;
+       offset = (type == B43_DMA_64BIT) ? B43_DMA64_TXCTL : B43_DMA32_TXCTL;
        b43_write32(dev, mmio_base + offset, 0);
        for (i = 0; i < 10; i++) {
-               offset = dma64 ? B43_DMA64_TXSTATUS : B43_DMA32_TXSTATUS;
+               offset = (type == B43_DMA_64BIT) ? B43_DMA64_TXSTATUS :
+                                                  B43_DMA32_TXSTATUS;
                value = b43_read32(dev, mmio_base + offset);
-               if (dma64) {
+               if (type == B43_DMA_64BIT) {
                        value &= B43_DMA64_TXSTAT;
                        if (value == B43_DMA64_TXSTAT_DISABLED) {
                                i = -1;
@@ -552,12 +512,44 @@ int b43_dmacontroller_tx_reset(struct b43_wldev *dev, u16 mmio_base, int dma64)
        return 0;
 }
 
+/* Check if a DMA mapping address is invalid. */
+static bool b43_dma_mapping_error(struct b43_dmaring *ring,
+                                 dma_addr_t addr,
+                                 size_t buffersize, bool dma_to_device)
+{
+       if (unlikely(dma_mapping_error(addr)))
+               return 1;
+
+       switch (ring->type) {
+       case B43_DMA_30BIT:
+               if ((u64)addr + buffersize > (1ULL << 30))
+                       goto address_error;
+               break;
+       case B43_DMA_32BIT:
+               if ((u64)addr + buffersize > (1ULL << 32))
+                       goto address_error;
+               break;
+       case B43_DMA_64BIT:
+               /* Currently we can't have addresses beyond
+                * 64bit in the kernel. */
+               break;
+       }
+
+       /* The address is OK. */
+       return 0;
+
+address_error:
+       /* We can't support this address. Unmap it again. */
+       unmap_descbuffer(ring, addr, buffersize, dma_to_device);
+
+       return 1;
+}
+
 static int setup_rx_descbuffer(struct b43_dmaring *ring,
                               struct b43_dmadesc_generic *desc,
                               struct b43_dmadesc_meta *meta, gfp_t gfp_flags)
 {
        struct b43_rxhdr_fw4 *rxhdr;
-       struct b43_hwtxstatus *txstat;
        dma_addr_t dmaaddr;
        struct sk_buff *skb;
 
@@ -567,7 +559,7 @@ static int setup_rx_descbuffer(struct b43_dmaring *ring,
        if (unlikely(!skb))
                return -ENOMEM;
        dmaaddr = map_descbuffer(ring, skb->data, ring->rx_buffersize, 0);
-       if (dma_mapping_error(dmaaddr)) {
+       if (b43_dma_mapping_error(ring, dmaaddr, ring->rx_buffersize, 0)) {
                /* ugh. try to realloc in zone_dma */
                gfp_flags |= GFP_DMA;
 
@@ -580,7 +572,8 @@ static int setup_rx_descbuffer(struct b43_dmaring *ring,
                                         ring->rx_buffersize, 0);
        }
 
-       if (dma_mapping_error(dmaaddr)) {
+       if (b43_dma_mapping_error(ring, dmaaddr, ring->rx_buffersize, 0)) {
+               b43err(ring->dev->wl, "RX DMA buffer allocation failed\n");
                dev_kfree_skb_any(skb);
                return -EIO;
        }
@@ -592,8 +585,6 @@ static int setup_rx_descbuffer(struct b43_dmaring *ring,
 
        rxhdr = (struct b43_rxhdr_fw4 *)(skb->data);
        rxhdr->frame_len = 0;
-       txstat = (struct b43_hwtxstatus *)(skb->data);
-       txstat->cookie = 0;
 
        return 0;
 }
@@ -645,7 +636,7 @@ static int dmacontroller_setup(struct b43_dmaring *ring)
        u32 trans = ssb_dma_translation(ring->dev->dev);
 
        if (ring->tx) {
-               if (ring->dma64) {
+               if (ring->type == B43_DMA_64BIT) {
                        u64 ringbase = (u64) (ring->dmabase);
 
                        addrext = ((ringbase >> 32) & SSB_DMA_TRANSLATION_MASK)
@@ -677,7 +668,7 @@ static int dmacontroller_setup(struct b43_dmaring *ring)
                err = alloc_initial_descbuffers(ring);
                if (err)
                        goto out;
-               if (ring->dma64) {
+               if (ring->type == B43_DMA_64BIT) {
                        u64 ringbase = (u64) (ring->dmabase);
 
                        addrext = ((ringbase >> 32) & SSB_DMA_TRANSLATION_MASK)
@@ -722,16 +713,16 @@ static void dmacontroller_cleanup(struct b43_dmaring *ring)
 {
        if (ring->tx) {
                b43_dmacontroller_tx_reset(ring->dev, ring->mmio_base,
-                                          ring->dma64);
-               if (ring->dma64) {
+                                          ring->type);
+               if (ring->type == B43_DMA_64BIT) {
                        b43_dma_write(ring, B43_DMA64_TXRINGLO, 0);
                        b43_dma_write(ring, B43_DMA64_TXRINGHI, 0);
                } else
                        b43_dma_write(ring, B43_DMA32_TXRING, 0);
        } else {
                b43_dmacontroller_rx_reset(ring->dev, ring->mmio_base,
-                                          ring->dma64);
-               if (ring->dma64) {
+                                          ring->type);
+               if (ring->type == B43_DMA_64BIT) {
                        b43_dma_write(ring, B43_DMA64_RXRINGLO, 0);
                        b43_dma_write(ring, B43_DMA64_RXRINGHI, 0);
                } else
@@ -782,11 +773,24 @@ static u64 supported_dma_mask(struct b43_wldev *dev)
        return DMA_30BIT_MASK;
 }
 
+static enum b43_dmatype dma_mask_to_engine_type(u64 dmamask)
+{
+       if (dmamask == DMA_30BIT_MASK)
+               return B43_DMA_30BIT;
+       if (dmamask == DMA_32BIT_MASK)
+               return B43_DMA_32BIT;
+       if (dmamask == DMA_64BIT_MASK)
+               return B43_DMA_64BIT;
+       B43_WARN_ON(1);
+       return B43_DMA_30BIT;
+}
+
 /* Main initialization function. */
 static
 struct b43_dmaring *b43_setup_dmaring(struct b43_wldev *dev,
                                      int controller_index,
-                                     int for_tx, int dma64)
+                                     int for_tx,
+                                     enum b43_dmatype type)
 {
        struct b43_dmaring *ring;
        int err;
@@ -796,6 +800,7 @@ struct b43_dmaring *b43_setup_dmaring(struct b43_wldev *dev,
        ring = kzalloc(sizeof(*ring), GFP_KERNEL);
        if (!ring)
                goto out;
+       ring->type = type;
 
        nr_slots = B43_RXRING_SLOTS;
        if (for_tx)
@@ -807,7 +812,7 @@ struct b43_dmaring *b43_setup_dmaring(struct b43_wldev *dev,
                goto err_kfree_ring;
        if (for_tx) {
                ring->txhdr_cache = kcalloc(nr_slots,
-                                           sizeof(struct b43_txhdr_fw4),
+                                           b43_txhdr_size(dev),
                                            GFP_KERNEL);
                if (!ring->txhdr_cache)
                        goto err_kfree_meta;
@@ -815,39 +820,43 @@ struct b43_dmaring *b43_setup_dmaring(struct b43_wldev *dev,
                /* test for ability to dma to txhdr_cache */
                dma_test = dma_map_single(dev->dev->dev,
                                          ring->txhdr_cache,
-                                         sizeof(struct b43_txhdr_fw4),
+                                         b43_txhdr_size(dev),
                                          DMA_TO_DEVICE);
 
-               if (dma_mapping_error(dma_test)) {
+               if (b43_dma_mapping_error(ring, dma_test,
+                                         b43_txhdr_size(dev), 1)) {
                        /* ugh realloc */
                        kfree(ring->txhdr_cache);
                        ring->txhdr_cache = kcalloc(nr_slots,
-                                                   sizeof(struct
-                                                          b43_txhdr_fw4),
+                                                   b43_txhdr_size(dev),
                                                    GFP_KERNEL | GFP_DMA);
                        if (!ring->txhdr_cache)
                                goto err_kfree_meta;
 
                        dma_test = dma_map_single(dev->dev->dev,
                                                  ring->txhdr_cache,
-                                                 sizeof(struct b43_txhdr_fw4),
+                                                 b43_txhdr_size(dev),
                                                  DMA_TO_DEVICE);
 
-                       if (dma_mapping_error(dma_test))
+                       if (b43_dma_mapping_error(ring, dma_test,
+                                                 b43_txhdr_size(dev), 1)) {
+
+                               b43err(dev->wl,
+                                      "TXHDR DMA allocation failed\n");
                                goto err_kfree_txhdr_cache;
+                       }
                }
 
                dma_unmap_single(dev->dev->dev,
-                                dma_test, sizeof(struct b43_txhdr_fw4),
+                                dma_test, b43_txhdr_size(dev),
                                 DMA_TO_DEVICE);
        }
 
        ring->dev = dev;
        ring->nr_slots = nr_slots;
-       ring->mmio_base = b43_dmacontroller_base(dma64, controller_index);
+       ring->mmio_base = b43_dmacontroller_base(type, controller_index);
        ring->index = controller_index;
-       ring->dma64 = !!dma64;
-       if (dma64)
+       if (type == B43_DMA_64BIT)
                ring->ops = &dma64_ops;
        else
                ring->ops = &dma32_ops;
@@ -891,16 +900,52 @@ struct b43_dmaring *b43_setup_dmaring(struct b43_wldev *dev,
        goto out;
 }
 
+#define divide(a, b)   ({      \
+       typeof(a) __a = a;      \
+       do_div(__a, b);         \
+       __a;                    \
+  })
+
+#define modulo(a, b)   ({      \
+       typeof(a) __a = a;      \
+       do_div(__a, b);         \
+  })
+
 /* Main cleanup function. */
-static void b43_destroy_dmaring(struct b43_dmaring *ring)
+static void b43_destroy_dmaring(struct b43_dmaring *ring,
+                               const char *ringname)
 {
        if (!ring)
                return;
 
-       b43dbg(ring->dev->wl, "DMA-%s 0x%04X (%s) max used slots: %d/%d\n",
-              (ring->dma64) ? "64" : "32",
-              ring->mmio_base,
-              (ring->tx) ? "TX" : "RX", ring->max_used_slots, ring->nr_slots);
+#ifdef CONFIG_B43_DEBUG
+       {
+               /* Print some statistics. */
+               u64 failed_packets = ring->nr_failed_tx_packets;
+               u64 succeed_packets = ring->nr_succeed_tx_packets;
+               u64 nr_packets = failed_packets + succeed_packets;
+               u64 permille_failed = 0, average_tries = 0;
+
+               if (nr_packets)
+                       permille_failed = divide(failed_packets * 1000, nr_packets);
+               if (nr_packets)
+                       average_tries = divide(ring->nr_total_packet_tries * 100, nr_packets);
+
+               b43dbg(ring->dev->wl, "DMA-%u %s: "
+                      "Used slots %d/%d, Failed frames %llu/%llu = %llu.%01llu%%, "
+                      "Average tries %llu.%02llu\n",
+                      (unsigned int)(ring->type), ringname,
+                      ring->max_used_slots,
+                      ring->nr_slots,
+                      (unsigned long long)failed_packets,
+                      (unsigned long long)nr_packets,
+                      (unsigned long long)divide(permille_failed, 10),
+                      (unsigned long long)modulo(permille_failed, 10),
+                      (unsigned long long)divide(average_tries, 100),
+                      (unsigned long long)modulo(average_tries, 100));
+       }
+#endif /* DEBUG */
+
        /* Device IRQs are disabled prior entering this function,
         * so no need to take care of concurrency with rx handler stuff.
         */
@@ -913,41 +958,36 @@ static void b43_destroy_dmaring(struct b43_dmaring *ring)
        kfree(ring);
 }
 
+#define destroy_ring(dma, ring) do {                           \
+       b43_destroy_dmaring((dma)->ring, __stringify(ring));    \
+       (dma)->ring = NULL;                                     \
+    } while (0)
+
 void b43_dma_free(struct b43_wldev *dev)
 {
-       struct b43_dma *dma = &dev->dma;
+       struct b43_dma *dma;
 
-       b43_destroy_dmaring(dma->rx_ring3);
-       dma->rx_ring3 = NULL;
-       b43_destroy_dmaring(dma->rx_ring0);
-       dma->rx_ring0 = NULL;
-
-       b43_destroy_dmaring(dma->tx_ring5);
-       dma->tx_ring5 = NULL;
-       b43_destroy_dmaring(dma->tx_ring4);
-       dma->tx_ring4 = NULL;
-       b43_destroy_dmaring(dma->tx_ring3);
-       dma->tx_ring3 = NULL;
-       b43_destroy_dmaring(dma->tx_ring2);
-       dma->tx_ring2 = NULL;
-       b43_destroy_dmaring(dma->tx_ring1);
-       dma->tx_ring1 = NULL;
-       b43_destroy_dmaring(dma->tx_ring0);
-       dma->tx_ring0 = NULL;
+       if (b43_using_pio_transfers(dev))
+               return;
+       dma = &dev->dma;
+
+       destroy_ring(dma, rx_ring);
+       destroy_ring(dma, tx_ring_AC_BK);
+       destroy_ring(dma, tx_ring_AC_BE);
+       destroy_ring(dma, tx_ring_AC_VI);
+       destroy_ring(dma, tx_ring_AC_VO);
+       destroy_ring(dma, tx_ring_mcast);
 }
 
 int b43_dma_init(struct b43_wldev *dev)
 {
        struct b43_dma *dma = &dev->dma;
-       struct b43_dmaring *ring;
        int err;
        u64 dmamask;
-       int dma64 = 0;
+       enum b43_dmatype type;
 
        dmamask = supported_dma_mask(dev);
-       if (dmamask == DMA_64BIT_MASK)
-               dma64 = 1;
-
+       type = dma_mask_to_engine_type(dmamask);
        err = ssb_dma_set_mask(dev->dev, dmamask);
        if (err) {
                b43err(dev->wl, "The machine/kernel does not support "
@@ -959,113 +999,69 @@ int b43_dma_init(struct b43_wldev *dev)
 
        err = -ENOMEM;
        /* setup TX DMA channels. */
-       ring = b43_setup_dmaring(dev, 0, 1, dma64);
-       if (!ring)
+       dma->tx_ring_AC_BK = b43_setup_dmaring(dev, 0, 1, type);
+       if (!dma->tx_ring_AC_BK)
                goto out;
-       dma->tx_ring0 = ring;
 
-       ring = b43_setup_dmaring(dev, 1, 1, dma64);
-       if (!ring)
-               goto err_destroy_tx0;
-       dma->tx_ring1 = ring;
+       dma->tx_ring_AC_BE = b43_setup_dmaring(dev, 1, 1, type);
+       if (!dma->tx_ring_AC_BE)
+               goto err_destroy_bk;
 
-       ring = b43_setup_dmaring(dev, 2, 1, dma64);
-       if (!ring)
-               goto err_destroy_tx1;
-       dma->tx_ring2 = ring;
+       dma->tx_ring_AC_VI = b43_setup_dmaring(dev, 2, 1, type);
+       if (!dma->tx_ring_AC_VI)
+               goto err_destroy_be;
 
-       ring = b43_setup_dmaring(dev, 3, 1, dma64);
-       if (!ring)
-               goto err_destroy_tx2;
-       dma->tx_ring3 = ring;
+       dma->tx_ring_AC_VO = b43_setup_dmaring(dev, 3, 1, type);
+       if (!dma->tx_ring_AC_VO)
+               goto err_destroy_vi;
 
-       ring = b43_setup_dmaring(dev, 4, 1, dma64);
-       if (!ring)
-               goto err_destroy_tx3;
-       dma->tx_ring4 = ring;
+       dma->tx_ring_mcast = b43_setup_dmaring(dev, 4, 1, type);
+       if (!dma->tx_ring_mcast)
+               goto err_destroy_vo;
 
-       ring = b43_setup_dmaring(dev, 5, 1, dma64);
-       if (!ring)
-               goto err_destroy_tx4;
-       dma->tx_ring5 = ring;
+       /* setup RX DMA channel. */
+       dma->rx_ring = b43_setup_dmaring(dev, 0, 0, type);
+       if (!dma->rx_ring)
+               goto err_destroy_mcast;
 
-       /* setup RX DMA channels. */
-       ring = b43_setup_dmaring(dev, 0, 0, dma64);
-       if (!ring)
-               goto err_destroy_tx5;
-       dma->rx_ring0 = ring;
-
-       if (dev->dev->id.revision < 5) {
-               ring = b43_setup_dmaring(dev, 3, 0, dma64);
-               if (!ring)
-                       goto err_destroy_rx0;
-               dma->rx_ring3 = ring;
-       }
+       /* No support for the TX status DMA ring. */
+       B43_WARN_ON(dev->dev->id.revision < 5);
 
-       b43dbg(dev->wl, "%d-bit DMA initialized\n",
-              (dmamask == DMA_64BIT_MASK) ? 64 :
-              (dmamask == DMA_32BIT_MASK) ? 32 : 30);
+       b43dbg(dev->wl, "%u-bit DMA initialized\n",
+              (unsigned int)type);
        err = 0;
-      out:
+out:
        return err;
 
-      err_destroy_rx0:
-       b43_destroy_dmaring(dma->rx_ring0);
-       dma->rx_ring0 = NULL;
-      err_destroy_tx5:
-       b43_destroy_dmaring(dma->tx_ring5);
-       dma->tx_ring5 = NULL;
-      err_destroy_tx4:
-       b43_destroy_dmaring(dma->tx_ring4);
-       dma->tx_ring4 = NULL;
-      err_destroy_tx3:
-       b43_destroy_dmaring(dma->tx_ring3);
-       dma->tx_ring3 = NULL;
-      err_destroy_tx2:
-       b43_destroy_dmaring(dma->tx_ring2);
-       dma->tx_ring2 = NULL;
-      err_destroy_tx1:
-       b43_destroy_dmaring(dma->tx_ring1);
-       dma->tx_ring1 = NULL;
-      err_destroy_tx0:
-       b43_destroy_dmaring(dma->tx_ring0);
-       dma->tx_ring0 = NULL;
-       goto out;
+err_destroy_mcast:
+       destroy_ring(dma, tx_ring_mcast);
+err_destroy_vo:
+       destroy_ring(dma, tx_ring_AC_VO);
+err_destroy_vi:
+       destroy_ring(dma, tx_ring_AC_VI);
+err_destroy_be:
+       destroy_ring(dma, tx_ring_AC_BE);
+err_destroy_bk:
+       destroy_ring(dma, tx_ring_AC_BK);
+       return err;
 }
 
 /* Generate a cookie for the TX header. */
 static u16 generate_cookie(struct b43_dmaring *ring, int slot)
 {
-       u16 cookie = 0x1000;
+       u16 cookie;
 
        /* Use the upper 4 bits of the cookie as
         * DMA controller ID and store the slot number
         * in the lower 12 bits.
         * Note that the cookie must never be 0, as this
         * is a special value used in RX path.
+        * It can also not be 0xFFFF because that is special
+        * for multicast frames.
         */
-       switch (ring->index) {
-       case 0:
-               cookie = 0xA000;
-               break;
-       case 1:
-               cookie = 0xB000;
-               break;
-       case 2:
-               cookie = 0xC000;
-               break;
-       case 3:
-               cookie = 0xD000;
-               break;
-       case 4:
-               cookie = 0xE000;
-               break;
-       case 5:
-               cookie = 0xF000;
-               break;
-       }
+       cookie = (((u16)ring->index + 1) << 12);
        B43_WARN_ON(slot & ~0x0FFF);
-       cookie |= (u16) slot;
+       cookie |= (u16)slot;
 
        return cookie;
 }
@@ -1078,23 +1074,20 @@ struct b43_dmaring *parse_cookie(struct b43_wldev *dev, u16 cookie, int *slot)
        struct b43_dmaring *ring = NULL;
 
        switch (cookie & 0xF000) {
-       case 0xA000:
-               ring = dma->tx_ring0;
+       case 0x1000:
+               ring = dma->tx_ring_AC_BK;
                break;
-       case 0xB000:
-               ring = dma->tx_ring1;
+       case 0x2000:
+               ring = dma->tx_ring_AC_BE;
                break;
-       case 0xC000:
-               ring = dma->tx_ring2;
+       case 0x3000:
+               ring = dma->tx_ring_AC_VI;
                break;
-       case 0xD000:
-               ring = dma->tx_ring3;
+       case 0x4000:
+               ring = dma->tx_ring_AC_VO;
                break;
-       case 0xE000:
-               ring = dma->tx_ring4;
-               break;
-       case 0xF000:
-               ring = dma->tx_ring5;
+       case 0x5000:
+               ring = dma->tx_ring_mcast;
                break;
        default:
                B43_WARN_ON(1);
@@ -1111,32 +1104,44 @@ static int dma_tx_fragment(struct b43_dmaring *ring,
 {
        const struct b43_dma_ops *ops = ring->ops;
        u8 *header;
-       int slot;
+       int slot, old_top_slot, old_used_slots;
        int err;
        struct b43_dmadesc_generic *desc;
        struct b43_dmadesc_meta *meta;
        struct b43_dmadesc_meta *meta_hdr;
        struct sk_buff *bounce_skb;
+       u16 cookie;
+       size_t hdrsize = b43_txhdr_size(ring->dev);
 
 #define SLOTS_PER_PACKET  2
-       B43_WARN_ON(skb_shinfo(skb)->nr_frags);
+
+       old_top_slot = ring->current_slot;
+       old_used_slots = ring->used_slots;
 
        /* Get a slot for the header. */
        slot = request_slot(ring);
        desc = ops->idx2desc(ring, slot, &meta_hdr);
        memset(meta_hdr, 0, sizeof(*meta_hdr));
 
-       header = &(ring->txhdr_cache[slot * sizeof(struct b43_txhdr_fw4)]);
-       b43_generate_txhdr(ring->dev, header,
-                          skb->data, skb->len, ctl,
-                          generate_cookie(ring, slot));
+       header = &(ring->txhdr_cache[slot * hdrsize]);
+       cookie = generate_cookie(ring, slot);
+       err = b43_generate_txhdr(ring->dev, header,
+                                skb->data, skb->len, ctl, cookie);
+       if (unlikely(err)) {
+               ring->current_slot = old_top_slot;
+               ring->used_slots = old_used_slots;
+               return err;
+       }
 
        meta_hdr->dmaaddr = map_descbuffer(ring, (unsigned char *)header,
-                                          sizeof(struct b43_txhdr_fw4), 1);
-       if (dma_mapping_error(meta_hdr->dmaaddr))
+                                          hdrsize, 1);
+       if (b43_dma_mapping_error(ring, meta_hdr->dmaaddr, hdrsize, 1)) {
+               ring->current_slot = old_top_slot;
+               ring->used_slots = old_used_slots;
                return -EIO;
+       }
        ops->fill_descriptor(ring, desc, meta_hdr->dmaaddr,
-                            sizeof(struct b43_txhdr_fw4), 1, 0, 0);
+                            hdrsize, 1, 0, 0);
 
        /* Get a slot for the payload. */
        slot = request_slot(ring);
@@ -1149,9 +1154,11 @@ static int dma_tx_fragment(struct b43_dmaring *ring,
 
        meta->dmaaddr = map_descbuffer(ring, skb->data, skb->len, 1);
        /* create a bounce buffer in zone_dma on mapping failure. */
-       if (dma_mapping_error(meta->dmaaddr)) {
+       if (b43_dma_mapping_error(ring, meta->dmaaddr, skb->len, 1)) {
                bounce_skb = __dev_alloc_skb(skb->len, GFP_ATOMIC | GFP_DMA);
                if (!bounce_skb) {
+                       ring->current_slot = old_top_slot;
+                       ring->used_slots = old_used_slots;
                        err = -ENOMEM;
                        goto out_unmap_hdr;
                }
@@ -1161,7 +1168,9 @@ static int dma_tx_fragment(struct b43_dmaring *ring,
                skb = bounce_skb;
                meta->skb = skb;
                meta->dmaaddr = map_descbuffer(ring, skb->data, skb->len, 1);
-               if (dma_mapping_error(meta->dmaaddr)) {
+               if (b43_dma_mapping_error(ring, meta->dmaaddr, skb->len, 1)) {
+                       ring->current_slot = old_top_slot;
+                       ring->used_slots = old_used_slots;
                        err = -EIO;
                        goto out_free_bounce;
                }
@@ -1169,16 +1178,22 @@ static int dma_tx_fragment(struct b43_dmaring *ring,
 
        ops->fill_descriptor(ring, desc, meta->dmaaddr, skb->len, 0, 1, 1);
 
+       if (ctl->flags & IEEE80211_TXCTL_SEND_AFTER_DTIM) {
+               /* Tell the firmware about the cookie of the last
+                * mcast frame, so it can clear the more-data bit in it. */
+               b43_shm_write16(ring->dev, B43_SHM_SHARED,
+                               B43_SHM_SH_MCASTCOOKIE, cookie);
+       }
        /* Now transfer the whole frame. */
        wmb();
        ops->poke_tx(ring, next_slot(ring, slot));
        return 0;
 
-      out_free_bounce:
+out_free_bounce:
        dev_kfree_skb_any(skb);
-      out_unmap_hdr:
+out_unmap_hdr:
        unmap_descbuffer(ring, meta_hdr->dmaaddr,
-                        sizeof(struct b43_txhdr_fw4), 1);
+                        hdrsize, 1);
        return err;
 }
 
@@ -1203,14 +1218,57 @@ static inline int should_inject_overflow(struct b43_dmaring *ring)
        return 0;
 }
 
+/* Static mapping of mac80211's queues (priorities) to b43 DMA rings. */
+static struct b43_dmaring * select_ring_by_priority(struct b43_wldev *dev,
+                                                   u8 queue_prio)
+{
+       struct b43_dmaring *ring;
+
+       if (b43_modparam_qos) {
+               /* 0 = highest priority */
+               switch (queue_prio) {
+               default:
+                       B43_WARN_ON(1);
+                       /* fallthrough */
+               case 0:
+                       ring = dev->dma.tx_ring_AC_VO;
+                       break;
+               case 1:
+                       ring = dev->dma.tx_ring_AC_VI;
+                       break;
+               case 2:
+                       ring = dev->dma.tx_ring_AC_BE;
+                       break;
+               case 3:
+                       ring = dev->dma.tx_ring_AC_BK;
+                       break;
+               }
+       } else
+               ring = dev->dma.tx_ring_AC_BE;
+
+       return ring;
+}
+
 int b43_dma_tx(struct b43_wldev *dev,
               struct sk_buff *skb, struct ieee80211_tx_control *ctl)
 {
        struct b43_dmaring *ring;
+       struct ieee80211_hdr *hdr;
        int err = 0;
        unsigned long flags;
 
-       ring = priority_to_txring(dev, ctl->queue);
+       hdr = (struct ieee80211_hdr *)skb->data;
+       if (ctl->flags & IEEE80211_TXCTL_SEND_AFTER_DTIM) {
+               /* The multicast ring will be sent after the DTIM */
+               ring = dev->dma.tx_ring_mcast;
+               /* Set the more-data bit. Ucode will clear it on
+                * the last frame for us. */
+               hdr->frame_control |= cpu_to_le16(IEEE80211_FCTL_MOREDATA);
+       } else {
+               /* Decide by priority where to put this frame. */
+               ring = select_ring_by_priority(dev, ctl->queue);
+       }
+
        spin_lock_irqsave(&ring->lock, flags);
        B43_WARN_ON(!ring->tx);
        if (unlikely(free_slots(ring) < SLOTS_PER_PACKET)) {
@@ -1223,7 +1281,19 @@ int b43_dma_tx(struct b43_wldev *dev,
         * That would be a mac80211 bug. */
        B43_WARN_ON(ring->stopped);
 
+       /* Assign the queue number to the ring (if not already done before)
+        * so TX status handling can use it. The queue to ring mapping is
+        * static, so we don't need to store it per frame. */
+       ring->queue_prio = ctl->queue;
+
        err = dma_tx_fragment(ring, skb, ctl);
+       if (unlikely(err == -ENOKEY)) {
+               /* Drop this packet, as we don't have the encryption key
+                * anymore and must not transmit it unencrypted. */
+               dev_kfree_skb_any(skb);
+               err = 0;
+               goto out_unlock;
+       }
        if (unlikely(err)) {
                b43err(dev->wl, "DMA tx mapping failure\n");
                goto out_unlock;
@@ -1232,18 +1302,19 @@ int b43_dma_tx(struct b43_wldev *dev,
        if ((free_slots(ring) < SLOTS_PER_PACKET) ||
            should_inject_overflow(ring)) {
                /* This TX ring is full. */
-               ieee80211_stop_queue(dev->wl->hw, txring_to_priority(ring));
+               ieee80211_stop_queue(dev->wl->hw, ctl->queue);
                ring->stopped = 1;
                if (b43_debug(dev, B43_DBG_DMAVERBOSE)) {
                        b43dbg(dev->wl, "Stopped TX ring %d\n", ring->index);
                }
        }
-      out_unlock:
+out_unlock:
        spin_unlock_irqrestore(&ring->lock, flags);
 
        return err;
 }
 
+/* Called with IRQs disabled. */
 void b43_dma_handle_txstatus(struct b43_wldev *dev,
                             const struct b43_txstatus *status)
 {
@@ -1252,12 +1323,13 @@ void b43_dma_handle_txstatus(struct b43_wldev *dev,
        struct b43_dmadesc_generic *desc;
        struct b43_dmadesc_meta *meta;
        int slot;
+       bool frame_succeed;
 
        ring = parse_cookie(dev, status->cookie, &slot);
        if (unlikely(!ring))
                return;
-       B43_WARN_ON(!irqs_disabled());
-       spin_lock(&ring->lock);
+
+       spin_lock(&ring->lock); /* IRQs are already disabled. */
 
        B43_WARN_ON(!ring->tx);
        ops = ring->ops;
@@ -1270,7 +1342,7 @@ void b43_dma_handle_txstatus(struct b43_wldev *dev,
                                         1);
                else
                        unmap_descbuffer(ring, meta->dmaaddr,
-                                        sizeof(struct b43_txhdr_fw4), 1);
+                                        b43_txhdr_size(dev), 1);
 
                if (meta->is_last_fragment) {
                        B43_WARN_ON(!meta->skb);
@@ -1278,18 +1350,15 @@ void b43_dma_handle_txstatus(struct b43_wldev *dev,
                         * status of the transmission.
                         * Some fields of txstat are already filled in dma_tx().
                         */
-                       if (status->acked) {
-                               meta->txstat.flags |= IEEE80211_TX_STATUS_ACK;
-                       } else {
-                               if (!(meta->txstat.control.flags
-                                     & IEEE80211_TXCTL_NO_ACK))
-                                       meta->txstat.excessive_retries = 1;
-                       }
-                       if (status->frame_count == 0) {
-                               /* The frame was not transmitted at all. */
-                               meta->txstat.retry_count = 0;
-                       } else
-                               meta->txstat.retry_count = status->frame_count - 1;
+                       frame_succeed = b43_fill_txstatus_report(
+                                               &(meta->txstat), status);
+#ifdef CONFIG_B43_DEBUG
+                       if (frame_succeed)
+                               ring->nr_succeed_tx_packets++;
+                       else
+                               ring->nr_failed_tx_packets++;
+                       ring->nr_total_packet_tries += status->frame_count;
+#endif /* DEBUG */
                        ieee80211_tx_status_irqsafe(dev->wl->hw, meta->skb,
                                                    &(meta->txstat));
                        /* skb is freed by ieee80211_tx_status_irqsafe() */
@@ -1311,7 +1380,7 @@ void b43_dma_handle_txstatus(struct b43_wldev *dev,
        dev->stats.last_tx = jiffies;
        if (ring->stopped) {
                B43_WARN_ON(free_slots(ring) < SLOTS_PER_PACKET);
-               ieee80211_wake_queue(dev->wl->hw, txring_to_priority(ring));
+               ieee80211_wake_queue(dev->wl->hw, ring->queue_prio);
                ring->stopped = 0;
                if (b43_debug(dev, B43_DBG_DMAVERBOSE)) {
                        b43dbg(dev->wl, "Woke up TX ring %d\n", ring->index);
@@ -1332,7 +1401,7 @@ void b43_dma_get_tx_stats(struct b43_wldev *dev,
 
        for (i = 0; i < nr_queues; i++) {
                data = &(stats->data[i]);
-               ring = priority_to_txring(dev, i);
+               ring = select_ring_by_priority(dev, i);
 
                spin_lock_irqsave(&ring->lock, flags);
                data->len = ring->used_slots / SLOTS_PER_PACKET;
@@ -1358,25 +1427,6 @@ static void dma_rx(struct b43_dmaring *ring, int *slot)
        sync_descbuffer_for_cpu(ring, meta->dmaaddr, ring->rx_buffersize);
        skb = meta->skb;
 
-       if (ring->index == 3) {
-               /* We received an xmit status. */
-               struct b43_hwtxstatus *hw = (struct b43_hwtxstatus *)skb->data;
-               int i = 0;
-
-               while (hw->cookie == 0) {
-                       if (i > 100)
-                               break;
-                       i++;
-                       udelay(2);
-                       barrier();
-               }
-               b43_handle_hwtxstatus(ring->dev, hw);
-               /* recycle the descriptor buffer. */
-               sync_descbuffer_for_device(ring, meta->dmaaddr,
-                                          ring->rx_buffersize);
-
-               return;
-       }
        rxhdr = (struct b43_rxhdr_fw4 *)skb->data;
        len = le16_to_cpu(rxhdr->frame_len);
        if (len == 0) {
@@ -1433,7 +1483,7 @@ static void dma_rx(struct b43_dmaring *ring, int *slot)
        skb_pull(skb, ring->frameoffset);
 
        b43_rx(ring->dev, skb, rxhdr);
-      drop:
+drop:
        return;
 }
 
@@ -1479,21 +1529,55 @@ static void b43_dma_tx_resume_ring(struct b43_dmaring *ring)
 void b43_dma_tx_suspend(struct b43_wldev *dev)
 {
        b43_power_saving_ctl_bits(dev, B43_PS_AWAKE);
-       b43_dma_tx_suspend_ring(dev->dma.tx_ring0);
-       b43_dma_tx_suspend_ring(dev->dma.tx_ring1);
-       b43_dma_tx_suspend_ring(dev->dma.tx_ring2);
-       b43_dma_tx_suspend_ring(dev->dma.tx_ring3);
-       b43_dma_tx_suspend_ring(dev->dma.tx_ring4);
-       b43_dma_tx_suspend_ring(dev->dma.tx_ring5);
+       b43_dma_tx_suspend_ring(dev->dma.tx_ring_AC_BK);
+       b43_dma_tx_suspend_ring(dev->dma.tx_ring_AC_BE);
+       b43_dma_tx_suspend_ring(dev->dma.tx_ring_AC_VI);
+       b43_dma_tx_suspend_ring(dev->dma.tx_ring_AC_VO);
+       b43_dma_tx_suspend_ring(dev->dma.tx_ring_mcast);
 }
 
 void b43_dma_tx_resume(struct b43_wldev *dev)
 {
-       b43_dma_tx_resume_ring(dev->dma.tx_ring5);
-       b43_dma_tx_resume_ring(dev->dma.tx_ring4);
-       b43_dma_tx_resume_ring(dev->dma.tx_ring3);
-       b43_dma_tx_resume_ring(dev->dma.tx_ring2);
-       b43_dma_tx_resume_ring(dev->dma.tx_ring1);
-       b43_dma_tx_resume_ring(dev->dma.tx_ring0);
+       b43_dma_tx_resume_ring(dev->dma.tx_ring_mcast);
+       b43_dma_tx_resume_ring(dev->dma.tx_ring_AC_VO);
+       b43_dma_tx_resume_ring(dev->dma.tx_ring_AC_VI);
+       b43_dma_tx_resume_ring(dev->dma.tx_ring_AC_BE);
+       b43_dma_tx_resume_ring(dev->dma.tx_ring_AC_BK);
        b43_power_saving_ctl_bits(dev, 0);
 }
+
+#ifdef CONFIG_B43_PIO
+static void direct_fifo_rx(struct b43_wldev *dev, enum b43_dmatype type,
+                          u16 mmio_base, bool enable)
+{
+       u32 ctl;
+
+       if (type == B43_DMA_64BIT) {
+               ctl = b43_read32(dev, mmio_base + B43_DMA64_RXCTL);
+               ctl &= ~B43_DMA64_RXDIRECTFIFO;
+               if (enable)
+                       ctl |= B43_DMA64_RXDIRECTFIFO;
+               b43_write32(dev, mmio_base + B43_DMA64_RXCTL, ctl);
+       } else {
+               ctl = b43_read32(dev, mmio_base + B43_DMA32_RXCTL);
+               ctl &= ~B43_DMA32_RXDIRECTFIFO;
+               if (enable)
+                       ctl |= B43_DMA32_RXDIRECTFIFO;
+               b43_write32(dev, mmio_base + B43_DMA32_RXCTL, ctl);
+       }
+}
+
+/* Enable/Disable Direct FIFO Receive Mode (PIO) on a RX engine.
+ * This is called from PIO code, so DMA structures are not available. */
+void b43_dma_direct_fifo_rx(struct b43_wldev *dev,
+                           unsigned int engine_index, bool enable)
+{
+       enum b43_dmatype type;
+       u16 mmio_base;
+
+       type = dma_mask_to_engine_type(supported_dma_mask(dev));
+
+       mmio_base = b43_dmacontroller_base(type, engine_index);
+       direct_fifo_rx(dev, type, mmio_base, enable);
+}
+#endif /* CONFIG_B43_PIO */
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