rt2x00: rt2800lib: fix band selection and LNA PE control for RT3593 PCIe cards

[deliverable/linux.git] / drivers / net / wireless / rt2x00 / rt2800lib.c

diff --git a/drivers/net/wireless/rt2x00/rt2800lib.c b/drivers/net/wireless/rt2x00/rt2800lib.c
index 470a7aa11f17684f64d25c77ae1767f8e3b33466..786420c199caa6ea3500cdb20c62258a854937db 100644 (file)
--- a/drivers/net/wireless/rt2x00/rt2800lib.c
+++ b/drivers/net/wireless/rt2x00/rt2800lib.c
@@ -3315,29 +3315,37 @@ static void rt2800_config_channel(struct rt2x00_dev *rt2x00dev,
                rt2800_rfcsr_write(rt2x00dev, 8, 0x80);
 
        if (rt2x00_rt(rt2x00dev, RT3593)) {
-               if (rt2x00_is_usb(rt2x00dev)) {
-                       rt2800_register_read(rt2x00dev, GPIO_CTRL, &reg);
+               rt2800_register_read(rt2x00dev, GPIO_CTRL, &reg);
 
-                       /* Band selection. GPIO #8 controls all paths */
+               /* Band selection */
+               if (rt2x00_is_usb(rt2x00dev) ||
+                   rt2x00_is_pcie(rt2x00dev)) {
+                       /* GPIO #8 controls all paths */
                        rt2x00_set_field32(&reg, GPIO_CTRL_DIR8, 0);
                        if (rf->channel <= 14)
                                rt2x00_set_field32(&reg, GPIO_CTRL_VAL8, 1);
                        else
                                rt2x00_set_field32(&reg, GPIO_CTRL_VAL8, 0);
+               }
 
+               /* LNA PE control. */
+               if (rt2x00_is_usb(rt2x00dev)) {
+                       /* GPIO #4 controls PE0 and PE1,
+                        * GPIO #7 controls PE2
+                        */
                        rt2x00_set_field32(&reg, GPIO_CTRL_DIR4, 0);
                        rt2x00_set_field32(&reg, GPIO_CTRL_DIR7, 0);
 
-                       /* LNA PE control.
-                       * GPIO #4 controls PE0 and PE1,
-                       * GPIO #7 controls PE2
-                       */
                        rt2x00_set_field32(&reg, GPIO_CTRL_VAL4, 1);
                        rt2x00_set_field32(&reg, GPIO_CTRL_VAL7, 1);
-
-                       rt2800_register_write(rt2x00dev, GPIO_CTRL, reg);
+               } else if (rt2x00_is_pcie(rt2x00dev)) {
+                       /* GPIO #4 controls PE0, PE1 and PE2 */
+                       rt2x00_set_field32(&reg, GPIO_CTRL_DIR4, 0);
+                       rt2x00_set_field32(&reg, GPIO_CTRL_VAL4, 1);
                }
 
+               rt2800_register_write(rt2x00dev, GPIO_CTRL, reg);
+
                /* AGC init */
                if (rf->channel <= 14)
                        reg = 0x1c + 2 * rt2x00dev->lna_gain;