PCI: Convert pcibios_resource_to_bus() to take a pci_bus, not a pci_dev

[deliverable/linux.git] / drivers / pci / setup-bus.c

diff --git a/drivers/pci/setup-bus.c b/drivers/pci/setup-bus.c
index 4ce83b26ae9ef2dcbdf9e29c81d55751a9525a7e..79339822d80ec7507892a3fc9341da8d2bcd00d0 100644 (file)
--- a/drivers/pci/setup-bus.c
+++ b/drivers/pci/setup-bus.c
@@ -292,8 +292,8 @@ static void assign_requested_resources_sorted(struct list_head *head,
                                      (!(res->flags & IORESOURCE_ROM_ENABLE))))
                                        add_to_list(fail_head,
                                                    dev_res->dev, res,
-                                                   0 /* dont care */,
-                                                   0 /* dont care */);
+                                                   0 /* don't care */,
+                                                   0 /* don't care */);
                        }
                        reset_resource(res);
                }
@@ -475,7 +475,7 @@ void pci_setup_cardbus(struct pci_bus *bus)
                 &bus->busn_res);
 
        res = bus->resource[0];
-       pcibios_resource_to_bus(bridge, &region, res);
+       pcibios_resource_to_bus(bridge->bus, &region, res);
        if (res->flags & IORESOURCE_IO) {
                /*
                 * The IO resource is allocated a range twice as large as it
@@ -489,7 +489,7 @@ void pci_setup_cardbus(struct pci_bus *bus)
        }
 
        res = bus->resource[1];
-       pcibios_resource_to_bus(bridge, &region, res);
+       pcibios_resource_to_bus(bridge->bus, &region, res);
        if (res->flags & IORESOURCE_IO) {
                dev_info(&bridge->dev, "  bridge window %pR\n", res);
                pci_write_config_dword(bridge, PCI_CB_IO_BASE_1,
@@ -499,7 +499,7 @@ void pci_setup_cardbus(struct pci_bus *bus)
        }
 
        res = bus->resource[2];
-       pcibios_resource_to_bus(bridge, &region, res);
+       pcibios_resource_to_bus(bridge->bus, &region, res);
        if (res->flags & IORESOURCE_MEM) {
                dev_info(&bridge->dev, "  bridge window %pR\n", res);
                pci_write_config_dword(bridge, PCI_CB_MEMORY_BASE_0,
@@ -509,7 +509,7 @@ void pci_setup_cardbus(struct pci_bus *bus)
        }
 
        res = bus->resource[3];
-       pcibios_resource_to_bus(bridge, &region, res);
+       pcibios_resource_to_bus(bridge->bus, &region, res);
        if (res->flags & IORESOURCE_MEM) {
                dev_info(&bridge->dev, "  bridge window %pR\n", res);
                pci_write_config_dword(bridge, PCI_CB_MEMORY_BASE_1,
@@ -546,7 +546,7 @@ static void pci_setup_bridge_io(struct pci_bus *bus)
 
        /* Set up the top and bottom of the PCI I/O segment for this bus. */
        res = bus->resource[0];
-       pcibios_resource_to_bus(bridge, &region, res);
+       pcibios_resource_to_bus(bridge->bus, &region, res);
        if (res->flags & IORESOURCE_IO) {
                pci_read_config_dword(bridge, PCI_IO_BASE, &l);
                l &= 0xffff0000;
@@ -578,7 +578,7 @@ static void pci_setup_bridge_mmio(struct pci_bus *bus)
 
        /* Set up the top and bottom of the PCI Memory segment for this bus. */
        res = bus->resource[1];
-       pcibios_resource_to_bus(bridge, &region, res);
+       pcibios_resource_to_bus(bridge->bus, &region, res);
        if (res->flags & IORESOURCE_MEM) {
                l = (region.start >> 16) & 0xfff0;
                l |= region.end & 0xfff00000;
@@ -604,7 +604,7 @@ static void pci_setup_bridge_mmio_pref(struct pci_bus *bus)
        /* Set up PREF base/limit. */
        bu = lu = 0;
        res = bus->resource[2];
-       pcibios_resource_to_bus(bridge, &region, res);
+       pcibios_resource_to_bus(bridge->bus, &region, res);
        if (res->flags & IORESOURCE_PREFETCH) {
                l = (region.start >> 16) & 0xfff0;
                l |= region.end & 0xfff00000;
@@ -667,9 +667,9 @@ static void pci_bridge_check_ranges(struct pci_bus *bus)
        if (!io) {
                pci_write_config_word(bridge, PCI_IO_BASE, 0xf0f0);
                pci_read_config_word(bridge, PCI_IO_BASE, &io);
-               pci_write_config_word(bridge, PCI_IO_BASE, 0x0);
-       }
-       if (io)
+               pci_write_config_word(bridge, PCI_IO_BASE, 0x0);
+       }
+       if (io)
                b_res[0].flags |= IORESOURCE_IO;
        /*  DECchip 21050 pass 2 errata: the bridge may miss an address
            disconnect boundary by one PCI data phase.
@@ -819,7 +819,7 @@ static void pbus_size_io(struct pci_bus *bus, resource_size_t min_size,
        resource_size_t min_align, align;
 
        if (!b_res)
-               return;
+               return;
 
        min_align = window_alignment(bus, IORESOURCE_IO);
        list_for_each_entry(dev, &bus->devices, bus_list) {
@@ -950,7 +950,7 @@ static int pbus_size_mem(struct pci_bus *bus, unsigned long mask,
                        if (realloc_head && i >= PCI_IOV_RESOURCES &&
                                        i <= PCI_IOV_RESOURCE_END) {
                                r->end = r->start - 1;
-                               add_to_list(realloc_head, dev, r, r_size, 0/* dont' care */);
+                               add_to_list(realloc_head, dev, r, r_size, 0/* don't care */);
                                children_add_size += r_size;
                                continue;
                        }
@@ -1422,7 +1422,7 @@ static int iov_resources_unassigned(struct pci_dev *dev, void *data)
                if (!r->flags)
                        continue;
 
-               pcibios_resource_to_bus(dev, &region, r);
+               pcibios_resource_to_bus(dev->bus, &region, r);
                if (!region.start) {
                        *unassigned = true;
                        return 1; /* return early from pci_walk_bus() */
@@ -1456,8 +1456,8 @@ static enum enable_type pci_realloc_detect(struct pci_bus *bus,
 
 /*
  * first try will not touch pci bridge res
- * second  and later try will clear small leaf bridge res
- * will stop till to the max  deepth if can not find good one
+ * second and later try will clear small leaf bridge res
+ * will stop till to the max depth if can not find good one
  */
 void pci_assign_unassigned_root_bus_resources(struct pci_bus *bus)
 {