{
void __iomem *io_base = priv->PortOffset;
/* set SRT */
- VNSvOutPortB(io_base + MAC_REG_SRT, byRetryLimit);
+ iowrite8(byRetryLimit, io_base + MAC_REG_SRT);
}
{
void __iomem *io_base = priv->PortOffset;
/* set LRT */
- VNSvOutPortB(io_base + MAC_REG_LRT, byRetryLimit);
+ iowrite8(byRetryLimit, io_base + MAC_REG_LRT);
}
/*
void MACvSetLoopbackMode(struct vnt_private *priv, unsigned char byLoopbackMode)
{
void __iomem *io_base = priv->PortOffset;
- unsigned char byOrgValue;
byLoopbackMode <<= 6;
/* set TCR */
- VNSvInPortB(io_base + MAC_REG_TEST, &byOrgValue);
- byOrgValue = byOrgValue & 0x3F;
- byOrgValue = byOrgValue | byLoopbackMode;
- VNSvOutPortB(io_base + MAC_REG_TEST, byOrgValue);
+ iowrite8((ioread8(io_base + MAC_REG_TEST) & 0x3f) | byLoopbackMode,
+ io_base + MAC_REG_TEST);
}
/*
memcpy_toio(io_base + MAC_REG_LRT, cxt_buf + MAC_REG_LRT,
MAC_REG_PAGE1SEL - MAC_REG_LRT);
- VNSvOutPortB(io_base + MAC_REG_CFG, *(cxt_buf + MAC_REG_CFG));
+ iowrite8(*(cxt_buf + MAC_REG_CFG), io_base + MAC_REG_CFG);
/* restore PS Config. */
memcpy_toio(io_base + MAC_REG_PSCFG, cxt_buf + MAC_REG_PSCFG,
MAC_REG_BBREGCTL - MAC_REG_PSCFG);
/* restore CURR_RX_DESC_ADDR, CURR_TX_DESC_ADDR */
- VNSvOutPortD(io_base + MAC_REG_TXDMAPTR0,
- *(u32 *)(cxt_buf + MAC_REG_TXDMAPTR0));
- VNSvOutPortD(io_base + MAC_REG_AC0DMAPTR,
- *(u32 *)(cxt_buf + MAC_REG_AC0DMAPTR));
- VNSvOutPortD(io_base + MAC_REG_BCNDMAPTR,
- *(u32 *)(cxt_buf + MAC_REG_BCNDMAPTR));
-
- VNSvOutPortD(io_base + MAC_REG_RXDMAPTR0,
- *(u32 *)(cxt_buf + MAC_REG_RXDMAPTR0));
-
- VNSvOutPortD(io_base + MAC_REG_RXDMAPTR1,
- *(u32 *)(cxt_buf + MAC_REG_RXDMAPTR1));
+ iowrite32(*(u32 *)(cxt_buf + MAC_REG_TXDMAPTR0),
+ io_base + MAC_REG_TXDMAPTR0);
+ iowrite32(*(u32 *)(cxt_buf + MAC_REG_AC0DMAPTR),
+ io_base + MAC_REG_AC0DMAPTR);
+ iowrite32(*(u32 *)(cxt_buf + MAC_REG_BCNDMAPTR),
+ io_base + MAC_REG_BCNDMAPTR);
+ iowrite32(*(u32 *)(cxt_buf + MAC_REG_RXDMAPTR0),
+ io_base + MAC_REG_RXDMAPTR0);
+ iowrite32(*(u32 *)(cxt_buf + MAC_REG_RXDMAPTR1),
+ io_base + MAC_REG_RXDMAPTR1);
}
/*
unsigned short ww;
/* turn on HOSTCR_SOFTRST, just write 0x01 to reset */
- VNSvOutPortB(io_base + MAC_REG_HOSTCR, 0x01);
+ iowrite8(0x01, io_base + MAC_REG_HOSTCR);
for (ww = 0; ww < W_MAX_TIMEOUT; ww++) {
if (!(ioread8(io_base + MAC_REG_HOSTCR) & HOSTCR_SOFTRST))
/* turn off wow temp for turn off Rx safely */
/* Clear RX DMA0,1 */
- VNSvOutPortD(io_base + MAC_REG_RXDMACTL0, DMACTL_CLRRUN);
- VNSvOutPortD(io_base + MAC_REG_RXDMACTL1, DMACTL_CLRRUN);
+ iowrite32(DMACTL_CLRRUN, io_base + MAC_REG_RXDMACTL0);
+ iowrite32(DMACTL_CLRRUN, io_base + MAC_REG_RXDMACTL1);
for (ww = 0; ww < W_MAX_TIMEOUT; ww++) {
if (!(ioread32(io_base + MAC_REG_RXDMACTL0) & DMACTL_RUN))
break;
/* Clear TX DMA */
/* Tx0 */
- VNSvOutPortD(io_base + MAC_REG_TXDMACTL0, DMACTL_CLRRUN);
+ iowrite32(DMACTL_CLRRUN, io_base + MAC_REG_TXDMACTL0);
/* AC0 */
- VNSvOutPortD(io_base + MAC_REG_AC0DMACTL, DMACTL_CLRRUN);
+ iowrite32(DMACTL_CLRRUN, io_base + MAC_REG_AC0DMACTL);
for (ww = 0; ww < W_MAX_TIMEOUT; ww++) {
if (!(ioread32(io_base + MAC_REG_TXDMACTL0) & DMACTL_RUN))
/* clear sticky bits */
MACvClearStckDS(io_base);
/* disable force PME-enable */
- VNSvOutPortB(io_base + MAC_REG_PMC1, PME_OVR);
+ iowrite8(PME_OVR, io_base + MAC_REG_PMC1);
/* only 3253 A */
/* do reset */
MACbSoftwareReset(priv);
/* reset TSF counter */
- VNSvOutPortB(io_base + MAC_REG_TFTCTL, TFTCTL_TSFCNTRST);
+ iowrite8(TFTCTL_TSFCNTRST, io_base + MAC_REG_TFTCTL);
/* enable TSF counter */
- VNSvOutPortB(io_base + MAC_REG_TFTCTL, TFTCTL_TSFCNTREN);
+ iowrite8(TFTCTL_TSFCNTREN, io_base + MAC_REG_TFTCTL);
}
/*
* Parameters:
* In:
* io_base - Base Address for MAC
- * dwCurrDescAddr - Descriptor Address
+ * curr_desc_addr - Descriptor Address
* Out:
* none
*
* Return Value: none
*
*/
-void MACvSetCurrRx0DescAddr(struct vnt_private *priv, u32 dwCurrDescAddr)
+void MACvSetCurrRx0DescAddr(struct vnt_private *priv, u32 curr_desc_addr)
{
void __iomem *io_base = priv->PortOffset;
unsigned short ww;
- unsigned char byOrgDMACtl;
+ unsigned char org_dma_ctl;
- VNSvInPortB(io_base + MAC_REG_RXDMACTL0, &byOrgDMACtl);
- if (byOrgDMACtl & DMACTL_RUN)
- VNSvOutPortB(io_base + MAC_REG_RXDMACTL0+2, DMACTL_RUN);
+ org_dma_ctl = ioread8(io_base + MAC_REG_RXDMACTL0);
+ if (org_dma_ctl & DMACTL_RUN)
+ iowrite8(DMACTL_RUN, io_base + MAC_REG_RXDMACTL0 + 2);
for (ww = 0; ww < W_MAX_TIMEOUT; ww++) {
if (!(ioread8(io_base + MAC_REG_RXDMACTL0) & DMACTL_RUN))
break;
}
- VNSvOutPortD(io_base + MAC_REG_RXDMAPTR0, dwCurrDescAddr);
- if (byOrgDMACtl & DMACTL_RUN)
- VNSvOutPortB(io_base + MAC_REG_RXDMACTL0, DMACTL_RUN);
+ iowrite32(curr_desc_addr, io_base + MAC_REG_RXDMAPTR0);
+ if (org_dma_ctl & DMACTL_RUN)
+ iowrite8(DMACTL_RUN, io_base + MAC_REG_RXDMACTL0);
}
/*
* Parameters:
* In:
* io_base - Base Address for MAC
- * dwCurrDescAddr - Descriptor Address
+ * curr_desc_addr - Descriptor Address
* Out:
* none
*
* Return Value: none
*
*/
-void MACvSetCurrRx1DescAddr(struct vnt_private *priv, u32 dwCurrDescAddr)
+void MACvSetCurrRx1DescAddr(struct vnt_private *priv, u32 curr_desc_addr)
{
void __iomem *io_base = priv->PortOffset;
unsigned short ww;
- unsigned char byOrgDMACtl;
+ unsigned char org_dma_ctl;
- VNSvInPortB(io_base + MAC_REG_RXDMACTL1, &byOrgDMACtl);
- if (byOrgDMACtl & DMACTL_RUN)
- VNSvOutPortB(io_base + MAC_REG_RXDMACTL1+2, DMACTL_RUN);
+ org_dma_ctl = ioread8(io_base + MAC_REG_RXDMACTL1);
+ if (org_dma_ctl & DMACTL_RUN)
+ iowrite8(DMACTL_RUN, io_base + MAC_REG_RXDMACTL1 + 2);
for (ww = 0; ww < W_MAX_TIMEOUT; ww++) {
if (!(ioread8(io_base + MAC_REG_RXDMACTL1) & DMACTL_RUN))
break;
}
- VNSvOutPortD(io_base + MAC_REG_RXDMAPTR1, dwCurrDescAddr);
- if (byOrgDMACtl & DMACTL_RUN)
- VNSvOutPortB(io_base + MAC_REG_RXDMACTL1, DMACTL_RUN);
+ iowrite32(curr_desc_addr, io_base + MAC_REG_RXDMAPTR1);
+ if (org_dma_ctl & DMACTL_RUN)
+ iowrite8(DMACTL_RUN, io_base + MAC_REG_RXDMACTL1);
}
* Parameters:
* In:
* io_base - Base Address for MAC
- * dwCurrDescAddr - Descriptor Address
+ * curr_desc_addr - Descriptor Address
* Out:
* none
*
*
*/
void MACvSetCurrTx0DescAddrEx(struct vnt_private *priv,
- u32 dwCurrDescAddr)
+ u32 curr_desc_addr)
{
void __iomem *io_base = priv->PortOffset;
unsigned short ww;
- unsigned char byOrgDMACtl;
+ unsigned char org_dma_ctl;
- VNSvInPortB(io_base + MAC_REG_TXDMACTL0, &byOrgDMACtl);
- if (byOrgDMACtl & DMACTL_RUN)
- VNSvOutPortB(io_base + MAC_REG_TXDMACTL0+2, DMACTL_RUN);
+ org_dma_ctl = ioread8(io_base + MAC_REG_TXDMACTL0);
+ if (org_dma_ctl & DMACTL_RUN)
+ iowrite8(DMACTL_RUN, io_base + MAC_REG_TXDMACTL0 + 2);
for (ww = 0; ww < W_MAX_TIMEOUT; ww++) {
if (!(ioread8(io_base + MAC_REG_TXDMACTL0) & DMACTL_RUN))
break;
}
- VNSvOutPortD(io_base + MAC_REG_TXDMAPTR0, dwCurrDescAddr);
- if (byOrgDMACtl & DMACTL_RUN)
- VNSvOutPortB(io_base + MAC_REG_TXDMACTL0, DMACTL_RUN);
+ iowrite32(curr_desc_addr, io_base + MAC_REG_TXDMAPTR0);
+ if (org_dma_ctl & DMACTL_RUN)
+ iowrite8(DMACTL_RUN, io_base + MAC_REG_TXDMACTL0);
}
/*
* Parameters:
* In:
* io_base - Base Address for MAC
- * dwCurrDescAddr - Descriptor Address
+ * curr_desc_addr - Descriptor Address
* Out:
* none
*
*/
/* TxDMA1 = AC0DMA */
void MACvSetCurrAC0DescAddrEx(struct vnt_private *priv,
- u32 dwCurrDescAddr)
+ u32 curr_desc_addr)
{
void __iomem *io_base = priv->PortOffset;
unsigned short ww;
- unsigned char byOrgDMACtl;
+ unsigned char org_dma_ctl;
- VNSvInPortB(io_base + MAC_REG_AC0DMACTL, &byOrgDMACtl);
- if (byOrgDMACtl & DMACTL_RUN)
- VNSvOutPortB(io_base + MAC_REG_AC0DMACTL+2, DMACTL_RUN);
+ org_dma_ctl = ioread8(io_base + MAC_REG_AC0DMACTL);
+ if (org_dma_ctl & DMACTL_RUN)
+ iowrite8(DMACTL_RUN, io_base + MAC_REG_AC0DMACTL + 2);
for (ww = 0; ww < W_MAX_TIMEOUT; ww++) {
if (!(ioread8(io_base + MAC_REG_AC0DMACTL) & DMACTL_RUN))
}
if (ww == W_MAX_TIMEOUT)
pr_debug(" DBG_PORT80(0x26)\n");
- VNSvOutPortD(io_base + MAC_REG_AC0DMAPTR, dwCurrDescAddr);
- if (byOrgDMACtl & DMACTL_RUN)
- VNSvOutPortB(io_base + MAC_REG_AC0DMACTL, DMACTL_RUN);
+ iowrite32(curr_desc_addr, io_base + MAC_REG_AC0DMAPTR);
+ if (org_dma_ctl & DMACTL_RUN)
+ iowrite8(DMACTL_RUN, io_base + MAC_REG_AC0DMACTL);
}
void MACvSetCurrTXDescAddr(int iTxType, struct vnt_private *priv,
- u32 dwCurrDescAddr)
+ u32 curr_desc_addr)
{
if (iTxType == TYPE_AC0DMA)
- MACvSetCurrAC0DescAddrEx(priv, dwCurrDescAddr);
+ MACvSetCurrAC0DescAddrEx(priv, curr_desc_addr);
else if (iTxType == TYPE_TXDMA0)
- MACvSetCurrTx0DescAddrEx(priv, dwCurrDescAddr);
+ MACvSetCurrTx0DescAddrEx(priv, curr_desc_addr);
}
/*
unsigned char byValue;
unsigned int uu, ii;
- VNSvOutPortB(io_base + MAC_REG_TMCTL0, 0);
- VNSvOutPortD(io_base + MAC_REG_TMDATA0, uDelay);
- VNSvOutPortB(io_base + MAC_REG_TMCTL0, (TMCTL_TMD | TMCTL_TE));
+ iowrite8(0, io_base + MAC_REG_TMCTL0);
+ iowrite32(uDelay, io_base + MAC_REG_TMDATA0);
+ iowrite8((TMCTL_TMD | TMCTL_TE), io_base + MAC_REG_TMCTL0);
for (ii = 0; ii < 66; ii++) { /* assume max PCI clock is 66Mhz */
for (uu = 0; uu < uDelay; uu++) {
- VNSvInPortB(io_base + MAC_REG_TMCTL0, &byValue);
+ byValue = ioread8(io_base + MAC_REG_TMCTL0);
if ((byValue == 0) ||
(byValue & TMCTL_TSUSP)) {
- VNSvOutPortB(io_base + MAC_REG_TMCTL0, 0);
+ iowrite8(0, io_base + MAC_REG_TMCTL0);
return;
}
}
}
- VNSvOutPortB(io_base + MAC_REG_TMCTL0, 0);
+ iowrite8(0, io_base + MAC_REG_TMCTL0);
}
/*
{
void __iomem *io_base = priv->PortOffset;
- VNSvOutPortB(io_base + MAC_REG_TMCTL1, 0);
- VNSvOutPortD(io_base + MAC_REG_TMDATA1, uDelayTime);
- VNSvOutPortB(io_base + MAC_REG_TMCTL1, (TMCTL_TMD | TMCTL_TE));
+ iowrite8(0, io_base + MAC_REG_TMCTL1);
+ iowrite32(uDelayTime, io_base + MAC_REG_TMDATA1);
+ iowrite8((TMCTL_TMD | TMCTL_TE), io_base + MAC_REG_TMCTL1);
}
-void MACvSetMISCFifo(struct vnt_private *priv, unsigned short wOffset,
+void MACvSetMISCFifo(struct vnt_private *priv, unsigned short offset,
u32 dwData)
{
void __iomem *io_base = priv->PortOffset;
- if (wOffset > 273)
+ if (offset > 273)
return;
- VNSvOutPortW(io_base + MAC_REG_MISCFFNDEX, wOffset);
- VNSvOutPortD(io_base + MAC_REG_MISCFFDATA, dwData);
- VNSvOutPortW(io_base + MAC_REG_MISCFFCTL, MISCFFCTL_WRITE);
+ iowrite16(offset, io_base + MAC_REG_MISCFFNDEX);
+ iowrite32(dwData, io_base + MAC_REG_MISCFFDATA);
+ iowrite16(MISCFFCTL_WRITE, io_base + MAC_REG_MISCFFCTL);
}
bool MACbPSWakeup(struct vnt_private *priv)
{
void __iomem *io_base = priv->PortOffset;
- unsigned char byOrgValue;
unsigned int ww;
/* Read PSCTL */
if (MACbIsRegBitsOff(priv, MAC_REG_PSCTL, PSCTL_PS))
/* Check if SyncFlushOK */
for (ww = 0; ww < W_MAX_TIMEOUT; ww++) {
- VNSvInPortB(io_base + MAC_REG_PSCTL, &byOrgValue);
- if (byOrgValue & PSCTL_WAKEDONE)
+ if (ioread8(io_base + MAC_REG_PSCTL) & PSCTL_WAKEDONE)
break;
}
if (ww == W_MAX_TIMEOUT) {
unsigned char byLocalID)
{
void __iomem *io_base = priv->PortOffset;
- unsigned short wOffset;
+ unsigned short offset;
u32 dwData;
int ii;
return;
pr_debug("MACvSetKeyEntry\n");
- wOffset = MISCFIFO_KEYETRY0;
- wOffset += (uEntryIdx * MISCFIFO_KEYENTRYSIZE);
+ offset = MISCFIFO_KEYETRY0;
+ offset += (uEntryIdx * MISCFIFO_KEYENTRYSIZE);
dwData = 0;
dwData |= wKeyCtl;
dwData <<= 16;
dwData |= MAKEWORD(*(pbyAddr+4), *(pbyAddr+5));
- pr_debug("1. wOffset: %d, Data: %X, KeyCtl:%X\n",
- wOffset, dwData, wKeyCtl);
+ pr_debug("1. offset: %d, Data: %X, KeyCtl:%X\n",
+ offset, dwData, wKeyCtl);
- VNSvOutPortW(io_base + MAC_REG_MISCFFNDEX, wOffset);
- VNSvOutPortD(io_base + MAC_REG_MISCFFDATA, dwData);
- VNSvOutPortW(io_base + MAC_REG_MISCFFCTL, MISCFFCTL_WRITE);
- wOffset++;
+ iowrite16(offset, io_base + MAC_REG_MISCFFNDEX);
+ iowrite32(dwData, io_base + MAC_REG_MISCFFDATA);
+ iowrite16(MISCFFCTL_WRITE, io_base + MAC_REG_MISCFFCTL);
+ offset++;
dwData = 0;
dwData |= *(pbyAddr+3);
dwData |= *(pbyAddr+1);
dwData <<= 8;
dwData |= *(pbyAddr+0);
- pr_debug("2. wOffset: %d, Data: %X\n", wOffset, dwData);
+ pr_debug("2. offset: %d, Data: %X\n", offset, dwData);
- VNSvOutPortW(io_base + MAC_REG_MISCFFNDEX, wOffset);
- VNSvOutPortD(io_base + MAC_REG_MISCFFDATA, dwData);
- VNSvOutPortW(io_base + MAC_REG_MISCFFCTL, MISCFFCTL_WRITE);
- wOffset++;
+ iowrite16(offset, io_base + MAC_REG_MISCFFNDEX);
+ iowrite32(dwData, io_base + MAC_REG_MISCFFDATA);
+ iowrite16(MISCFFCTL_WRITE, io_base + MAC_REG_MISCFFCTL);
+ offset++;
- wOffset += (uKeyIdx * 4);
+ offset += (uKeyIdx * 4);
for (ii = 0; ii < 4; ii++) {
/* always push 128 bits */
- pr_debug("3.(%d) wOffset: %d, Data: %X\n",
- ii, wOffset+ii, *pdwKey);
- VNSvOutPortW(io_base + MAC_REG_MISCFFNDEX, wOffset+ii);
- VNSvOutPortD(io_base + MAC_REG_MISCFFDATA, *pdwKey++);
- VNSvOutPortW(io_base + MAC_REG_MISCFFCTL, MISCFFCTL_WRITE);
+ pr_debug("3.(%d) offset: %d, Data: %X\n",
+ ii, offset + ii, *pdwKey);
+ iowrite16(offset + ii, io_base + MAC_REG_MISCFFNDEX);
+ iowrite32(*pdwKey++, io_base + MAC_REG_MISCFFDATA);
+ iowrite16(MISCFFCTL_WRITE, io_base + MAC_REG_MISCFFCTL);
}
}
void MACvDisableKeyEntry(struct vnt_private *priv, unsigned int uEntryIdx)
{
void __iomem *io_base = priv->PortOffset;
- unsigned short wOffset;
+ unsigned short offset;
- wOffset = MISCFIFO_KEYETRY0;
- wOffset += (uEntryIdx * MISCFIFO_KEYENTRYSIZE);
+ offset = MISCFIFO_KEYETRY0;
+ offset += (uEntryIdx * MISCFIFO_KEYENTRYSIZE);
- VNSvOutPortW(io_base + MAC_REG_MISCFFNDEX, wOffset);
- VNSvOutPortD(io_base + MAC_REG_MISCFFDATA, 0);
- VNSvOutPortW(io_base + MAC_REG_MISCFFCTL, MISCFFCTL_WRITE);
+ iowrite16(offset, io_base + MAC_REG_MISCFFNDEX);
+ iowrite32(0, io_base + MAC_REG_MISCFFDATA);
+ iowrite16(MISCFFCTL_WRITE, io_base + MAC_REG_MISCFFCTL);
}
projects / deliverable / linux.git / blobdiff