atyfb: Properly save PCI state before changing PCI PM level

[deliverable/linux.git] / drivers / video / aty / atyfb_base.c

diff --git a/drivers/video/aty/atyfb_base.c b/drivers/video/aty/atyfb_base.c
index cc6b470073daa3085c0694a77909fcebec10fd6e..1207c208a30b32f243a6ab4ec952d811d69fe248 100644 (file)
--- a/drivers/video/aty/atyfb_base.c
+++ b/drivers/video/aty/atyfb_base.c
@@ -135,7 +135,7 @@
 #if defined(CONFIG_PM) || defined(CONFIG_PMAC_BACKLIGHT) || \
 defined (CONFIG_FB_ATY_GENERIC_LCD) || defined(CONFIG_FB_ATY_BACKLIGHT)
 static const u32 lt_lcd_regs[] = {
-       CONFIG_PANEL_LG,
+       CNFG_PANEL_LG,
        LCD_GEN_CNTL_LG,
        DSTN_CONTROL_LG,
        HFB_PITCH_ADDR_LG,
@@ -446,7 +446,7 @@ static int __devinit correct_chipset(struct atyfb_par *par)
        par->pll_limits.ecp_max = aty_chips[i].ecp_max;
        par->features = aty_chips[i].features;
 
-       chip_id = aty_ld_le32(CONFIG_CHIP_ID, par);
+       chip_id = aty_ld_le32(CNFG_CHIP_ID, par);
        type = chip_id & CFG_CHIP_TYPE;
        rev = (chip_id & CFG_CHIP_REV) >> 24;
 
@@ -629,7 +629,7 @@ static void aty_get_crtc(const struct atyfb_par *par, struct crtc *crtc)
                    crtc->lcd_index = aty_ld_le32(LCD_INDEX, par);
                    aty_st_le32(LCD_INDEX, crtc->lcd_index, par);
                }
-               crtc->lcd_config_panel = aty_ld_lcd(CONFIG_PANEL, par);
+               crtc->lcd_config_panel = aty_ld_lcd(CNFG_PANEL, par);
                crtc->lcd_gen_cntl = aty_ld_lcd(LCD_GEN_CNTL, par);
 
 
@@ -676,7 +676,7 @@ static void aty_set_crtc(const struct atyfb_par *par, const struct crtc *crtc)
                aty_st_le32(CRTC_GEN_CNTL, crtc->gen_cntl & ~(CRTC_EXT_DISP_EN | CRTC_EN), par);
 
                /* update non-shadow registers first */
-               aty_st_lcd(CONFIG_PANEL, crtc->lcd_config_panel, par);
+               aty_st_lcd(CNFG_PANEL, crtc->lcd_config_panel, par);
                aty_st_lcd(LCD_GEN_CNTL, crtc->lcd_gen_cntl &
                        ~(CRTC_RW_SELECT | SHADOW_EN | SHADOW_RW_EN), par);
 
@@ -858,7 +858,7 @@ static int aty_var_to_crtc(const struct fb_info *info,
                if (!M64_HAS(MOBIL_BUS))
                        crtc->lcd_index |= CRTC2_DISPLAY_DIS;
 
-               crtc->lcd_config_panel = aty_ld_lcd(CONFIG_PANEL, par) | 0x4000;
+               crtc->lcd_config_panel = aty_ld_lcd(CNFG_PANEL, par) | 0x4000;
                crtc->lcd_gen_cntl = aty_ld_lcd(LCD_GEN_CNTL, par) & ~CRTC_RW_SELECT;
 
                crtc->lcd_gen_cntl &=
@@ -1978,7 +1978,7 @@ static int aty_power_mgmt(int sleep, struct atyfb_par *par)
 
        return timeout ? 0 : -EIO;
 }
-#endif
+#endif /* CONFIG_PPC_PMAC */
 
 static int atyfb_pci_suspend(struct pci_dev *pdev, pm_message_t state)
 {
@@ -2002,9 +2002,15 @@ static int atyfb_pci_suspend(struct pci_dev *pdev, pm_message_t state)
        par->asleep = 1;
        par->lock_blank = 1;
 
+       /* Because we may change PCI D state ourselves, we need to
+        * first save the config space content so the core can
+        * restore it properly on resume.
+        */
+       pci_save_state(pdev);
+
 #ifdef CONFIG_PPC_PMAC
        /* Set chip to "suspend" mode */
-       if (aty_power_mgmt(1, par)) {
+       if (machine_is(powermac) && aty_power_mgmt(1, par)) {
                par->asleep = 0;
                par->lock_blank = 0;
                atyfb_blank(FB_BLANK_UNBLANK, info);
@@ -2047,11 +2053,15 @@ static int atyfb_pci_resume(struct pci_dev *pdev)
 
        acquire_console_sem();
 
+       /* PCI state will have been restored by the core, so
+        * we should be in D0 now with our config space fully
+        * restored
+        */
+
 #ifdef CONFIG_PPC_PMAC
-       if (pdev->dev.power.power_state.event == 2)
+       if (machine_is(powermac) &&
+           pdev->dev.power.power_state.event == PM_EVENT_SUSPEND)
                aty_power_mgmt(0, par);
-#else
-       pci_set_power_state(pdev, PCI_D0);
 #endif
 
        aty_resume_chip(info);
@@ -2254,7 +2264,7 @@ static int __devinit aty_init(struct fb_info *info)
        if (!M64_HAS(INTEGRATED)) {
                u32 stat0;
                u8 dac_type, dac_subtype, clk_type;
-               stat0 = aty_ld_le32(CONFIG_STAT0, par);
+               stat0 = aty_ld_le32(CNFG_STAT0, par);
                par->bus_type = (stat0 >> 0) & 0x07;
                par->ram_type = (stat0 >> 3) & 0x07;
                ramname = aty_gx_ram[par->ram_type];
@@ -2324,7 +2334,7 @@ static int __devinit aty_init(struct fb_info *info)
                par->dac_ops = &aty_dac_ct;
                par->pll_ops = &aty_pll_ct;
                par->bus_type = PCI;
-               par->ram_type = (aty_ld_le32(CONFIG_STAT0, par) & 0x07);
+               par->ram_type = (aty_ld_le32(CNFG_STAT0, par) & 0x07);
                ramname = aty_ct_ram[par->ram_type];
                /* for many chips, the mclk is 67 MHz for SDRAM, 63 MHz otherwise */
                if (par->pll_limits.mclk == 67 && par->ram_type < SDRAM)
@@ -2433,7 +2443,7 @@ static int __devinit aty_init(struct fb_info *info)
                }
 
        if (M64_HAS(MAGIC_VRAM_SIZE)) {
-               if (aty_ld_le32(CONFIG_STAT1, par) & 0x40000000)
+               if (aty_ld_le32(CNFG_STAT1, par) & 0x40000000)
                        info->fix.smem_len += 0x400000;
        }
 
@@ -2946,7 +2956,7 @@ static int __devinit atyfb_setup_sparc(struct pci_dev *pdev,
                 * Fix PROMs idea of MEM_CNTL settings...
                 */
                mem = aty_ld_le32(MEM_CNTL, par);
-               chip_id = aty_ld_le32(CONFIG_CHIP_ID, par);
+               chip_id = aty_ld_le32(CNFG_CHIP_ID, par);
                if (((chip_id & CFG_CHIP_TYPE) == VT_CHIP_ID) && !((chip_id >> 24) & 1)) {
                        switch (mem & 0x0f) {
                        case 3:
@@ -2964,7 +2974,7 @@ static int __devinit atyfb_setup_sparc(struct pci_dev *pdev,
                        default:
                                break;
                        }
-                       if ((aty_ld_le32(CONFIG_STAT0, par) & 7) >= SDRAM)
+                       if ((aty_ld_le32(CNFG_STAT0, par) & 7) >= SDRAM)
                                mem &= ~(0x00700000);
                }
                mem &= ~(0xcf80e000);   /* Turn off all undocumented bits. */
@@ -3572,7 +3582,7 @@ static int __init atyfb_atari_probe(void)
                }
 
                /* Fake pci_id for correct_chipset() */
-               switch (aty_ld_le32(CONFIG_CHIP_ID, par) & CFG_CHIP_TYPE) {
+               switch (aty_ld_le32(CNFG_CHIP_ID, par) & CFG_CHIP_TYPE) {
                case 0x00d7:
                        par->pci_id = PCI_CHIP_MACH64GX;
                        break;