Don't use bfd.h in binutils/elfcomm.c

[deliverable/binutils-gdb.git] / gas / ChangeLog

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+2020-03-17  Sergey Belyashov  <sergey.belyashov@gmail.com>
+
+       PR 25641
+       PR 25668
+       PR 25633
+       Fix disassembling ED+A4/AC/B4/BC opcodes.
+       Fix assembling lines containing colonless label and instruction
+       with first operand inside parentheses.
+       Fix registration of unsupported by target CPU registers.
+       * config/tc-z80.c: See above.
+       * config/tc-z80.h: See above.
+       * testsuite/gas/z80/colonless.d: Update test.
+       * testsuite/gas/z80/colonless.s: Likewise.
+       * testsuite/gas/z80/ez80_adl_all.d: Likewise.
+       * testsuite/gas/z80/ez80_unsup_regs.d: Likewise.
+       * testsuite/gas/z80/ez80_z80_all.d: Likewise.
+       * testsuite/gas/z80/gbz80_unsup_regs.d: Likewise.
+       * testsuite/gas/z80/r800_unsup_regs.d: Likewise.
+       * testsuite/gas/z80/unsup_regs.s: Likewise.
+       * testsuite/gas/z80/z180_unsup_regs.d: Likewise.
+       * testsuite/gas/z80/z80.exp: Likewise.
+       * testsuite/gas/z80/z80_strict_unsup_regs.d: Likewise.
+       * testsuite/gas/z80/z80_unsup_regs.d: Likewise.
+       * testsuite/gas/z80/z80n_unsup_regs.d: Likewise.
+
+2020-03-13  Andre Vieira  <andre.simoesdiasvieira@arm.com>
+
+       PR 25660
+       *  config/tc-arm.c (operand_parse_code): Add OP_RNSDMQR and OP_oRNSDMQ.
+       (parse_operands): Handle new operand codes.
+       (do_neon_dyadic_long): Make shape check accept the scalar variants.
+       (asm_opcode_insns): Fix operand codes for vaddl and vsubl.
+       * testsuite/gas/arm/mve-vaddsub-it.s: New test.
+       * testsuite/gas/arm/mve-vaddsub-it.d: New test.
+       * testsuite/gas/arm/mve-vaddsub-it-bad.s: New test.
+       * testsuite/gas/arm/mve-vaddsub-it-bad.l: New test.
+       * testsuite/gas/arm/mve-vaddsub-it-bad.d: New test.
+       * testsuite/gas/arm/nomve-vaddsub-it.d: New test.
+
+2020-03-11  H.J. Lu  <hongjiu.lu@intel.com>
+
+       * NEWS: Mention x86 assembler options for CVE-2020-0551.
+
+2020-03-11  H.J. Lu  <hongjiu.lu@intel.com>
+
+       * testsuite/gas/i386/i386.exp: Run new tests.
+       * testsuite/gas/i386/lfence-byte.d: New file.
+       * testsuite/gas/i386/lfence-byte.e: Likewise.
+       * testsuite/gas/i386/lfence-byte.s: Likewise.
+       * testsuite/gas/i386/lfence-indbr-a.d: Likewise.
+       * testsuite/gas/i386/lfence-indbr-b.d: Likewise.
+       * testsuite/gas/i386/lfence-indbr-c.d: Likewise.
+       * testsuite/gas/i386/lfence-indbr.e: Likewise.
+       * testsuite/gas/i386/lfence-indbr.s: Likewise.
+       * testsuite/gas/i386/lfence-load.d: Likewise.
+       * testsuite/gas/i386/lfence-load.s: Likewise.
+       * testsuite/gas/i386/lfence-ret-a.d: Likewise.
+       * testsuite/gas/i386/lfence-ret-b.d: Likewise.
+       * testsuite/gas/i386/lfence-ret.s: Likewise.
+       * testsuite/gas/i386/x86-64-lfence-byte.d: Likewise.
+       * testsuite/gas/i386/x86-64-lfence-byte.e: Likewise.
+       * testsuite/gas/i386/x86-64-lfence-byte.s: Likewise.
+       * testsuite/gas/i386/x86-64-lfence-indbr-a.d: Likewise.
+       * testsuite/gas/i386/x86-64-lfence-indbr-b.d: Likewise.
+       * testsuite/gas/i386/x86-64-lfence-indbr-c.d: Likewise.
+       * testsuite/gas/i386/x86-64-lfence-indbr.e: Likewise.
+       * testsuite/gas/i386/x86-64-lfence-indbr.s: Likewise.
+       * testsuite/gas/i386/x86-64-lfence-load.d: Likewise.
+       * testsuite/gas/i386/x86-64-lfence-load.s: Likewise.
+       * testsuite/gas/i386/x86-64-lfence-ret-a.d: Likewise.
+       * testsuite/gas/i386/x86-64-lfence-ret-b.d: Likewise.
+
 2020-03-11  H.J. Lu  <hongjiu.lu@intel.com>
 
        * config/tc-i386.c (lfence_after_load): New.