MIPS/GAS: Don't convert RELA JALR relocations on R6
[deliverable/binutils-gdb.git] / gas / ChangeLog
index 116ab8925468dcf2267cd9b3022df6ade287d1a7..1218ae52142d48c31c2f4e4395129764e37c2463 100644 (file)
@@ -1,3 +1,129 @@
+2016-06-13  Maciej W. Rozycki  <macro@imgtec.com>
+
+       * config/tc-mips.c (mips_fix_adjustable): Don't convert RELA
+       JALR relocations on R6.
+       * testsuite/gas/mips/jal-svr4pic-local.d: New test.
+       * testsuite/gas/mips/mips1@jal-svr4pic-local.d: New test.
+       * testsuite/gas/mips/r3000@jal-svr4pic-local.d: New test.
+       * testsuite/gas/mips/micromips@jal-svr4pic-local.d: New test.
+       * testsuite/gas/mips/jal-svr4pic-local-n32.d: New test.
+       * testsuite/gas/mips/micromips@jal-svr4pic-local-n32.d: New
+       test.
+       * testsuite/gas/mips/jal-svr4pic-local-n64.d: New test.
+       * testsuite/gas/mips/micromips@jal-svr4pic-local-n64.d: New
+       test.
+       * testsuite/gas/mips/jal-svr4pic-local.s: New test source.
+       * testsuite/gas/mips/jal-svr4pic-local-newabi.s: New test
+       source.
+       * testsuite/gas/mips/mips.exp: Run the new tests.
+
+2016-06-13  Virendra Pathak  <virendra.pathak@broadcom.com>
+
+        * config/tc-aarch64.c (aarch64_cpus): Add Broadcom Vulcan.
+        * doc/c-aarch64.texi: Document that vulcan is a valid processor
+       name.
+
+2016-06-13  Nick Clifton  <nickc@redhat.com>
+
+       * config/tc-arm.c: For non-ELF based targets skip ARM feature sets
+       that are not supported.
+
+       * config/tc-arc.c (md_apply_fix): Avoid left shifting a signed
+       constant.
+       * config/tc-cr16.c (check_range): Likewise.
+       * config/tc-nios2.c (nios2_check_overflow): Likewise.
+
+2016-06-08  Renlin Li  <renlin.li@arm.com>
+
+       * config/tc-aarch64.c (print_operands): Substitute size.
+       (output_operand_error_record): Likewise.
+
+2016-06-07  Alan Modra  <amodra@gmail.com>
+
+       * config/tc-ppc.c (PPC_APUINFO_ISEL, PPC_APUINFO_PMR,
+       PPC_APUINFO_RFMCI, PPC_APUINFO_CACHELCK, PPC_APUINFO_SPE,
+       PPC_APUINFO_EFS, PPC_APUINFO_BRLOCK, PPC_APUINFO_VLE): Don't define.
+       (ppc_setup_opcodes): Check vle disables powerpc_opcodes overridden
+       by vle_opcodes, and that vle flag doesn't enable opcodes.  Don't
+       add vle_opcodes twice.
+       (ppc_cleanup): Use APUINFO_SECTION_NAME and APUINFO_LABEL.
+
+2016-06-07  Matthew Wahab  <matthew.wahab@arm.com>
+
+       * config/tc-arm.c (arm_ext_v8_2): Rename to arm_ext_ras.
+       (arm_ext_ras): Renamed from arm_ext_v8_2.
+       (insns): Update for arm_ext_v8_2 renaming.
+       (arm_extensions): Add "ras".
+       * doc/c-arm.texi (ARM Options): Add an entry for "ras".
+       * testsuite/gas/arm/armv8-a+ras.d: New.
+       * testsuite/gas/arm/armv8_2-a.d: Add explicit command line
+       options.
+
+2016-06-05  Trevor Saunders  <tbsaunde+binutils@tbsaunde.org>
+
+       * itbl-parse.y (yyerror): Use modern argument declaration style.
+
+2016-06-05  Trevor Saunders  <tbsaunde+binutils@tbsaunde.org>
+
+       * config/tc-sh.c (parse_reg): Change type of mode argument to
+       sh_arg_type.
+       (get_operand): Adjust.
+       (insert): Change type of how to bfd_reloc_code_real_type.
+       (insert4): Likewise.
+       * config/tc-sh64.c (shmedia_get_operand): Adjust.
+       (shmedia_parse_reg): Change type of mode to shmedia_arg_type.
+
+2016-06-05  Trevor Saunders  <tbsaunde+binutils@tbsaunde.org>
+
+       * config/tc-nds32.c (nds32_parse_option): Make the type of ptr_arg
+       const char *.
+
+2016-06-03  Peter Bergner <bergner@vnet.ibm.com>
+
+       PR binutils/20196
+       * gas/testsuite/gas/ppc/e6500.s <lbarx, lharx, lwarx, ldarx,
+       stbcx., sthcx., stwcx., stdcx.>: Add tests.
+       * gas/testsuite/gas/ppc/e6500.d: Likewise.
+       * gas/testsuite/gas/ppc/power8.s: Likewise.
+       * gas/testsuite/gas/ppc/power8.d: Likewise.
+       * gas/testsuite/gas/ppc/power4.s <lwarx, ldarx, stwcx.,
+       stdcx.>: Add tests.
+       * gas/testsuite/gas/ppc/power4.d: Likewise.
+
+2016-06-03  H.J. Lu  <hongjiu.lu@intel.com>
+
+       PR binutis/18386
+       * testsuite/gas/i386/i386.exp: Run x86-64-branch-4.
+       * testsuite/gas/i386/x86-64-branch.d: Updated.
+       * testsuite/gas/i386/ilp32/x86-64-branch.d: Likewise.
+       * testsuite/gas/i386/x86-64-branch-4.l: New file.
+       * testsuite/gas/i386/x86-64-branch-4.s: Likewise.
+
+2016-06-03  Kyrylo Tkachov  <kyrylo.tkachov@arm.com>
+
+       * config/tc-aarch64.c (aarch64_cpus): Add cortex-a73 entry.
+       * doc/c-aarch64.texi (-mcpu): Document cortex-a73 value.
+
+2016-06-03  Kyrylo Tkachov  <kyrylo.tkachov@arm.com>
+
+       * config/tc-arm.c (arm_cpus): Add cortex-a73 entry.
+       * doc/c-arm.texi (-mcpu=): Document cortex-a73 value.
+
+2016-06-02  Vineet Gupta  <Vineet.Gupta1@synopsys.com>
+
+       * configure.tgt: Replace -uclibc with *.
+
+2016-06-02  Andrew Burgess  <andrew.burgess@embecosm.com>
+
+       * config/tc-arc.c (parse_opcode_flags): New function.
+       (find_opcode_match): Move flag parsing code out to new function.
+       Ignore operands marked IGNORE.
+       (build_fake_opcode_hash_entry): New function.
+       (find_special_case_long_opcode): New function.
+       (find_special_case): Lookup long opcodes.
+       * testsuite/gas/arc/nps400-7.d: New file.
+       * testsuite/gas/arc/nps400-7.s: New file.
+
 2016-06-01  Trevor Saunders  <tbsaunde+binutils@tbsaunde.org>
 
        * config/tc-ns32k.c: Remove definition of input_line_pointer.
This page took 0.031855 seconds and 4 git commands to generate.