+2016-06-13 Maciej W. Rozycki <macro@imgtec.com>
+
+ * config/tc-mips.c (mips_fix_adjustable): Don't convert RELA
+ JALR relocations on R6.
+ * testsuite/gas/mips/jal-svr4pic-local.d: New test.
+ * testsuite/gas/mips/mips1@jal-svr4pic-local.d: New test.
+ * testsuite/gas/mips/r3000@jal-svr4pic-local.d: New test.
+ * testsuite/gas/mips/micromips@jal-svr4pic-local.d: New test.
+ * testsuite/gas/mips/jal-svr4pic-local-n32.d: New test.
+ * testsuite/gas/mips/micromips@jal-svr4pic-local-n32.d: New
+ test.
+ * testsuite/gas/mips/jal-svr4pic-local-n64.d: New test.
+ * testsuite/gas/mips/micromips@jal-svr4pic-local-n64.d: New
+ test.
+ * testsuite/gas/mips/jal-svr4pic-local.s: New test source.
+ * testsuite/gas/mips/jal-svr4pic-local-newabi.s: New test
+ source.
+ * testsuite/gas/mips/mips.exp: Run the new tests.
+
+2016-06-13 Virendra Pathak <virendra.pathak@broadcom.com>
+
+ * config/tc-aarch64.c (aarch64_cpus): Add Broadcom Vulcan.
+ * doc/c-aarch64.texi: Document that vulcan is a valid processor
+ name.
+
+2016-06-13 Nick Clifton <nickc@redhat.com>
+
+ * config/tc-arm.c: For non-ELF based targets skip ARM feature sets
+ that are not supported.
+
+ * config/tc-arc.c (md_apply_fix): Avoid left shifting a signed
+ constant.
+ * config/tc-cr16.c (check_range): Likewise.
+ * config/tc-nios2.c (nios2_check_overflow): Likewise.
+
+2016-06-08 Renlin Li <renlin.li@arm.com>
+
+ * config/tc-aarch64.c (print_operands): Substitute size.
+ (output_operand_error_record): Likewise.
+
+2016-06-07 Alan Modra <amodra@gmail.com>
+
+ * config/tc-ppc.c (PPC_APUINFO_ISEL, PPC_APUINFO_PMR,
+ PPC_APUINFO_RFMCI, PPC_APUINFO_CACHELCK, PPC_APUINFO_SPE,
+ PPC_APUINFO_EFS, PPC_APUINFO_BRLOCK, PPC_APUINFO_VLE): Don't define.
+ (ppc_setup_opcodes): Check vle disables powerpc_opcodes overridden
+ by vle_opcodes, and that vle flag doesn't enable opcodes. Don't
+ add vle_opcodes twice.
+ (ppc_cleanup): Use APUINFO_SECTION_NAME and APUINFO_LABEL.
+
+2016-06-07 Matthew Wahab <matthew.wahab@arm.com>
+
+ * config/tc-arm.c (arm_ext_v8_2): Rename to arm_ext_ras.
+ (arm_ext_ras): Renamed from arm_ext_v8_2.
+ (insns): Update for arm_ext_v8_2 renaming.
+ (arm_extensions): Add "ras".
+ * doc/c-arm.texi (ARM Options): Add an entry for "ras".
+ * testsuite/gas/arm/armv8-a+ras.d: New.
+ * testsuite/gas/arm/armv8_2-a.d: Add explicit command line
+ options.
+
+2016-06-05 Trevor Saunders <tbsaunde+binutils@tbsaunde.org>
+
+ * itbl-parse.y (yyerror): Use modern argument declaration style.
+
+2016-06-05 Trevor Saunders <tbsaunde+binutils@tbsaunde.org>
+
+ * config/tc-sh.c (parse_reg): Change type of mode argument to
+ sh_arg_type.
+ (get_operand): Adjust.
+ (insert): Change type of how to bfd_reloc_code_real_type.
+ (insert4): Likewise.
+ * config/tc-sh64.c (shmedia_get_operand): Adjust.
+ (shmedia_parse_reg): Change type of mode to shmedia_arg_type.
+
+2016-06-05 Trevor Saunders <tbsaunde+binutils@tbsaunde.org>
+
+ * config/tc-nds32.c (nds32_parse_option): Make the type of ptr_arg
+ const char *.
+
+2016-06-03 Peter Bergner <bergner@vnet.ibm.com>
+
+ PR binutils/20196
+ * gas/testsuite/gas/ppc/e6500.s <lbarx, lharx, lwarx, ldarx,
+ stbcx., sthcx., stwcx., stdcx.>: Add tests.
+ * gas/testsuite/gas/ppc/e6500.d: Likewise.
+ * gas/testsuite/gas/ppc/power8.s: Likewise.
+ * gas/testsuite/gas/ppc/power8.d: Likewise.
+ * gas/testsuite/gas/ppc/power4.s <lwarx, ldarx, stwcx.,
+ stdcx.>: Add tests.
+ * gas/testsuite/gas/ppc/power4.d: Likewise.
+
+2016-06-03 H.J. Lu <hongjiu.lu@intel.com>
+
+ PR binutis/18386
+ * testsuite/gas/i386/i386.exp: Run x86-64-branch-4.
+ * testsuite/gas/i386/x86-64-branch.d: Updated.
+ * testsuite/gas/i386/ilp32/x86-64-branch.d: Likewise.
+ * testsuite/gas/i386/x86-64-branch-4.l: New file.
+ * testsuite/gas/i386/x86-64-branch-4.s: Likewise.
+
+2016-06-03 Kyrylo Tkachov <kyrylo.tkachov@arm.com>
+
+ * config/tc-aarch64.c (aarch64_cpus): Add cortex-a73 entry.
+ * doc/c-aarch64.texi (-mcpu): Document cortex-a73 value.
+
+2016-06-03 Kyrylo Tkachov <kyrylo.tkachov@arm.com>
+
+ * config/tc-arm.c (arm_cpus): Add cortex-a73 entry.
+ * doc/c-arm.texi (-mcpu=): Document cortex-a73 value.
+
+2016-06-02 Vineet Gupta <Vineet.Gupta1@synopsys.com>
+
+ * configure.tgt: Replace -uclibc with *.
+
+2016-06-02 Andrew Burgess <andrew.burgess@embecosm.com>
+
+ * config/tc-arc.c (parse_opcode_flags): New function.
+ (find_opcode_match): Move flag parsing code out to new function.
+ Ignore operands marked IGNORE.
+ (build_fake_opcode_hash_entry): New function.
+ (find_special_case_long_opcode): New function.
+ (find_special_case): Lookup long opcodes.
+ * testsuite/gas/arc/nps400-7.d: New file.
+ * testsuite/gas/arc/nps400-7.s: New file.
+
+2016-06-01 Trevor Saunders <tbsaunde+binutils@tbsaunde.org>
+
+ * config/tc-ns32k.c: Remove definition of input_line_pointer.
+
+2016-06-01 Trevor Saunders <tbsaunde+binutils@tbsaunde.org>
+
+ * config/tc-avr.c (avr_parse_cons_expression): Replace iteration to
+ sentinal with iteration to array size.
+
+2016-06-01 Trevor Saunders <tbsaunde+binutils@tbsaunde.org>
+
+ * config/xtensa-relax.h: Move typedefs of enums to the enums
+ definition.
+
+2016-06-01 Trevor Saunders <tbsaunde+binutils@tbsaunde.org>
+
+ * config/tc-ns32k.c (bit_fix_new): Replace obstack-alloc with XOBNEW
+ macro.
+
+2016-06-01 Graham Markall <graham.markall@embecosm.com>
+
+ * testsuite/gas/arc/nps-400-1.s: Add rflt variants with
+ operands of types a,b,u6, 0,b,u6, and 0,b,limm.
+ * testsuite/gas/arc/nps-400-1.d: Likewise.
+
+2016-05-29 H.J. Lu <hongjiu.lu@intel.com>
+
+ PR gas/20145
+ * config/tc-i386.c (cpu_noarch): Add noavx512f, noavx512cd,
+ noavx512er, noavx512pf, noavx512dq, noavx512bw, noavx512vl,
+ noavx512ifma and noavx512vbmi.
+ * doc/c-i386.texi: Mention noavx512f, noavx512cd, noavx512er,
+ noavx512pf, noavx512dq, noavx512bw, noavx512vl, noavx512ifma
+ and noavx512vbmi.
+ * testsuite/gas/i386/i386.exp: Run noavx512-1 and noavx512-2.
+ * testsuite/gas/i386/noavx512-1.l: New file.
+ * testsuite/gas/i386/noavx512-1.s: Likewise.
+ * testsuite/gas/i386/noavx512-2.l: Likewise.
+ * testsuite/gas/i386/noavx512-2.s: Likewise.
+
+2016-05-27 H.J. Lu <hongjiu.lu@intel.com>
+
+ PR gas/20145
+ * config/tc-i386.c (cpu_arch): Add 687.
+ (cpu_noarch): Add no287, no387, no687, nosse2, nosse3, nossse3,
+ nosse4.1, nosse4.2, nosse4 and noavx2.
+ (parse_real_register): Check cpuregmmx instead of cpummx for MMX
+ register. Check cpuregxmm instead of cpusse for XMM register.
+ Check cpuregymm instead of cpuavx for YMM register. Check
+ cpuregzmm/cpuregmask instead of cpuavx512f for ZMMM/mask register.
+ * doc/c-i386.texi: Mention 687, no287, no387, no687, nosse2,
+ nosse3, nossse3, nosse4.1, nosse4.2, nosse4 and noavx2.
+ * testsuite/gas/i386/arch-10-prefetchw.d (as): Add mmx.
+ * testsuite/gas/i386/arch-10.d (as): Likewise.
+ * testsuite/gas/i386/arch-11.s: Add ".arch .mmx".
+ * testsuite/gas/i386/i386.exp: Pass mmx to assembler for
+ arch-10-3 and arch-10-4. Run no87-3, nosse-4, nosse-5, noavx-3
+ and noavx-4.
+ * testsuite/gas/i386/no87-3.l: New file.
+ * testsuite/gas/i386/no87-3.s: Likewise.
+ * testsuite/gas/i386/noavx-3.l: Likewise.
+ * testsuite/gas/i386/noavx-3.s: Likewise.
+ * testsuite/gas/i386/noavx-4.d: Likewise.
+ * testsuite/gas/i386/noavx-4.s: Likewise.
+ * testsuite/gas/i386/nosse-4.l: Likewise.
+ * testsuite/gas/i386/nosse-4.s: Likewise.
+ * testsuite/gas/i386/nosse-5.d: Likewise.
+ * testsuite/gas/i386/nosse-5.s: Likewise.
+
+2016-05-27 H.J. Lu <hongjiu.lu@intel.com>
+
+ PR gas/20154
+ * config/tc-i386.c (cpu_flags_match): Don't set cpuamd64 nor
+ cpuintel64.
+ (match_template): Check Intel64/AMD64 ISA.
+
+2016-05-27 H.J. Lu <hongjiu.lu@intel.com>
+
+ PR gas/20154
+ * config/tc-i386.c (intel64): New.
+ (cpu_flags_match): Set cpuamd64 and cpuintel64.
+ (md_parse_option): Set intel64 instead of cpuamd64 and
+ cpuintel64.
+
+2016-05-27 H.J. Lu <hongjiu.lu@intel.com>
+
+ * config/tc-i386.c (cpu_flags_match): Don't clear cpu64 nor
+ cpuno64.
+
+2016-05-26 Peter Bergner <bergner@vnet.ibm.com>
+
+ * testsuite/gas/ppc/altivec3.d <vmsumudm>: Add test.
+ * testsuite/gas/ppc/altivec3.s: Likewise.
+ * testsuite/gas/ppc/power9.d <addex[.], lwzmx, vmsumudm>: Add tests.
+ * testsuite/gas/ppc/power9.s: Likewise.
+
+2016-05-26 H.J. Lu <hongjiu.lu@intel.com>
+
+ * testsuite/gas/i386/avx512vl-2.l: Append "#pass".
+ * testsuite/gas/i386/noavx-1.l: Likewise.
+ * testsuite/gas/i386/nommx-1.l: Likewise.
+ * testsuite/gas/i386/nosse-1.l: Likewise.
+ * testsuite/gas/i386/x86-64-avx512vl-2.l: Likewise.
+ * testsuite/gas/i386/avx512vl-2.s: Append ".p2align 4".
+ * testsuite/gas/i386/noavx-1.s: Likewise.
+ * testsuite/gas/i386/nommx-1.s: Likewise.
+ * testsuite/gas/i386/nosse-1.s: Likewise.
+ * testsuite/gas/i386/x86-64-avx512vl-2.s: Likewise.
+
+2016-05-26 Trevor Saunders <tbsaunde+binutils@tbsaunde.org>
+
+ * config/tc-metag.c (metag_handle_align): Make the type of noop
+ unsigned char.
+
2016-05-26 Trevor Saunders <tbsaunde+binutils@tbsaunde.org>
* config/tc-rx.c (md_convert_frag): Make the type of reloc_type
projects / deliverable / binutils-gdb.git / blobdiff