[BINUTILS, AARCH64, 7/8] Add system registers for Memory Tagging Extension

[deliverable/binutils-gdb.git] / gas / ChangeLog

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+2018-11-12  Sudakshina Das  <sudi.das@arm.com>
+
+       * testsuite/gas/aarch64/sysreg-4.s: Test TCO, TFSRE0_SL1,
+       TFSR_EL1, TFSR_EL2, TFSR_EL3, TFSR_EL12, RGSR_EL1 and
+       GCR_EL1 MSR and MRS.
+       * testsuite/gas/aarch64/sysreg-4.d: Likewise.
+       * testsuite/gas/aarch64/illegal-sysreg-4.l: Likewise.
+
+2018-11-12  Sudakshina Das  <sudi.das@arm.com>
+
+       * config/tc-aarch64.c (parse_operands): Add switch case for
+       AARCH64_OPND_ADDR_SIMPLE_2 and allow [base]! for it.
+       (warn_unpredictable_ldst): Exempt ldstgv_indexed for ldgv.
+       * testsuite/gas/aarch64/armv8_5-a-memtag.s: Add tests for ldgv and stgv.
+       * testsuite/gas/aarch64/armv8_5-a-memtag.d: Likewise.
+       * testsuite/gas/aarch64/illegal-memtag.s: Likewise.
+       * testsuite/gas/aarch64/illegal-memtag.l: Likewise.
+
+2018-11-12  Sudakshina Das  <sudi.das@arm.com>
+
+       * testsuite/gas/aarch64/armv8_5-a-memtag.s: Add tests for ldg.
+       * testsuite/gas/aarch64/armv8_5-a-memtag.d: Likewise.
+       * testsuite/gas/aarch64/illegal-memtag.s: Likewise.
+       * testsuite/gas/aarch64/illegal-memtag.l: Likewise.
+
+2018-11-12  Sudakshina Das  <sudi.das@arm.com>
+
+       * config/tc-aarch64.c (parse_operands): Add switch case for
+       AARCH64_OPND_ADDR_SIMM11 and AARCH64_OPND_ADDR_SIMM13.
+       (fix_insn): Likewise.
+       (warn_unpredictable_ldst): Exempt STGP.
+       * testsuite/gas/aarch64/armv8_5-a-memtag.s: Add tests for stg, st2g,
+       stzg, stz2g and stgp.
+       * testsuite/gas/aarch64/armv8_5-a-memtag.d: Likewise.
+       * testsuite/gas/aarch64/illegal-memtag.s: Likewise.
+       * testsuite/gas/aarch64/illegal-memtag.l: Likewise.
+
+2018-11-12  Sudakshina Das  <sudi.das@arm.com>
+
+       * testsuite/gas/aarch64/armv8_5-a-memtag.s: Add tests for subp,
+       subps and cmpp.
+       * testsuite/gas/aarch64/armv8_5-a-memtag.d: Likewise.
+       * testsuite/gas/aarch64/illegal-memtag.s: Likewise.
+       * testsuite/gas/aarch64/illegal-memtag.l: Likewise.
+
+2018-11-12  Sudakshina Das  <sudi.das@arm.com>
+
+       * config/tc-aarch64.c (parse_operands): Add switch case for
+       AARCH64_OPND_UIMM4_ADDG and AARCH64_OPND_UIMM10.
+       * testsuite/gas/aarch64/armv8_5-a-memtag.s: New.
+       * testsuite/gas/aarch64/armv8_5-a-memtag.d: Likewise.
+       * testsuite/gas/aarch64/illegal-memtag.s: Likewise.
+       * testsuite/gas/aarch64/illegal-memtag.l: Likewise.
+       * testsuite/gas/aarch64/illegal-memtag.d: Likewise.
+
+2018-11-12  Sudakshina Das  <sudi.das@arm.com>
+
+       * config/tc-aarch64.c (aarch64_features): Add "memtag"
+       as a new option.
+       * doc/c-aarch64.texi: Document the same.
+
+2018-11-09  Alan Modra  <amodra@gmail.com>
+
+       * config/tc-ppc.c (fixup_size): New function.
+       (md_assemble): Use it to derive size and pcrel directly
+       from fixup reloc type.
+
+2018-11-07  Nick Clifton  <nickc@redhat.com>
+
+       * po/fr.po: Updated French translation.
+
 2018-11-07  Yoshinori Sato  <ysato@users.sourceforge.jp>
 
        * configure.tgt: Add rx-*-linux.