RISC-V: Report warning when linking the objects with different priv specs.

[deliverable/binutils-gdb.git] / gas / ChangeLog

diff --git a/gas/ChangeLog b/gas/ChangeLog
index ef4eb8fec33c7e4306e94bc34376d2f715824927..25d47147d66dfa14cd5abcb64c6e720c137fefb5 100644 (file)
--- a/gas/ChangeLog
+++ b/gas/ChangeLog
@@ -1,3 +1,35 @@
+2020-06-22  Nelson Chu  <nelson.chu@sifive.com>
+
+       * config/tc-riscv.c (buf_size, buf): Remove the unused variables.
+       (riscv_set_default_priv_spec): Get the priv spec version from the
+       priv spec attributes by riscv_get_priv_spec_class_from_numbers.
+
+2020-06-20  Alan Modra  <amodra@gmail.com>
+
+       * configure.tgt: Set bfd_gas for all SH targets.
+
+2020-06-18  Jan Beulich  <jbeulich@suse.com>
+
+       * testsuite/gas/i386/arch-13.s: Add alternative VMGEXIT case.
+       * testsuite/gas/i386/arch-13.d: Extend -march=. Adjust
+       expectations.
+
+2020-06-16  Lili Cui  <lili.cui@intel.com>
+
+       * config/tc-i386.c (cpu_arch): Correct noavx512_vp2intersect
+       cpu_arch to CPU_ANY_VP2INTERSECT_FLAGS.
+       * doc/c-i386.texi: Add avx512_vp2intersect.
+
+2020-06-16  Jan Beulich  <jbeulich@suse.com>
+
+       * config/tc-i386.c (md_assemble): Drop SSE4a from SSE check
+       conditional.
+       * testsuite/gas/i386/sse-check.s: Adjust comment.
+       * testsuite/gas/i386/sse-check-error.l,
+       testsuite/gas/i386/sse-check-warn.e,
+       testsuite/gas/i386/x86-64-sse-check-error.l: Adjust
+       expectations.
+
 2020-06-16  Alan Modra  <amodra@gmail.com>
 
        * config/tc-tic30.h: Remove OBJ_AOUT support.