[AArch64][PATCH 2/14] Support ARMv8.2 FP16 Vector Three Same instructions.

[deliverable/binutils-gdb.git] / gas / ChangeLog

diff --git a/gas/ChangeLog b/gas/ChangeLog
index cbcae455b83fbca6c4cc85d61e9e93d75b757c5d..28e89840c47ec417d225fc7038b3a44d62d8fcad 100644 (file)
--- a/gas/ChangeLog
+++ b/gas/ChangeLog
@@ -1,3 +1,135 @@
+2015-12-14  Jan Beulich  <jbeulich@suse.com>
+
+       * dw2gencfi.c (dot_cfi_label): Free "name".
+
+2015-12-11  Matthew Wahab  <matthew.wahab@arm.com>
+
+       * config/tc-aarch64.c (aarch64_hint_opt_hsh): New.
+       (parse_barrier_psb): New.
+       (parse_operands): Add case for AARCH64_OPND_BARRIER_PSB.
+       (md_begin): Set up aarch64_hint_opt_hsh.
+
+2015-12-11  Matthew Wahab  <matthew.wahab@arm.com>
+
+       * config/tc-aarch64.c (aarch64_features): Add "profile".
+       * doc/c-aarch64.texi (AArch64 Extensions): Add "profile".
+
+2015-12-10  Matthew Wahab  <matthew.wahab@arm.com>
+
+       * config/tc-aarch64.c (parse_sys_ins_reg): Add check of
+       architectural support for system register.
+
+2015-12-10  Jose E. Marchesi  <jose.marchesi@oracle.com>
+
+       * doc/c-sparc.texi (Sparc-Regs): Document the %dN and %qN notation
+       for floating-point registers.
+
+2015-12-10  Matthew Wahab  <matthew.wahab@arm.com>
+
+       * doc/c-aarch64.texi (AArch64 Extensions): Update entry for crc.
+
+2015-12-10  Andrew Burgess  <andrew.burgess@embecosm.com>
+
+       * config/tc-arc.c (md_parse_option): Return 1 in order to accept
+       dummy arguments.
+
+2015-12-09  Jose E. Marchesi  <jose.marchesi@oracle.com>
+
+       * config/tc-sparc.c (sparc_ip): Support %dN and %qN notation for
+       double and quad-precision floating-point registers.
+
+2015-12-09  Nick Clifton  <nickc@redhat.com>
+
+       * config/tc-rx.c (rx_relax_frag): Fix compile time warning.
+
+2015-12-08  Jan Beulich  <jbeulich@suse.com>
+
+       * read.c (in_bss): New.
+       (do_align): Use it to also warn for non-zero fill in .bss.
+       (do_org): Likewise.
+       (s_space): Likewise.
+       (s_fill): Error on bad use in .bss/.struct.
+       (float_cons): Likewise.
+       (emit_leb128_expr): Likewise.
+       (emit_expr_with_reloc): Defer handling use inside .struct. Also
+       error on non-zero item added to .bss.
+       (stringer_append_char): Error on non-zero character.
+
+2015-12-08  Jan Beulich  <jbeulich@suse.com>
+
+       * read.c (stringer): Move absolute section check up. Return
+       right away.
+
+2015-12-08  Jan Beulich  <jbeulich@suse.com>
+
+       * config/obj-elf.c (elf_file_symbol): Tighten condition for
+       moving BSF_FILE symbols.
+
+2015-12-08  DJ Delorie  <dj@redhat.com>
+
+       * config/rl78-parse.y: Make all branches relaxable via
+       rl78_linkrelax_branch().
+       * config/tc-rl78.c (rl78_linkrelax_branch): Mark all relaxable
+       branches with relocs.
+       (options): Add OPTION_NORELAX.
+       (md_longopts): Add -mnorelax.
+       (md_parse_option): Support OPTION_NORELAX.
+       (op_type_T): Add bh, sk, call, and br.
+       (rl78_opcode_type): Likewise.
+       (rl78_relax_frag): Fix not-relaxing logic.  Add sk.
+       (md_convert_frag): Fix relocation handling.
+       (tc_gen_reloc): Strip relax relocs when not linker relaxing.
+       (md_apply_fix): Defer overflow handling for anything that needs a
+       PLT, to the linker.
+       * config/tc-rl78.h (TC_FORCE_RELOCATION): Force all relocations to
+       the linker when linker relaxing.
+       * doc/c-rl78.texi (norelax): Add.
+
+2015-12-07  Alan Modra  <amodra@gmail.com>
+
+       * config/tc-ppc.c (md_apply_fix): Localize variables.  Reduce casts.
+
+2015-12-04  Nick Clifton  <nickc@redhat.com>
+
+       PR gas/19276
+       * config/tc-arm.h (SUB_SEGMENT_ALIGN): Do not define for COFF/PE
+       targets.
+
+2015-12-04  Claudiu Zissulescu  <claziss@synopsys.com>
+
+       * config/tc-arc.c (arc_option): Sets all internal gas options when
+       parsing .cpu directive.
+       (declare_register_set): Declare all 64 registers.
+       (md_section_align): Refactor.
+       (md_pcrel_from_section): Remove assert.
+       (pseudo_operand_match): Fix pseudo operand match.
+       (find_reloc): Use flags filed, extend matching.
+       * config/tc-arc.h (TC_VALIDATE_FIX): Don't fixup any PLT
+       relocation.
+
+2015-12-01  Alan Modra  <amodra@gmail.com>
+
+       * config/aout_gnu.h: Invoke aout N_* macros with pointer to
+       struct internal_exec.
+
+2015-11-27  Matthew Wahab  <matthew.wahab@arm.com>
+
+       * config/tc-aarch64.c (aarch64_features): Add "fp16".
+       * doc/c-aarch64.texi (Architecture Extensions): Add "fp16".
+
+2015-11-24  Christophe Monat <christophe.monat@st.com>
+
+       * config/tc-arm.c (move_or_literal_pool): Do not transform ldr
+       ri,=imm into movs when ri is a high register in T1.
+
+2015-11-20  Nick Clifton  <nickc@redhat.com>
+
+       * po/fr.po: Updated French translation.
+       * po/uk.po: Updated Ukraninan translation.
+       * po/zh_CN.po: New simplified Chinese translation.
+       * configure.ac (ALL_LINGUAS): Add zh_CN.
+       * configure: Regenerate.
+
 2015-11-19  Matthew Wahab  <matthew.wahab@arm.com>
 
        * config/tc-arm.c (arm_archs): Add "armv8.2-a".