+2011-12-22 DJ Delorie <dj@redhat.com>
+
+ * config/rl78-defs.h (rl78_linkrelax_addr16): Add.
+ (rl78_linkrelax_dsp, rl78_linkrelax_imm): Remove.
+ * config/rl78-parse.y: Tag all addr16 and branch patterns with
+ relaxation markers.
+ * config/tc-rl78.c (rl78_linkrelax_addr16): New.
+ (rl78_linkrelax_branch): New.
+ (OPTION_RELAX): New.
+ (md_longopts): Add relax option.
+ (md_parse_option): Add OPTION_RELAX.
+ (rl78_frag_init): Support relaxation.
+ (rl78_handle_align): New.
+ (md_assemble): Support relaxation.
+ (md_apply_fix): Likewise.
+ (md_convert_frag): Likewise.
+ * config/tc-rl78.h (MAX_MEM_FOR_RS_ALIGN_CODE): New.
+ (HANDLE_ALIGN): New.
+ (rl78_handle_align): Declare.
+
+ * config/rl78-parse.y (rl78_bit_insn): New. Set it for all bit
+ insn patterns.
+ (find_bit_index): New. Strip .BIT suffix off relevent
+ expressions for bit insns.
+ (rl78_lex): Exclude bit suffixes from expression parsing.
+
+2011-12-21 Nick Clifton <nickc@redhat.com>
+
+ PR gas/13449
+ * config/tc-arm.c (create_unwind_entry): Zero allocated table
+ entries.
+
+2011-12-19 Iain Sandoe <idsandoe@googlemail.com>
+
+ * config/obj-macho.c (obj_mach_o_section): Account for target-
+ dependent section types. Improve error handling when wrong section
+ types/attributes are specified.
+
+2011-12-19 Chung-Lin Tang <cltang@codesourcery.com>
+
+ * config/tc-mips.c (mips_pseudo_table): Add tprelword/tpreldword
+ entries.
+ (mips16_percent_op): Add MIPS16 TLS relocation ops.
+ (md_apply_fix): Add BFD_RELOC_MIPS16_TLS_* switch cases.
+ (s_tls_rel_directive): Rename from s_dtprel_internal(). Abstract out
+ directive string and reloc type as function parameters. Update
+ comments.
+ (s_dtprelword,s_dtpreldword): Change to use s_tls_rel_directive().
+ (s_tprelword,s_tpreldword): New functions.
+
+2011-12-15 Tristan Gingold <gingold@adacore.com>
+
+ * config/obj-macho.c (obj_mach_o_fileprop): Fix typo.
+
+2011-12-15 Konstantin Belousov <kib@FreeBSD.org>
+
+ * config/obj-elf.c (obj_elf_type): Add ELFOSABI_FREEBSD to the
+ supported abi's.
+
+2011-12-15 Iain Sandoe <iains@gcc.gnu.org>
+
+ * config/obj-macho.c (obj_mach_o_subsections_by_symbols): New global.
+ (obj_mach_o_file_properties): New enum.
+ (obj_mach_o_subsections_via_symbols): Generalize name to...
+ ... (obj_mach_o_fileprop) and use to set subsections_via_symbols.
+
+2011-12-14 Stuart Henderson <shenders@gcc.gnu.org>
+
+ * config/bfin-parse.y (asm_1): set SRCx fields to all 1s for
+ dspalu32 instrs that don't use them.
+
+2011-12-14 Nick Clifton <nickc@redhat.com>
+
+ * config/tc-cris.c (md_convert_frag): Mark the length_code local
+ variable as unused as it is only used when ENABLE_CHECKING is on.
+
+2011-12-14 Iain Sandoe <iains@gcc.gnu.org>
+
+ * config/obj-macho.c: Add some more top-level comments.
+ (collect_16char_name): New.
+ (obj_mach_o_section): Amend to allow syntax compatible with
+ existing system tools. Use section translation data when available.
+ (obj_mach_o_segT_from_bfd_name): New.
+ (known_sections): Update.
+ (obj_mach_o_known_section): Use obj_mach_o_segT_from_bfd_name.
+ (objc_sections): New.
+ (obj_mach_o_objc_section): New.
+ (debug_sections): New.
+ (obj_mach_o_debug_section): New.
+ (tgt_sections): New.
+ (obj_mach_o_opt_tgt_section): New.
+ (obj_mach_o_base_section): New.
+ (obj_mach_o_common_parse): Update to create BSS on demand and to handle
+ lcomm optional alignment param.
+ (obj_mach_o_comm): Update parameter name.
+ (obj_mach_o_placeholder): New.
+ (mach_o_pseudo_table): Update for GCC section directives.
+ * config/obj-macho.h (_OBJ_MACH_O_H): New.
+ (USE_ALIGN_PTWO): Define.
+ (S_SET_ALIGN) Define.
+
+2011-12-13 Andrew Burgess <aburgess@broadcom.com>
+
+ * doc/internals.texi (TC_FORCE_RELOCATION_SUB_SAME): Update
+ to match code.
+
+2011-12-08 Andrew Pinski <apinski@cavium.com>
+ Adam Nemet <anemet@caviumnetworks.com>
+
+ * tc-mips.c (CPU_IS_OCTEON): Add Octeon2.
+ (mips_cpu_info_table): Add Octeon2.
+ * doc/c-mips.texi: Document octeon2 as an acceptable value for -march=.
+
+2011-12-07 Sameera Deshpande <sameera.deshpande@arm.com>
+
+ * config/tc-arm.c (do_t_ldstd): Warn for unpredictable cases.
+
+2011-11-07 Matthew Gretton-Dann <matthew.gretton-dann@arm.com>
+
+ * config/tc-arm.c (ARM_IT_MAX_OPERANDS): New define.
+ (arm_it): Use ARM_IT_MAX_OPERANDS.
+ (neon_select_shape): Ensure we have matched all operands.
+
+2011-11-07 Matthew Gretton-Dann <matthew.gretton-dann@arm.com>
+
+ * config/tc-arm.c (parse_neon_mov): Update which_operand
+ correctly.
+
+2011-12-05 Richard Earnshaw <rearnsha@arm.com>
+
+ * tc-arm.c (aeabi_set_public_attributes): Correctly set
+ Tag_ARM_ISA_use and Tag_Thumb_ISA_use.
+
+2011-11-30 Matthew Gretton-Dann <matthew.gretton-dann@arm.com>
+
+ * config/tc-arm.c (arm_cpu_option_table): Add name_len field.
+ (arm_arch_option_table): Likewise.
+ (arm_option_extension_value_table): Likewise.
+ (ARM_CPU_OPT): New define.
+ (ARM_ARCH_OPT): Likewise.
+ (ARM_EXT_OPT): Likewise.
+ (arm_cpus): Use ARM_CPU_OPT to initialize.
+ (arm_archs): Use ARM_ARCH_OPT to initialize.
+ (arm_extensions): Use ARM_EXT_OPT to initialize.
+ (arm_parse_extension): Ensure option string matching matches
+ the whole string.
+ (arm_parse_cpu): Likewise.
+ (arm_parse_arch): Likewise.
+
+2011-11-29 Andrew Pinski <apinski@cavium.com>
+
+ * config/tc-mips.c (CPU_IS_OCTEON): New macro function.
+ (CPU_HAS_SEQ): Change to use CPU_IS_OCTEON.
+ (NO_ISA_COP): Likewise.
+ (macro) <ld_st>: Add support when off0 is true.
+ Add support for M_SAA_AB, M_SAA_OB, M_SAAD_OB and M_SAAD_AB.
+ (mips_cpu_info_table): Add octeon+.
+ * doc/c-mips.texi: Document octeon+ as an acceptable value for -march=.
+
+2011-11-25 Matthew Gretton-Dann <matthew.gretton-dann@arm.com>
+
+ * config/tc-arm.c (do_t_mov_cmp): Allow MOV lowreg, lowreg when no CPU
+ is specified.
+
+2011-11-23 Tristan Gingold <gingold@adacore.com>
+
+ * config/tc-alpha.c (s_alpha_prologue): Requires empty line.
+
+2011-11-23 Tristan Gingold <gingold@adacore.com>
+
+ * config/tc-alpha.c (s_alpha_frame): Emit a warning if bad value
+ of RA.
+ (s_alpha_pdesc): Adjust comment.
+
+2011-11-23 Thomas Klein <th.r.klein@web.de>
+
+ * config/tc-arm.c (do_t_mov_cmp): Prevent emitting code for MOV
+ with two low register at arch v4t or v5t when assember using
+ unified syntax.
+
+2011-11-21 DJ Delorie <dj@redhat.com>
+
+ * config/rl78-defs.h (rl78_error): Add "const".
+ * config/rl78-parse.y (rl78_error): Likewise.
+
+2011-11-21 Andreas Tobler <andreast@fgznet.ch>
+
+ * config/tc-ppc.c (ppc_target_format): Add format for powerpc*-freebsd.
+
+2011-11-16 David S. Miller <davem@davemloft.net>
+
+ * config/tc-sparc.c (md_apply_fix): Handle BFD_RELOC_8.
+
+2011-11-16 Maciej W. Rozycki <macro@codesourcery.com>
+
+ * config/tc-mips.c (macro): Fix unsupported opcode message
+ capitalization.
+ (mips_ip, mips16_ip): Likewise.
+
+2011-11-16 Maciej W. Rozycki <macro@codesourcery.com>
+
+ * config/tc-mips.c (ISA_SUPPORTS_MCU_ASE): Also set if microMIPS
+ mode.
+
+2011-11-16 Maciej W. Rozycki <macro@codesourcery.com>
+
+ * config/tc-mips.c (macro_build_jalr): Reverse a negative
+ conditional.
+ (mips_ip): Likewise.
+
+2011-11-16 Catherine Moore <clm@codesourcery.com>
+ Maciej W. Rozycki <macro@codesourcery.com>
+
+ * config/tc-mips.c (mips_cpu_info_table): Add "m14ke" and
+ "m14kec".
+ * doc/c-mips.texi (MIPS architecture options): Add "m14ke" and
+ "m14kec" to the list of -march options.
+
+2011-11-15 Maciej W. Rozycki <macro@codesourcery.com>
+
+ * write.c (dump_section_relocs): Don't convert PC-relative relocs
+ that have an in-place addend narrower than the addresses used.
+
+2011-11-14 Maciej W. Rozycki <macro@codesourcery.com>
+
+ * config/tc-mips.c (can_swap_branch_p): Exclude microMIPS
+ variant frags too.
+
+2011-11-07 Matthew Gretton-Dann <matthew.gretton-dann@arm.com>
+
+ * config/tc-arm.c (arm_cpus): Add cortex-a7 entry.
+ * doc/c-arm.texi (ARM Options): Add cortex-a7 to list of accepted
+ CPUs.
+
+2011-11-04 DJ Delorie <dj@redhat.com>
+
+ * doc/c-rl78.texi (RL78-Float): Remove unused menu entry.
+
2011-11-02 DJ Delorie <dj@redhat.com>
* config/tc-rl78.c (tc_gen_reloc): Remove unused variable.
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