+2011-12-22 DJ Delorie <dj@redhat.com>
+
+ * config/rl78-defs.h (rl78_linkrelax_addr16): Add.
+ (rl78_linkrelax_dsp, rl78_linkrelax_imm): Remove.
+ * config/rl78-parse.y: Tag all addr16 and branch patterns with
+ relaxation markers.
+ * config/tc-rl78.c (rl78_linkrelax_addr16): New.
+ (rl78_linkrelax_branch): New.
+ (OPTION_RELAX): New.
+ (md_longopts): Add relax option.
+ (md_parse_option): Add OPTION_RELAX.
+ (rl78_frag_init): Support relaxation.
+ (rl78_handle_align): New.
+ (md_assemble): Support relaxation.
+ (md_apply_fix): Likewise.
+ (md_convert_frag): Likewise.
+ * config/tc-rl78.h (MAX_MEM_FOR_RS_ALIGN_CODE): New.
+ (HANDLE_ALIGN): New.
+ (rl78_handle_align): Declare.
+
+ * config/rl78-parse.y (rl78_bit_insn): New. Set it for all bit
+ insn patterns.
+ (find_bit_index): New. Strip .BIT suffix off relevent
+ expressions for bit insns.
+ (rl78_lex): Exclude bit suffixes from expression parsing.
+
+2011-12-21 Nick Clifton <nickc@redhat.com>
+
+ PR gas/13449
+ * config/tc-arm.c (create_unwind_entry): Zero allocated table
+ entries.
+
+2011-12-19 Iain Sandoe <idsandoe@googlemail.com>
+
+ * config/obj-macho.c (obj_mach_o_section): Account for target-
+ dependent section types. Improve error handling when wrong section
+ types/attributes are specified.
+
+2011-12-19 Chung-Lin Tang <cltang@codesourcery.com>
+
+ * config/tc-mips.c (mips_pseudo_table): Add tprelword/tpreldword
+ entries.
+ (mips16_percent_op): Add MIPS16 TLS relocation ops.
+ (md_apply_fix): Add BFD_RELOC_MIPS16_TLS_* switch cases.
+ (s_tls_rel_directive): Rename from s_dtprel_internal(). Abstract out
+ directive string and reloc type as function parameters. Update
+ comments.
+ (s_dtprelword,s_dtpreldword): Change to use s_tls_rel_directive().
+ (s_tprelword,s_tpreldword): New functions.
+
+2011-12-15 Tristan Gingold <gingold@adacore.com>
+
+ * config/obj-macho.c (obj_mach_o_fileprop): Fix typo.
+
+2011-12-15 Konstantin Belousov <kib@FreeBSD.org>
+
+ * config/obj-elf.c (obj_elf_type): Add ELFOSABI_FREEBSD to the
+ supported abi's.
+
+2011-12-15 Iain Sandoe <iains@gcc.gnu.org>
+
+ * config/obj-macho.c (obj_mach_o_subsections_by_symbols): New global.
+ (obj_mach_o_file_properties): New enum.
+ (obj_mach_o_subsections_via_symbols): Generalize name to...
+ ... (obj_mach_o_fileprop) and use to set subsections_via_symbols.
+
+2011-12-14 Stuart Henderson <shenders@gcc.gnu.org>
+
+ * config/bfin-parse.y (asm_1): set SRCx fields to all 1s for
+ dspalu32 instrs that don't use them.
+
+2011-12-14 Nick Clifton <nickc@redhat.com>
+
+ * config/tc-cris.c (md_convert_frag): Mark the length_code local
+ variable as unused as it is only used when ENABLE_CHECKING is on.
+
+2011-12-14 Iain Sandoe <iains@gcc.gnu.org>
+
+ * config/obj-macho.c: Add some more top-level comments.
+ (collect_16char_name): New.
+ (obj_mach_o_section): Amend to allow syntax compatible with
+ existing system tools. Use section translation data when available.
+ (obj_mach_o_segT_from_bfd_name): New.
+ (known_sections): Update.
+ (obj_mach_o_known_section): Use obj_mach_o_segT_from_bfd_name.
+ (objc_sections): New.
+ (obj_mach_o_objc_section): New.
+ (debug_sections): New.
+ (obj_mach_o_debug_section): New.
+ (tgt_sections): New.
+ (obj_mach_o_opt_tgt_section): New.
+ (obj_mach_o_base_section): New.
+ (obj_mach_o_common_parse): Update to create BSS on demand and to handle
+ lcomm optional alignment param.
+ (obj_mach_o_comm): Update parameter name.
+ (obj_mach_o_placeholder): New.
+ (mach_o_pseudo_table): Update for GCC section directives.
+ * config/obj-macho.h (_OBJ_MACH_O_H): New.
+ (USE_ALIGN_PTWO): Define.
+ (S_SET_ALIGN) Define.
+
+2011-12-13 Andrew Burgess <aburgess@broadcom.com>
+
+ * doc/internals.texi (TC_FORCE_RELOCATION_SUB_SAME): Update
+ to match code.
+
+2011-12-08 Andrew Pinski <apinski@cavium.com>
+ Adam Nemet <anemet@caviumnetworks.com>
+
+ * tc-mips.c (CPU_IS_OCTEON): Add Octeon2.
+ (mips_cpu_info_table): Add Octeon2.
+ * doc/c-mips.texi: Document octeon2 as an acceptable value for -march=.
+
+2011-12-07 Sameera Deshpande <sameera.deshpande@arm.com>
+
+ * config/tc-arm.c (do_t_ldstd): Warn for unpredictable cases.
+
+2011-11-07 Matthew Gretton-Dann <matthew.gretton-dann@arm.com>
+
+ * config/tc-arm.c (ARM_IT_MAX_OPERANDS): New define.
+ (arm_it): Use ARM_IT_MAX_OPERANDS.
+ (neon_select_shape): Ensure we have matched all operands.
+
+2011-11-07 Matthew Gretton-Dann <matthew.gretton-dann@arm.com>
+
+ * config/tc-arm.c (parse_neon_mov): Update which_operand
+ correctly.
+
+2011-12-05 Richard Earnshaw <rearnsha@arm.com>
+
+ * tc-arm.c (aeabi_set_public_attributes): Correctly set
+ Tag_ARM_ISA_use and Tag_Thumb_ISA_use.
+
+2011-11-30 Matthew Gretton-Dann <matthew.gretton-dann@arm.com>
+
+ * config/tc-arm.c (arm_cpu_option_table): Add name_len field.
+ (arm_arch_option_table): Likewise.
+ (arm_option_extension_value_table): Likewise.
+ (ARM_CPU_OPT): New define.
+ (ARM_ARCH_OPT): Likewise.
+ (ARM_EXT_OPT): Likewise.
+ (arm_cpus): Use ARM_CPU_OPT to initialize.
+ (arm_archs): Use ARM_ARCH_OPT to initialize.
+ (arm_extensions): Use ARM_EXT_OPT to initialize.
+ (arm_parse_extension): Ensure option string matching matches
+ the whole string.
+ (arm_parse_cpu): Likewise.
+ (arm_parse_arch): Likewise.
+
+2011-11-29 Andrew Pinski <apinski@cavium.com>
+
+ * config/tc-mips.c (CPU_IS_OCTEON): New macro function.
+ (CPU_HAS_SEQ): Change to use CPU_IS_OCTEON.
+ (NO_ISA_COP): Likewise.
+ (macro) <ld_st>: Add support when off0 is true.
+ Add support for M_SAA_AB, M_SAA_OB, M_SAAD_OB and M_SAAD_AB.
+ (mips_cpu_info_table): Add octeon+.
+ * doc/c-mips.texi: Document octeon+ as an acceptable value for -march=.
+
+2011-11-25 Matthew Gretton-Dann <matthew.gretton-dann@arm.com>
+
+ * config/tc-arm.c (do_t_mov_cmp): Allow MOV lowreg, lowreg when no CPU
+ is specified.
+
+2011-11-23 Tristan Gingold <gingold@adacore.com>
+
+ * config/tc-alpha.c (s_alpha_prologue): Requires empty line.
+
+2011-11-23 Tristan Gingold <gingold@adacore.com>
+
+ * config/tc-alpha.c (s_alpha_frame): Emit a warning if bad value
+ of RA.
+ (s_alpha_pdesc): Adjust comment.
+
+2011-11-23 Thomas Klein <th.r.klein@web.de>
+
+ * config/tc-arm.c (do_t_mov_cmp): Prevent emitting code for MOV
+ with two low register at arch v4t or v5t when assember using
+ unified syntax.
+
+2011-11-21 DJ Delorie <dj@redhat.com>
+
+ * config/rl78-defs.h (rl78_error): Add "const".
+ * config/rl78-parse.y (rl78_error): Likewise.
+
+2011-11-21 Andreas Tobler <andreast@fgznet.ch>
+
+ * config/tc-ppc.c (ppc_target_format): Add format for powerpc*-freebsd.
+
+2011-11-16 David S. Miller <davem@davemloft.net>
+
+ * config/tc-sparc.c (md_apply_fix): Handle BFD_RELOC_8.
+
+2011-11-16 Maciej W. Rozycki <macro@codesourcery.com>
+
+ * config/tc-mips.c (macro): Fix unsupported opcode message
+ capitalization.
+ (mips_ip, mips16_ip): Likewise.
+
+2011-11-16 Maciej W. Rozycki <macro@codesourcery.com>
+
+ * config/tc-mips.c (ISA_SUPPORTS_MCU_ASE): Also set if microMIPS
+ mode.
+
+2011-11-16 Maciej W. Rozycki <macro@codesourcery.com>
+
+ * config/tc-mips.c (macro_build_jalr): Reverse a negative
+ conditional.
+ (mips_ip): Likewise.
+
+2011-11-16 Catherine Moore <clm@codesourcery.com>
+ Maciej W. Rozycki <macro@codesourcery.com>
+
+ * config/tc-mips.c (mips_cpu_info_table): Add "m14ke" and
+ "m14kec".
+ * doc/c-mips.texi (MIPS architecture options): Add "m14ke" and
+ "m14kec" to the list of -march options.
+
+2011-11-15 Maciej W. Rozycki <macro@codesourcery.com>
+
+ * write.c (dump_section_relocs): Don't convert PC-relative relocs
+ that have an in-place addend narrower than the addresses used.
+
+2011-11-14 Maciej W. Rozycki <macro@codesourcery.com>
+
+ * config/tc-mips.c (can_swap_branch_p): Exclude microMIPS
+ variant frags too.
+
+2011-11-07 Matthew Gretton-Dann <matthew.gretton-dann@arm.com>
+
+ * config/tc-arm.c (arm_cpus): Add cortex-a7 entry.
+ * doc/c-arm.texi (ARM Options): Add cortex-a7 to list of accepted
+ CPUs.
+
+2011-11-04 DJ Delorie <dj@redhat.com>
+
+ * doc/c-rl78.texi (RL78-Float): Remove unused menu entry.
+
+2011-11-02 DJ Delorie <dj@redhat.com>
+
+ * config/tc-rl78.c (tc_gen_reloc): Remove unused variable.
+
+2011-11-02 Nick Clifton <nickc@redhat.com>
+
+ * config/tc-arm.c (md_begin): Remove ARM_PLT32 reloc associated
+ with the (PLT) instruction suffix when operating in eabi mode.
+ * doc/c-arm.texi (ARM_Relocations): Extend description of (PLT)
+ suffix.
+
+2011-11-01 DJ Delorie <dj@redhat.com>
+
+ * Makefile.am (TARGET_CPU_CFILES): Add tc-rl78.c.
+ (TARGET_CPU_HFILES): Add rc-rl78.h.
+ (EXTRA_DIST): Add rl78-parse.c and rl78-parse.y.
+ (rl78-parse.c, rl78-parse.h, rl78-parse.o, rl78-defs.h): New rules.
+ * Makefile.in: Regenerate.
+ * configure.in: Add rl78 case.
+ * configure: Regenerate.
+ * configure.tgt: Add rl78 case.
+ * config/rl78-defs.h: New file.
+ * config/rl78-parse.y: New file.
+ * config/tc-rl78.c: New file.
+ * config/tc-rl78.h: New file.
+ * NEWS: Add Renesas RL78.
+
+ * doc/Makefile.am (c-rl78.texi): New.
+ * doc/Makefile.in: Likewise.
+ * doc/all.texi: Enable it.
+ * doc/as.texi: Add it.
+ * doc/c-rl78.texi: New file.
+
+2011-10-28 Walter Lee <walt@tilera.com>
+
+ * NEWS: Fix TILEPro capitalization.
+ * config/tc-tilegx.c (emit_tilegx_instruction) Handle
+ relocations of aliases.
+ * config/tc-tilepro.c: (emit_tilepro_instruction) Likewise.
+
+2011-10-28 Nick Clifton <nickc@redhat.com>
+
+ * po/ja.po: New Japanese translation.
+ * configure.in (ALL_LINGUAS): Add ja.
+ * configure: Regenerate.
+
+2011-10-26 Joern Rennecke <joern.rennecke@embecosm.com>
+
+ * doc/as.texinfo [EPIPHANY]: Include c-epiphany.texi to avoid
+ duplication.
+
+2011-10-25 Mike Frysinger <vapier@gentoo.org>
+
+ * config/rx-defs.h (rx_error): Add const to first arg.
+ * config/rx-parse.y (rx_error): Likewise.
+
+2011-10-25 Nick Clifton <nickc@redhat.com>
+
+ * config/tc-ns32k.c (md_begin): Rename local variable 'stat' to
+ 'status'.
+
+2011-10-25 Joern Rennecke <joern.rennecke@embecosm.com>
+
+ * NEWS: Mention addition of Adapteva Epiphany support.
+ * config/tc-epiphany.c: New file.
+ * config/tc-epiphany.h: New file.
+ * Makefile.am (TARGET_CPU_CFILES): Add config/tc-epiphany.c .
+ (TARGET_CPU_HFILES): Add config/tc-epiphany.h .
+ * configure.in: Also set using_cgen for epiphany.
+ * configure.tgt: Handle epiphany.
+ * doc/Makefile.am (CPU_DOCS): Add c-epiphany.texi .
+ * doc/all.texi: Set EPIPHANY.
+ * doc/as.texinfo: Add EPIPHANY-specific text.
+ * doc/c-epiphany.texi: New file.
+ * po/gas.pot: Regenerate.
+ * Makefile.in: Regenerate.
+ * configure: Regenerate.
+ * doc/Makefile.in: Regenerate.
+ * po/POTFILES.in: Regenerate.
+
+2011-10-24 Maciej W. Rozycki <macro@codesourcery.com>
+
+ * config/tc-mips.c (move_register): Fix formatting.
+
+2011-10-24 Maciej W. Rozycki <macro@codesourcery.com>
+
+ * config/tc-mips.c (can_swap_branch_p): Remove empty line.
+ (start_noreorder): Likewise.
+
+2011-10-24 Maciej W. Rozycki <macro@codesourcery.com>
+
+ * config/tc-mips.c (s_option): Fix formatting.
+ (mips_elf_final_processing): Likewise.
+
+2011-10-24 Maciej W. Rozycki <macro@codesourcery.com>
+
+ * config/tc-mips.c (validate_micromips_insn): Fix formatting.
+
+2011-10-24 David Binderman <dcb314@hotmail.com>
+
+ * config/tc-mn10200.c (md_convert_frag): Add missing break.
+
+2011-10-21 Tristan Gingold <gingold@adacore.com>
+
+ * config/tc-alpha.c (load_expression): Use symbol_mark_used accessor.
+ (s_alpha_comm): Use symbol_set_frag accessor.
+
+2011-10-20 Alan Modra <amodra@gmail.com>
+
+ * config/tc-mips.c (micromips_add_label): Avoid gcc warning.
+ (md_convert_frag): Likewise.
+
+2011-10-18 Jie Zhang <jie@codesourcery.com>
+ Julian Brown <julian@codesourcery.com>
+
+ * config/tc-arm.c (parse_shifter_operand): Fix handling of explicit
+ rotation.
+ (encode_arm_shifter_operand): Likewise.
+
+2011-10-13 James Greenhalgh <james.greenhalgh@arm.com>
+
+ * config/tc-arm.c (check_ldr_r15_aligned): New.
+ (do_ldst): Warn in upredictable cases.
+ (do_t_ldst): Likewise.
+ (insns): Update accordingly.
+
+2011-10-13 Alan Modra <amodra@gmail.com>
+
+ * as.c (main): Define .gasversion. rather than __GAS_VERSION__.
+ * frags.h (bss_address_frag): Delete
+ (predefined_address_frag): New.
+ * frags.c (frag_init): Init predefined_address_frag. Delete ref
+ to bss_address_frag.
+ * symbols.c (S_CAN_BE_REDEFINED): New function.
+ * symbols.h (S_CAN_BE_REDEFINED): Declare.
+ * read.c (assign_symbol): Use S_CAN_BE_REDEFINED.
+
+2011-10-12 Alan Modra <amodra@gmail.com>
+
+ * symbols.c (local_symbol_make): Make global.
+ * symbols.h (local_symbol_make): Declare.
+ * as.c (main): Define __GAS_VERSION__.
+
+2011-10-10 Nick Clifton <nickc@redhat.com>
+
+ * po/es.po: Updated Spanish translation.
+ * po/fi.po: Updated Finnish translation.
+ * po/fr.po: Updated French translation.
+
+2011-10-05 DJ Delorie <dj@redhat.com>
+ Nick Clifton <nickc@redhat.com>
+
+ * config/rx-defs.h (rx_pid_register): New.
+ (rx_gp_register): New.
+ * config/rx-parse.y (rx_lex): Add support for %gpreg and %pidreg.
+ (displacement): Add PID support.
+ * config/tc-rx.c (rx_pid_mode): New.
+ (rx_num_int_regs): New.
+ (rx_pid_register): New.
+ (rx_gp_register): New.
+ (options): Add -mpid and -mint-register= options.
+ (md_longopts): Likewise.
+ (md_parse_option): Likewise.
+ (md_show_usage): Likewise.
+ (rx_pid_symbol): New.
+ (rx_pidreg_symbol): New.
+ (rx_gpreg_symbol): New.
+ (md_begin): Support PID.
+ (rx_validate_fix_sub): Support PID.
+ (tc_gen_reloc): Support PID.
+ * doc/c-rx.texi: Document PID support.
+
+2011-09-27 Kai Tietz <ktietz@redhat.com>
+
+ * config/obj-coff.c (obj_coff_section): Add 'e' as specifier
+ for marking section SEC_EXCLUDE.
+
+2011-09-22 Tristan Gingold <gingold@adacore.com>
+
+ * NEWS: Add marker for 2.22.
+
+2011-09-21 David S. Miller <davem@davemloft.net>
+
+ * config/tc-sparc.c (hwcap_allowed): New.
+ (struct sparc_arch): New field 'hwcap_allowed' containing a bitmask
+ of F_FOO flags which are enabled by the particular arch setting.
+ Add new options that provide explicit access to new instructions.
+ (md_parse_option): Only bump max_architecture if the requested one
+ is larger, or this is the first explicit request.
+ (get_hwcap_name): New function.
+ (sparc_ip): Validate that hwcaps used by an instruction have actually
+ been enabled.
+ * doc/c-sparc.texi: Document new sparc options.
+
+2011-09-21 David S. Miller <davem@davemloft.net>
+
+ * config/tc-sparc.c (hwcap_seen): New bitmask, defined when
+ not TE_SOLARIS.
+ (sparc_ip): When not TE_SOLARIS, accumulate hwcap bits from
+ sparc_opcode->flags of instruction into hwcap_seen.
+ (sparc_md_end): Create Tag_GNU_Sparc_HWCAPS attribute if
+ hwcap_seen is non-zero and not TE_SOLARIS.
+
+2011-09-19 Tristan Gingold <gingold@adacore.com>
+
+ * config/tc-alpha.c (insert_operand): Call as_bad_value_out_of_range
+ instead of as_warn_out_of_range.
+
+2011-09-08 Mark Fortescue <mark@mtfhpc.demon.co.uk>
+
+ * config/tc-sparc.c (sparc_ip): Handle 'i' + r<0..31>
+ in addition to 'i' + [goli]<0..7>.
+
+2011-09-08 Joern Rennecke <joern.rennecke@embecosm.com>
+
+ * cgen.c (gas_cgen_pcrel_r_type): New function.
+ (gas_cgen_tc_gen_reloc): Check for GAS_CGEN_PCREL_R_TYPE.
+ * cgen.h (gas_cgen_pcrel_r_type): Declare.
+
+2011-09-08 Richard Sandiford <rdsandiford@googlemail.com>
+
+ PR gas/13167
+ * dwarf2dbg.c (dwarf2_flush_pending_lines): Use symbol_temp_new_now.
+
+2011-09-05 Richard Sandiford <rdsandiford@googlemail.com>
+
+ PR gas/13024
+ * dwarf2dbg.c (pending_lines, pending_lines_tail): New variables.
+ (dwarf2_gen_line_info_1): Delete.
+ (dwarf2_push_line, dwarf2_flush_pending_lines): New functions.
+ (dwarf2_gen_line_info, dwarf2_emit_label): Use them.
+ (dwarf2_consume_line_info): Call dwarf2_flush_pending_lines.
+ (dwarf2_directive_loc): Push previous .locs instead of generating
+ them immediately.
+
+2011-08-26 Nick Clifton <nickc@redhat.com>
+
+ * po/es.po: Updated Spanish translation.
+
+2011-08-26 Tristan Gingold <gingold@adacore.com>
+
+ * config/tc-alpha.c (s_alpha_linkage): Simplify. Add comments.
+
+2011-08-26 Tristan Gingold <gingold@adacore.com>
+
+ * config/tc-alpha.c (add_to_link_pool): Improve comment.
+ (s_alpha_fp_save): Fix indentation.
+
+2011-08-19 Nick Clifton <nickc@redhat.com>
+
+ * doc/as.texinfo: Include c-xstormy16.texi.
+
+2011-08-18 Alan Modra <amodra@gmail.com>
+
+ * write.c (resolve_reloc_expr_symbols): Convert local symbols
+ on relocs to section+offset.
+ (get_frag_for_reloc): New function.
+ (write_relocs): Merge sort fixup relocs with those from .reloc
+ directives.
+
+2011-08-10 Maciej W. Rozycki <macro@codesourcery.com>
+
+ * config/tc-mips.c (can_swap_branch_p): Update the comment on
+ MIPS16 fixups.
+
+2011-08-09 Chao-ying Fu <fu@mips.com>
+ Daniel Jacobowitz <dan@codesourcery.com>
+
+ * config/tc-mips.c (mips_cpu_info_table): Add "m14k" and
+ "m14kc".
+ * doc/c-mips.texi (MIPS architecture options): Add "m14k" and
+ "m14kc" to the list of -march options.
+
+2011-08-09 Chao-ying Fu <fu@mips.com>
+ Maciej W. Rozycki <macro@codesourcery.com>
+
+ * config/tc-mips.c (mips_set_options): Add ase_mcu.
+ (mips_opts): Initialise ase_mcu to -1.
+ (ISA_SUPPORTS_MCU_ASE): New macro.
+ (MIPS_CPU_ASE_MCU): Likewise.
+ (is_opcode_valid): Handle MCU.
+ (macro_build, macro): Likewise.
+ (validate_mips_insn, validate_micromips_insn): Likewise.
+ (mips_ip): Likewise.
+ (options): Add OPTION_MCU and OPTION_NO_MCU.
+ (md_longopts): Add mmcu and mno-mcu.
+ (md_parse_option): Handle OPTION_MCU and OPTION_NO_MCU.
+ (mips_after_parse_args): Handle MCU.
+ (s_mipsset): Likewise.
+ (md_show_usage): Handle MCU options.
+
+ * doc/as.texinfo: Document -mmcu and -mno-mcu options.
+ * doc/c-mips.texi: Likewise, and document ".set mcu" and
+ ".set nomcu" directives.
+
+2011-08-09 Maciej W. Rozycki <macro@codesourcery.com>
+
+ * config/tc-mips.c (gpr_mod_mask): Remove INSN2_MOD_GPR_MB,
+ INSN2_MOD_GPR_MC, INSN2_MOD_GPR_ME, INSN2_MOD_GPR_MG,
+ INSN2_MOD_GPR_MHI, INSN2_MOD_GPR_MJ, INSN2_MOD_GPR_MM,
+ INSN2_MOD_GPR_MN, INSN2_MOD_GPR_MP and INSN2_MOD_GPR_MQ opcode
+ register use checks.
+ (gpr_read_mask): Add INSN2_READ_GPR_MC, INSN2_READ_GPR_ME
+ INSN2_READ_GPR_MG, INSN2_READ_GPR_MJ, INSN2_READ_GPR_MMN,
+ INSN2_READ_GPR_MP and INSN2_READ_GPR_MQ opcode register use
+ checks.
+ (gpr_write_mask): Replace INSN2_WRITE_GPR_S opcode register
+ use flag with INSN_WRITE_GPR_S. Add INSN2_WRITE_GPR_MB,
+ INSN2_WRITE_GPR_MHI, INSN2_WRITE_GPR_MJ and INSN2_WRITE_GPR_MP
+ opcode register use checks.
+ (can_swap_branch_p): Enable microMIPS branch swapping.
+ (append_insn): Likewise.
+
+2011-08-09 Maciej W. Rozycki <macro@codesourcery.com>
+
+ * config/tc-mips.c (RELAX_MICROMIPS_ENCODE): Remove forced 16-bit
+ branch size information.
+ (RELAX_MICROMIPS_U16BIT): Remove macro.
+ (RELAX_MICROMIPS_UNCOND): Adjust accordingly.
+ (RELAX_MICROMIPS_COMPACT, RELAX_MICROMIPS_LINK): Likewise.
+ (RELAX_MICROMIPS_RELAX32): Likewise.
+ (RELAX_MICROMIPS_TOOFAR16): Likewise.
+ (RELAX_MICROMIPS_MARK_TOOFAR16): Likewise.
+ (RELAX_MICROMIPS_CLEAR_TOOFAR16): Likewise.
+ (RELAX_MICROMIPS_TOOFAR32): Likewise.
+ (RELAX_MICROMIPS_MARK_TOOFAR32): Likewise.
+ (RELAX_MICROMIPS_CLEAR_TOOFAR32): Likewise.
+ (append_insn): Always check forced_insn_length for microMIPS
+ relaxation. Adjust code for the removal of
+ RELAX_MICROMIPS_U16BIT.
+ (mips_ip) <'D', 'E'>: If forced_insn_length, then emit the
+ relocation straight away.
+ (relaxed_micromips_16bit_branch_length): Adjust code for the
+ removal of RELAX_MICROMIPS_U16BIT.
+
+2011-08-08 Tristan Gingold <gingold@adacore.com>
+
+ * config/obj-macho.c (obj_mach_o_section): New function.
+ (struct known_section): New type.
+ (known_sections): Declare.
+ (obj_mach_o_known_section): New function.
+ (obj_mach_o_common_parse): Ditto.
+ (obj_mach_o_comm): Ditto.
+ (obj_mach_o_subsections_via_symbols): Ditto.
+ (mach_o_pseudo_table): Add new pseudos.
+
+2011-08-06 Richard Henderson <rth@redhat.com>
+
+ * dw2gencfi.c (all_fde_data): Export.
+ * dw2gencfi.h (all_fde_data): Declare.
+ * config/tc-alpha.c (alpha_elf_md_end): Don't convert legacy unwind
+ info to cfi unwind info if the user already has supplied some.
+
+2011-08-06 Richard Sandiford <rdsandiford@googlemail.com>
+
+ * config/tc-mips.c (emit_nop): Delete.
+ (get_delay_slot_nop): New function.
+ (nops_for_insn_or_target): Use it.
+ (append_insn): Likewise. When avoiding hazards, call add_fixed_insn
+ and insert_into_history directly.
+
+2011-08-06 Richard Sandiford <rdsandiford@googlemail.com>
+
+ * config/tc-mips.c (delayed_branch_p, compact_branch_p)
+ (uncond_branch_p, branch_likely_p): New functions.
+ (insns_between, nops_for_insn_or_target, append_insn)
+ (macro_start): Use them.
+ (get_append_method): Likewise. Remove redundant test.
+
+2011-08-05 David S. Miller <davem@davemloft.net>
+
+ * config/tc-sparc.c (v9a_asr_table): Add "cps".
+ (sparc_ip): Handle '4', '5' and '(' format codes.
+
+2011-08-04 H.J. Lu <hongjiu.lu@intel.com>
+
+ PR gas/13056
+ * output-file.c (output_file_close): Call bfd_cache_close_all
+ on error.
+
+ * write.c (write_object_file): Revert the last change.
+
+2011-08-04 Alan Modra <amodra@gmail.com>
+
+ * write.c (write_object_file): Call set_symtab even if we had
+ errors.
+
+2011-08-04 Tristan Gingold <gingold@adacore.com>
+
+ * config/obj-elf.c (obj_elf_section): Do not free name.
+
+2011-08-03 James Greenhalgh <james.greenhalgh@arm.com>
+
+ * config/tc-arm.c (do_t_strexbh): New.
+ (insns): Update accordingly.
+
+2011-08-01 H.J. Lu <hongjiu.lu@intel.com>
+
+ PR ld/13048
+ * config/tc-i386.c (handle_quad): Removed.
+ (md_pseudo_table): Remove "quad".
+ (tc_gen_reloc): Don't check BFD_RELOC_64 for disallow_64bit_reloc.
+ (x86_dwarf2_addr_size): New.
+
+ * config/tc-i386.h (x86_dwarf2_addr_size): New.
+ (DWARF2_ADDR_SIZE): Likewise.
+
+2011-08-01 Nick Clifton <nickc@redhat.com>
+
+ PR ld/12974
+ * config/tc-arm.c (literal_pool): Add locs field.
+ (add_to_lit_pool): Initialise the locs entry for the new literal.
+ (s_ltorg): Generate a DWARF2 line number entry for each emitted
+ literal pool entry.
+
+2011-08-01 Tristan Gingold <gingold@adacore.com>
+
+ * write.c (write_relocs): Fix -Wshadow in DEBUG3 and DEBUG4.
+
+2011-08-01 Tristan Gingold <gingold@adacore.com>
+
+ * frags.c (frag_grow): Simplify the code.
+
+2011-07-30 Richard Sandiford <rdsandiford@googlemail.com>
+
+ * config/tc-mips.c (nops_for_vr4130): Revert previous commit.
+
+2011-07-29 Maciej W. Rozycki <macro@codesourcery.com>
+
+ * config/tc-mips.c: Adjust comments throughout.
+ (reglist_lookup): Reshape code.
+ (jmp_reloc_p, jalr_reloc_p): Reformat.
+ (got16_reloc_p, hi16_reloc_p, lo16_reloc_p): Handle microMIPS
+ relocations.
+ (gpr_mod_mask): Remove unused variable.
+ (gpr_read_mask, gpr_write_mask): Reshape code.
+ (fpr_read_mask, fpr_write_mask): Likewise.
+ (nops_for_vr4130): Ensure non-microMIPS mode.
+ (can_swap_branch_p): Correct pinfo2 reference. Reshape code.
+ (append_insn): Skip Loongson 2F workaround in MIPS16 mode. Use
+ the outermost operator of a compound relocation to determines
+ the relocated field. Fix formatting.
+ (md_convert_frag): Reshape code.
+
+2011-07-29 Tristan Gingold <gingold@adacore.com>
+
+ * frags.c (frag_var_init): New function.
+ (frag_var): Call frag_var_init to initialize.
+ (frag_variant): Ditto.
+
+2011-07-27 Nathan Sidwell <nathan@codesourcery.com>
+
+ * dwarf2dbg.c (out_debug_line): Ignore non-normal segments, with a
+ warning.
+ * doc/as.texinfo (Offset): Document .offset directive.
+
+2011-07-27 Tristan Gingold <gingold@adacore.com>
+
+ * frags.c (frag_grow): Revert previous patch.
+
+2011-07-26 Kazuhiro Inaoka <kazuhiro.inaoka.ud@renesas.com>
+
+ * config/tc-rx.c (md_convert_frag): Fix encoding of beq.a
+ synthetic instruction.
+
+2011-07-25 Tristan Gingold <gingold@adacore.com>
+
+ * frags.c (frag_grow): Simplify the code.
+
+2011-07-24 Maciej W. Rozycki <macro@codesourcery.com>
+ Chao-ying Fu <fu@mips.com>
+ Richard Sandiford <rdsandiford@googlemail.com>
+
+ * config/tc-mips.h (mips_segment_info): Add one bit for
+ microMIPS.
+ (TC_LABEL_IS_LOCAL): New macro.
+ (mips_label_is_local): New prototype.
+ * config/tc-mips.c (S0, S7): New macros.
+ (emit_branch_likely_macro): New variable.
+ (mips_set_options): Add micromips.
+ (mips_opts): Initialise micromips to -1.
+ (file_ase_micromips): New variable.
+ (CPU_HAS_MICROMIPS): New macro.
+ (hilo_interlocks): Set for microMIPS too.
+ (gpr_interlocks): Likewise.
+ (cop_interlocks): Likewise.
+ (cop_mem_interlocks): Likewise.
+ (HAVE_CODE_COMPRESSION): New macro.
+ (micromips_op_hash): New variable.
+ (micromips_nop16_insn, micromips_nop32_insn): New variables.
+ (NOP_INSN): Handle microMIPS ASE.
+ (mips32_to_micromips_reg_b_map): New macro.
+ (mips32_to_micromips_reg_c_map): Likewise.
+ (mips32_to_micromips_reg_d_map): Likewise.
+ (mips32_to_micromips_reg_e_map): Likewise.
+ (mips32_to_micromips_reg_f_map): Likewise.
+ (mips32_to_micromips_reg_g_map): Likewise.
+ (mips32_to_micromips_reg_l_map): Likewise.
+ (mips32_to_micromips_reg_n_map): Likewise.
+ (mips32_to_micromips_reg_h_map): New variable.
+ (mips32_to_micromips_reg_m_map): Likewise.
+ (mips32_to_micromips_reg_q_map): Likewise.
+ (micromips_to_32_reg_h_map): New variable.
+ (micromips_to_32_reg_i_map): Likewise.
+ (micromips_to_32_reg_m_map): Likewise.
+ (micromips_to_32_reg_q_map): Likewise.
+ (micromips_to_32_reg_b_map): New macro.
+ (micromips_to_32_reg_c_map): Likewise.
+ (micromips_to_32_reg_d_map): Likewise.
+ (micromips_to_32_reg_e_map): Likewise.
+ (micromips_to_32_reg_f_map): Likewise.
+ (micromips_to_32_reg_g_map): Likewise.
+ (micromips_to_32_reg_l_map): Likewise.
+ (micromips_to_32_reg_n_map): Likewise.
+ (micromips_imm_b_map, micromips_imm_c_map): New macros.
+ (RELAX_DELAY_SLOT_16BIT): New macro.
+ (RELAX_DELAY_SLOT_SIZE_FIRST): Likewise.
+ (RELAX_DELAY_SLOT_SIZE_SECOND): Likewise.
+ (RELAX_MICROMIPS_ENCODE, RELAX_MICROMIPS_P): New macros.
+ (RELAX_MICROMIPS_TYPE, RELAX_MICROMIPS_AT): Likewise.
+ (RELAX_MICROMIPS_U16BIT, RELAX_MICROMIPS_UNCOND): Likewise.
+ (RELAX_MICROMIPS_COMPACT, RELAX_MICROMIPS_LINK): Likewise.
+ (RELAX_MICROMIPS_RELAX32, RELAX_MICROMIPS_TOOFAR16): Likewise.
+ (RELAX_MICROMIPS_MARK_TOOFAR16): Likewise.
+ (RELAX_MICROMIPS_CLEAR_TOOFAR16): Likewise.
+ (RELAX_MICROMIPS_TOOFAR32): Likewise.
+ (RELAX_MICROMIPS_MARK_TOOFAR32): Likewise.
+ (RELAX_MICROMIPS_CLEAR_TOOFAR32): Likewise.
+ (INSERT_OPERAND, EXTRACT_OPERAND): Handle microMIPS ASE.
+ (mips_macro_warning): Add delay_slot_16bit_p, delay_slot_32bit_p,
+ fsize and insns.
+ (mips_mark_labels): New function.
+ (mips16_small, mips16_ext): Remove variables, replacing with...
+ (forced_insn_size): ... this.
+ (append_insn, mips16_ip): Update accordingly.
+ (micromips_insn_length): New function.
+ (insn_length): Return the length of microMIPS instructions.
+ (mips_record_mips16_mode): Rename to...
+ (mips_record_compressed_mode): ... this. Handle microMIPS ASE.
+ (install_insn): Handle microMIPS ASE.
+ (reglist_lookup): New function.
+ (is_size_valid, is_delay_slot_valid): Likewise.
+ (md_begin): Handle microMIPS ASE.
+ (md_assemble): Likewise. Update for append_insn interface change.
+ (micromips_reloc_p): New function.
+ (got16_reloc_p): Handle microMIPS ASE.
+ (hi16_reloc_p): Likewise.
+ (lo16_reloc_p): Likewise.
+ (jmp_reloc_p): New function.
+ (jalr_reloc_p): Likewise.
+ (matching_lo_reloc): Handle microMIPS ASE.
+ (insn_uses_reg, reg_needs_delay): Likewise.
+ (mips_move_labels): Likewise.
+ (mips16_mark_labels): Rename to...
+ (mips_compressed_mark_labels): ... this. Handle microMIPS ASE.
+ (gpr_mod_mask): New function.
+ (gpr_read_mask, gpr_write_mask): Handle microMIPS ASE.
+ (fpr_read_mask, fpr_write_mask): Likewise.
+ (insns_between, nops_for_vr4130, nops_for_insn): Likewise.
+ (fix_loongson2f_nop, fix_loongson2f_jump): Likewise.
+ (MICROMIPS_LABEL_CHAR): New macro.
+ (micromips_target_label, micromips_target_name): New variables.
+ (micromips_label_name, micromips_label_expr): New functions.
+ (micromips_label_inc, micromips_add_label): Likewise.
+ (mips_label_is_local): Likewise.
+ (micromips_map_reloc): Likewise.
+ (can_swap_branch_p): Handle microMIPS ASE.
+ (append_insn): Add expansionp argument. Handle microMIPS ASE.
+ (start_noreorder, end_noreorder): Handle microMIPS ASE.
+ (macro_start, macro_warning, macro_end): Likewise.
+ (brk_fmt, cop12_fmt, jalr_fmt, lui_fmt): New variables.
+ (mem12_fmt, mfhl_fmt, shft_fmt, trap_fmt): Likewise.
+ (BRK_FMT, COP12_FMT, JALR_FMT, LUI_FMT): New macros.
+ (MEM12_FMT, MFHL_FMT, SHFT_FMT, TRAP_FMT): Likewise.
+ (macro_build): Handle microMIPS ASE. Update for append_insn
+ interface change.
+ (mips16_macro_build): Update for append_insn interface change.
+ (macro_build_jalr): Handle microMIPS ASE.
+ (macro_build_lui): Likewise. Simplify.
+ (load_register): Handle microMIPS ASE.
+ (load_address): Likewise.
+ (move_register): Likewise.
+ (macro_build_branch_likely): New function.
+ (macro_build_branch_ccl): Likewise.
+ (macro_build_branch_rs): Likewise.
+ (macro_build_branch_rsrt): Likewise.
+ (macro): Handle microMIPS ASE.
+ (validate_micromips_insn): New function.
+ (expr_const_in_range): Likewise.
+ (mips_ip): Handle microMIPS ASE.
+ (options): Add OPTION_MICROMIPS and OPTION_NO_MICROMIPS.
+ (md_longopts): Add mmicromips and mno-micromips.
+ (md_parse_option): Handle OPTION_MICROMIPS and
+ OPTION_NO_MICROMIPS.
+ (mips_after_parse_args): Handle microMIPS ASE.
+ (md_pcrel_from): Handle microMIPS relocations.
+ (mips_force_relocation): Likewise.
+ (md_apply_fix): Likewise.
+ (mips_align): Handle microMIPS ASE.
+ (s_mipsset): Likewise.
+ (s_cpload, s_cpsetup, s_cpreturn): Use relocation wrappers.
+ (s_dtprel_internal): Likewise.
+ (s_gpword, s_gpdword): Likewise.
+ (s_insn): Handle microMIPS ASE.
+ (s_mips_stab): Likewise.
+ (relaxed_micromips_32bit_branch_length): New function.
+ (relaxed_micromips_16bit_branch_length): New function.
+ (md_estimate_size_before_relax): Handle microMIPS ASE.
+ (mips_fix_adjustable): Likewise.
+ (tc_gen_reloc): Handle microMIPS relocations.
+ (mips_relax_frag): Handle microMIPS ASE.
+ (md_convert_frag): Likewise.
+ (mips_frob_file_after_relocs): Likewise.
+ (mips_elf_final_processing): Likewise.
+ (mips_nop_opcode): Likewise.
+ (mips_handle_align): Likewise.
+ (md_show_usage): Handle microMIPS options.
+ * symbols.c (TC_LABEL_IS_LOCAL): New macro.
+ (S_IS_LOCAL): Add a TC_LABEL_IS_LOCAL check.
+
+ * doc/as.texinfo (Target MIPS options): Add -mmicromips and
+ -mno-micromips.
+ (-mmicromips, -mno-micromips): New options.
+ * doc/c-mips.texi (-mmicromips, -mno-micromips): New options.
+ (MIPS ISA): Document .set micromips and .set nomicromips.
+ (MIPS insn): Update for microMIPS support.
+
+2011-07-24 Maciej W. Rozycki <macro@codesourcery.com>
+
+ * config/tc-mips.c (mips_ip): Make a copy of the instruction's
+ mnemonic and use it for further processing.
+
+2011-07-24 Maciej W. Rozycki <macro@codesourcery.com>
+
+ * config/tc-mips.c (can_swap_branch_p): Adjust for the rename of
+ INSN_TRAP to INSN_NO_DELAY_SLOT. Remove the check for INSN_SYNC
+ as well as explicit checks for ERET and DERET when scheduling
+ branch delay slots.
+
+2011-07-22 H.J. Lu <hongjiu.lu@intel.com>
+
+ * config/tc-i386.c (cpu_arch): Add k1om.
+ (i386_align_code): Handle PROCESSOR_K1OM.
+ (check_cpu_arch_compatible): Check EM_K1OM.
+ (i386_arch): Handle Intel K1OM.
+ (i386_mach): Return bfd_mach_k1om for Intel K1OM.
+ (i386_target_format): Return ELF_TARGET_K1OM_FORMAT for Intel
+ K1OM.
+
+ * config/tc-i386.h (ELF_TARGET_K1OM_FORMAT): New.
+ (processor_type): Add PROCESSOR_K1OM.
+
+ * doc/c-i386.texi: Document k1om.
+
2011-07-18 H.J. Lu <hongjiu.lu@intel.com>
* doc/c-i386.texi: Fix a typo.
projects / deliverable / binutils-gdb.git / blobdiff