+2003-09-30 Chris Demetriou <cgd@broadcom.com>
+
+ * config/tc-mips.c (mips_ip): Capitalize first word of
+ existing condition code warning, and add condition code
+ warnings for .ps instructions, and for bc1any[24][tf].
+
+2003-09-30 Chris Demetriou <cgd@broadcom.com>
+
+ * NEWS: Mention support for MIPS64 Release 2.
+
+2003-09-30 Chris Demetriou <cgd@broadcom.com>
+
+ * NEWS: Add an indication of the cutoff for 2.14.
+
+2003-09-30 Chris Demetriou <cgd@broadcom.com>
+
+ * configure.in (mipsisa64r2, mipsisa64r2el, mipsisa64r2*): New CPUs.
+ * configure: Regenerate.
+ * config/tc-mips.c (imm2_expr): New variable.
+ (md_assemble, mips16_ip): Initialize imm2_expr.
+ (ISA_HAS_64BIT_REGS, ISA_HAS_DROR, ISA_HAS_ROR): Add ISA_MIPS64R2.
+ (macro_build): Handle +A, +B, +C, +E, +F, +G, and +H format operands.
+ (macro): Handle M_DEXT and M_DINS.
+ (validate_mips_insn): Handle +E, +F, +G, +H, and +I format operands.
+ (mips_ip): Likewise.
+ (OPTION_MIPS64R2): New define.
+ (md_longopts): New entry for -mips64r2 (OPTION_MIPS64R2).
+ OPTION_ASE_BASE): Increase to compensate for OPTION_MIPS64R2.
+ (md_parse_option): Handle OPTION_MIPS64R2.
+ (s_mipsset): Handle setting "mips64r2" ISA.
+ (mips_cpu_info_table): Add mips64r2.
+ (md_show_usage): Document -mips64r2 option.
+ * doc/as.texinfo: Docuemnt -mips64r2 option.
+ * doc/c-mips.texi: Likewise.
+
+2003-09-27 John David Anglin <dave.anglin@nrc-cnrc.gc.ca>
+
+ * config/tc-hppa.c (pa_ip): Check for invalid 64-bit conditions.
+
+2003-09-26 Matt Thomas <matt@3am-software.com>
+
+ * config/tc-vax.c (md_shortopts): Fix a typo. Remove 'K'.
+ (OPTION_PIC): Define.
+ (md_longopts): Add "pic" option.
+ (md_parse_option): Change 'K' to OPTION_PIC.
+
+2003-09-23 Alan Modra <alan@modra.org>
+
+ * config/obj-elf.c (obj_elf_change_section): Adjust for
+ _bfd_elf_get_sec_type_attr changes. Allow SHF_MERGE and SHF_STRINGS
+ to be set when defaults are not. Don't set attr from defaults if
+ old_sec.
+
+2003-09-18 Thiemo Seufer <seufer@csv.ica.uni-stuttgart.de>
+
+ * config/tc-mips.c (macro_build_ldst_constoffset): Don't silently
+ truncate values which won't fit im 32 bits.
+ (load_register): Likewise.
+ (macro): Likewise.
+
+2003-09-17 Dmitry Diky <diwil@mail.ru>
+
+ * config/tc-msp430.c (MAX_OP_LEN): Set to 256.
+ (msp430_operands): Remove redundant l2[16] within switch-case.
+
+2003-09-16 Ralf Corsepius <corsepiu@faw.uni-ulm.de>
+
+ * configure.in: Handle arm-*-rtems* and thumb-*rtems*.
+ * configure: Regenerate.
+
+2003-09-14 Thiemo Seufer <seufer@csv.ica.uni-stuttgart.de>
+
+ * config/tc-mips.c (HAVE_64BIT_ADDRESS_CONSTANTS): Remove.
+ (macro_build_ldst_constoffset): Sign-extend 32-bit constants. Change
+ the function prototype.
+ (load_register): Likewise. Simplify the checks for sign-extended
+ constants.
+ (macro): Likewise. Fix code generation for 64-bit address constants
+ outside the 32-bit compatibility space. Adjust
+ macro_build_ldst_constoffset calls.
+ (s_cprestore): Adjust macro_build_ldst_constoffset call.
+
+2003-09-11 Bob Wilson <bob.wilson@acm.org>
+
+ * config/tc-xtensa.c (insn_labels, free_insn_labels, saved_insn_labels,
+ literal_syms): New global variables.
+ (xtensa_define_label, add_target_symbol, xtensa_find_label,
+ map_over_defined_symbols, is_loop_target_label,
+ xtensa_mark_target_fragments, xtensa_move_frag_symbol,
+ xtensa_move_frag_symbols, defined_symbols, branch_targets): Delete.
+ (xtensa_begin_directive): Call md_flush_pending_output. Move symbols
+ from insn_labels to saved_insn_labels when entering a literal region.
+ (xtensa_end_directive): Call md_flush_pending_output. Restore
+ insn_labels list when leaving a literal region.
+ (xtensa_literal_position): Call xtensa_clear_insn_labels.
+ (xtensa_literal_pseudo): Add check to disallow .literal inside a
+ literal region. Move insn_labels to saved_insn_labels and then restore
+ insn_labels on exit.
+ (xg_add_branch_and_loop_targets): Replace add_target_symbol calls with
+ code to set is_loop_target or is_branch_target flag on the symbol
+ (xtensa_create_literal_symbol): Call xtensa_add_literal_sym.
+ (xtensa_add_literal_sym, xtensa_add_insn_label,
+ xtensa_clear_insn_labels): New functions.
+ (xtensa_move_labels): Remove old_frag and old_offset arguments. Add
+ loops_ok argument. Rewrite to use insn_labels list instead of
+ calling xtensa_find_label and to check the is_loop_target flag on
+ symbols when loops_ok is false.
+ (xtensa_frob_label): Remove call to xtensa_define_label. Add call
+ to either xtensa_add_literal_sym or xtensa_add_insn_label. Adjust
+ call to xtensa_move_labels. Propagate is_branch_target and
+ is_loop_target flags from symbols to frags.
+ (xtensa_flush_pending_output): Call xtensa_clear_insn_labels.
+ (md_assemble): Use xtensa_move_labels with loops_ok = FALSE when
+ aligning a loop instruction. Adjust call to xtensa_move_labels for
+ aligning entry instructions. Add call to xtensa_clear_insn_labels.
+ (xtensa_end): Remove call to xtensa_mark_target_fragments.
+ (xtensa_move_literals): Replace xtensa_move_frag_symbols call with
+ code to use new literal_syms list.
+ * config/tc-xtensa.h (xtensa_symfield_type): Add is_loop_target and
+ is_branch_target flags.
+
+2003-09-09 Bob Wilson <bob.wilson@acm.org>
+
+ * config/tc-xtensa.c (xtensa_mark_literal_pool_location): Remove
+ "move_labels" argument and corresponding call to xtensa_move_labels.
+ (md_assemble): Add a separate call to xtensa_move_labels and remove
+ argument for call to xtensa_mark_literal_pool_location.
+ (xtensa_literal_position, xtensa_switch_to_literal_fragment): Fix
+ calls to xtensa_mark_literal_pool_location.
+ (xtensa_create_local_symbol): Delete and inline the code into...
+ (xtensa_create_literal_symbol): ...here.
+ (xtensa_frob_label): Combine conditionals.
+ (expression_maybe_register, xtensa_symbol_new_hook,
+ fix_new_exp_in_seg): Use symbol_get_tc.
+
+2003-09-09 Bob Wilson <bob.wilson@acm.org>
+
+ * config/tc-xtensa.c (xtensa_literal_pseudo): Remove code for
+ combining identical literals.
+ (expression_maybe_register): Remove call to find_lit_sym_translation.
+ (is_duplicate_expression, cache_literal, is_duplicate_literal,
+ add_lit_sym_translation, find_lit_sym_translation): Delete.
+
+2003-09-07 Nick Clifton <nickc@redhat.com>
+
+ * doc/as.texinfo (Comments): Comment character for PPC is #.
+
+2003-09-06 Stephane Carrez <stcarrez@nerim.fr>
+
+ PR savannah/4358:
+ * config/tc-m68hc11.c (s_m68hc11_relax): Use 2 for size to avoid
+ overflow complain.
+
+2003-09-05 Richard Sandiford <rsandifo@redhat.com>
+
+ * config/tc-frv.c (md_pcrel_from_section): Heed TC_FORCE_RELOCATION.
+
+2003-09-04 Nick Clifton <nickc@redhat.com>
+
+ * config/tc-v850.c (set_machine): Accept v850e1 machine number.
+ (md_pseudo_table): Add .v850e1 pseudo op.
+ (md_show_usage): Document -mv850e1 switch.
+ (md_parse_option): Accept -mv850e1 switch.
+ (md_begin): Allow TARGET_CPU to be v850e1.
+ * doc/c-v850.texi: Document -mv850e1 switch and .v850e1 pseudo op.
+ * NEWS: Mention support for v850e1.
+
+2003-09-04 Alan Modra <amodra@bigpond.net.au>
+
+ * config/tc-ppc.c (md_parse_option): Add PPC_OPCODE_ANY to existing
+ ppc_cpu selection rather than replacing.
+ (ppc_set_cpu): Ignore and preserve PPC_OPCODE_ANY in ppc_cpu.
+ (md_begin): When PPC_OPCODE_ANY, insert all opcodes in ppc_hash.
+
+2003-09-03 Robert Millan <robertmh@gnu.org>
+
+ * configure.in: Match GNU/KFreeBSD with new kfreebsd*-gnu
+ triplet.
+ * configure: Regenerate.
+
+2003-09-02 Daniel Jacobowitz <drow@mvista.com>
+
+ * configure.in: Update AC_PREREQ to 2.57. Use AC_CONFIG_FILES
+ and AC_CONFIG_COMMANDS instead of the three-argument AC_OUTPUT.
+ Specify AC_CONFIG_AUX_DIR.
+ * aclocal.m4: Regenerated with aclocal-1.7.
+ * configure: Regenerated with autoconf 2.57.
+ * Makefile.in, doc/Makefile.in: Regenerated with automake-1.7.
+
+2003-08-29 Jakub Jelinek <jakub@redhat.com>
+
+ * dw2gencfi.c (cfi_pseudo_table): Add cfi_window_save.
+ (dot_cfi, output_cfi_insn): Handle DW_CFA_GNU_window_save.
+ (output_cie): Don't use DW_EH_PE_pcrel if neither DIFF_EXPR_OK
+ nor tc_cfi_emit_pcrel_expr are defined.
+ (output_fde): Use tc_cfi_emit_pcrel_expr if available and
+ DIFF_EXPR_OK is not defined.
+ * config/tc-sparc.h (TARGET_USE_CFIPOP): Define.
+ (tc_cfi_frame_initial_instructions, tc_regname_to_dw2regnum,
+ tc_cfi_emit_pcrel_expr): Define.
+ (sparc_cfi_frame_initial_instructions, sparc_regname_to_dw2regnum,
+ sparc_cfi_emit_pcrel_expr): New prototypes.
+ (sparc_cie_data_alignment): New decl.
+ (DWARF2_DEFAULT_RETURN_COLUMN, DWARF2_CIE_DATA_ALIGNMENT): Define.
+ * config/tc-sparc.c: Include dw2gencfi.h.
+ (sparc_cie_data_alignment): New variable.
+ (md_begin): Initialize it.
+ (sparc_cfi_frame_initial_instructions): New function.
+ (sparc_regname_to_dw2regnum): Likewise.
+ (sparc_cfi_emit_pcrel_expr): Likewise.
+ * doc/as.texinfo: Document .cfi_window_save.
+
+ * config/tc-sparc.c (s_common): Cast last argument to long and
+ change format string to shut up warning.
+
+2003-08-25 Jason Eckhardt <jle@rice.edu>
+
+ * doc/c-i860.texi: Update text about relocatable address expansions.
+
+2003-08-24 Jason Eckhardt <jle@rice.edu>
+
+ * config/tc-i860.c (md_assemble): Use isrc2 from the original
+ instruction when expanding E_ADDR.
+
+2003-08-21 Nick Clifton <nickc@redhat.com>
+
+ * po/tr.po: Updated Turkish translation.
+
+2003-08-20 Alan Modra <amodra@bigpond.net.au>
+
+ * config/tc-ppc.c (md_parse_option): Add PPC_OPCODE_ISEL and
+ PPC_OPCODE_RFMCI to -m440 selected ppc_cpu.
+
+2003-08-19 Nick Clifton <nickc@redhat.com>
+
+ * config/tc-arm.c (cp_address_required_here): Add code to handle
+ unindexed addressing mode.
+
+2003-08-19 Alan Modra <amodra@bigpond.net.au>
+
+ * config/tc-ppc.c (md_parse_option): Handle -m440.
+ (md_show_usage): Add -m440.
+ (md_apply_fix3): Warning fix.
+ * doc/c-ppc.texi: Document -m440.
+
+2003-08-16 Benjamin Kalytta <bkausbk@web.de>
+
+ * read.c (s_print): Check for NULL.
+
+2003-08-16 Alan Modra <amodra@bigpond.net.au>
+
+ * write.c (fixup_segment): When handling an expression involving
+ the subtraction of two symbols in the same segment, don't clear
+ fx_pcrel except for TC_M68K.
+
+2003-08-14 Alan Modra <amodra@bigpond.net.au>
+
+ * config/tc-i386.h: Remove BFD_ASSEMBLER tests and all !BFD_ASSEMBLER
+ code.
+ * config/tc-i386.c: Likewise.
+ (RELOC_ENUM): Don't define. Replace throughout with enum.
+
+ * dep-in.sed: Remove libintl.h. Ignore include/fopen-*.h
+ * Makefile.am (POTFILES.in): Unset LC_COLLATE.
+ Run "make dep-am".
+ * Makefile.in: Regenerate.
+
+2003-08-08 Andreas Schwab <schwab@suse.de>
+
+ * config/tc-m68k.h (TARGET_USE_CFIPOP)
+ (DWARF2_DEFAULT_RETURN_COLUMN, DWARF2_CIE_DATA_ALIGNMENT)
+ (tc_regname_to_dw2regnum, tc_cfi_frame_initial_instructions):
+ Define.
+ * config/tc-m68k.c: Include "dw2gencfi.h".
+ (tc_m68k_regname_to_dw2regnum)
+ (tc_m68k_frame_initial_instructions): New functions.
+
+2003-08-08 Dmitry Diky <diwil@mail.ru>
+
+ * config/tc-msp430.c: Add xW42 and xE42 parts. Sort MPU list
+ according to gcc order.
+
+2003-08-07 Jason Eckhardt <jle@rice.edu>
+
+ * config/tc-i860.c (i860_check_label): New function.
+ * config/tc-i860.h (i860_check_label): New prototype.
+ (tc_check_label): Define macro as i860_check_label.
+
+2003-08-06 Jason Eckhardt <jle@rice.edu>
+
+ * config/tc-i860.c (s_align_wrapper): New function and prototype.
+ (md_pseudo_table): Change s_align_bytes to s_align_wrapper, remove
+ surrounding OBJ_ELF ifdef, and re-format slightly.
+ * doc/c-i860.texi: Document the special .align syntax available
+ in Intel mode.
+
+2003-08-06 Jason Eckhardt <jle@rice.edu>
+
+ * config/tc-i860.c (i860_handle_align): New function.
+ * config/tc-i860.h (HANDLE_ALIGN): Define macro.
+ (MAX_MEM_FOR_RS_ALIGN_CODE): Define macro.
+
+2003-08-06 Jason Eckhardt <jle@rice.edu>
+
+ * config/tc-i860.c (i860_process_insn): Check that instructions
+ with their dual-bit set are 8-byte aligned.
+
+2003-08-06 Nick Clifton <nickc@redhat.com>
+
+ * po/fr.po: Updated French translation.
+
+2003-08-05 Jason Eckhardt <jle@rice.edu>
+
+ * config/tc-i860.c (i860_process_insn): Don't handle dual-bit
+ setting during flop argument parsing. Instead, do it after
+ instruction is fully parsed.
+
+2003-08-05 Jason Eckhardt <jle@rice.edu>
+
+ * doc/c-i860.texi: Mention that .dual, .enddual, and .atmp
+ directives are only available in Intel syntax mode.
+
+2003-08-05 Jason Eckhardt <jle@rice.edu>
+
+ * config/tc-i860.c (s_dual): Accept .dual directive only in
+ the Intel syntax mode.
+ (s_enddual): Likewise for .enddual.
+ (s_atmp): Likewise for .atmp.
+
+2003-08-04 Alan Modra <amodra@bigpond.net.au>
+
+ * config/tc-i386.c (i386_intel_operand): Always call i386_index_check
+ for memory operands. Pass the full operand_string to i386_index_check.
+
+2003-08-01 Jason Eckhardt <jle@rice.edu>
+
+ * config/tc-i860.c: Remove SYNTAX_SVR4 macro and occurrences.
+ (target_intel_syntax): Declare variable.
+ (OPTION_INTEL_SYNTAX): Declare macro.
+ (md_longopts): Add option -mintel-syntax.
+ (md_parse_option): Set target_intel_syntax.
+ (md_show_usage): Add -mintel-syntax usage.
+ (md_begin): Set reg_prefix based on target_intel_syntax.
+ (i860_process_insn): Skip register prefix only if there is one.
+ Parse relocatable expressions in either Intel or AT&T syntax based
+ on target_intel_syntax instead of the SYNTAX_SVR4 macro.
+ * doc/c-i860.texi: Document -mintel-syntax option and give blurb
+ about the differences in syntax.
+
+2003-08-01 Dmitry Diky <diwil@mail.ru>
+
+ * config/tc-msp430.c (msp430_srcoperand): Extend 'push' bug workaround
+ to all arches.
+
+2003-07-30 J"orn Rennecke <joern.rennecke@superh.com>
+
+ * config/tc-sh.c (md_assemble): For branches, check & update
+ valid_arch here.
+
+2003-07-30 Jason Eckhardt <jle@rice.edu>
+
+ * config/tc-i860.c: Convert to ISO C90.
+
+2003-07-30 Rainer Orth <ro@TechFak.Uni-Bielefeld.DE>
+
+ * read.c (s_space): Revert 2003-07-28 change.
+
+2003-07-30 Alan Modra <amodra@bigpond.net.au>
+
+ * config/obj-elf.c (obj_elf_change_section): Allow "x" for .note*.
+
+2003-07-29 Alan Modra <amodra@bigpond.net.au>
+
+ * config/tc-sh.c (tc_gen_reloc): Test for R_SH_IND12W only when ELF.
+
+2003-07-29 Jakub Jelinek <jakub@redhat.com>
+
+ * config/tc-ppc.c (md_apply_fix3): Fix check for lq insns.
+
+2003-07-28 H.J. Lu <hongjiu.lu@intel.com>
+
+ * config/obj-elf.c (obj_elf_section_type): Also accept "note".
+
+2003-07-28 Rainer Orth <ro@TechFak.Uni-Bielefeld.DE>
+
+ * read.c (s_space): Don't warn about .space 0.
+
+2003-07-28 Rainer Orth <ro@TechFak.Uni-Bielefeld.DE>
+
+ * config/tc-mips.c (mips_flag_pdr): Define.
+ (md_begin) [OBJ_ELF]: Use it to control .pdr creation.
+ (s_mips_end) [OBJ_ELF]: Likewise.
+ (md_longopts) [OBJ_ELF]: Define OPTION_PDR, OPTION_NO_PDR.
+ (md_parse_option) [OBJ_ELF]: Handle them.
+ (md_show_usage) [OBJ_ELF]: Document -mpdr, -mno-pdr.
+
+ * doc/c-mips.texi (MIPS Opts): Document -mpdr, -mno-pdr.
+ * doc/as.texinfo (Overview) [MIPS]: Likewise.
+
+2003-07-25 H.J. Lu <hongjiu.lu@intel.com>
+
+ * config/obj-elf.c (obj_elf_change_section): Update
+ elf_section_type and elf_section_flags only when they are
+ specified.
+
+2003-07-25 H.J. Lu <hongjiu.lu@intel.com>
+
+ * config/obj-elf.c (obj_elf_change_section): Always set section
+ type and flags.
+
+2003-07-25 H.J. Lu <hongjiu.lu@intel.com>
+
+ * config/obj-elf.c (special_sections): Removed.
+ (obj_elf_change_section): Call _bfd_elf_get_sec_type_attr. Set
+ elf_section_type and elf_section_flags.
+ (elf_frob_file): Set SHT_GROUP.
+
+ * config/obj-elf.h (obj_sec_set_private_data): New.
+
+ * config/tc-alpha.h (ELF_TC_SPECIAL_SECTIONS): Removed.
+ * config/tc-ia64.h: Likewise.
+ * config/tc-m32r.h: Likewise.
+ * config/tc-m68hc11.h: Likewise.
+ * config/tc-mcore.h: Likewise.
+ * config/tc-mips.h: Likewise.
+ * config/tc-ppc.h: Likewise.
+ * config/tc-sh64.h: Likewise.
+ * config/tc-v850.h: Likewise.
+ * config/tc-xtensa.h: Likewise.
+
+ * config/tc-v850.h (SHF_V850_GPREL): Removed.
+ (SHF_V850_EPREL): Likewise.
+ (SHF_V850_R0REL): Likewise.
+
+ * subsegs.c (subseg_get): Call obj_sec_set_private_data if it
+ is defined.
+
+2003-07-24 Stephane Carrez <stcarrez@nerim.fr>
+
+ * config/tc-m68hc11.h (DWARF2_ADDR_SIZE): Use 32-bit address for
+ debugging symbols so that we handle page memory correctly.
+
+2003-07-24 Nick Clifton <nickc@redhat.com>
+
+ * po/fr.po: Updated French translation.
+
+2003-07-23 Daniel Jacobowitz <drow@mvista.com>
+
+ * config/tc-arm.c (arm_archs): Add iwmmxt.
+
+2003-07-22 H.J. Lu <hongjiu.lu@intel.com>
+
+ * read.c (do_parse_cons_expression): Mark nbytes unused to
+ silence gcc.
+
+2003-07-22 Alexandre Oliva <aoliva@redhat.com>
+
+ * config/tc-h8300.c (get_specific): No PCREL8 encoding for bsr/bc
+ or bsr/bs.
+
+ * config/tc-h8300.c (md_assemble): Make sure characters after
+ slash and dot are lower-case.
+
+2003-07-17 Nick Clifton <nickc@redhat.com>
+
+ * po/es.po: New Spanish translation.
+ * po/tr.po: New Turkish translation.
+ * po/opcodes.pot: Regenerate.
+
+2003-07-16 Alan Modra <amodra@bigpond.net.au>
+
+ * dwarf2dbg.c (get_frag_fix): Revert 2001-11-15 change.
+ (generic_dwarf2_emit_offset): Don't define function when
+ TC__DWARF2_EMIT_OFFSET is defined.
+
+2003-07-15 Richard Sandiford <rsandifo@redhat.com>
+
+ * config/tc-mips.c (hilo_interlocks): True for CPU_RM7000.
+ (mips_cpu_info_table): Add rm7000 and rm9000 entries.
+ * doc/c-mips.texi: Document -march=rm9000.
+
+2003-07-15 Alan Modra <amodra@bigpond.net.au>
+
+ * config/tc-v850.c (md_assemble): When no reloc, create pcrel fixups
+ only for V850_OPERAND_DISP operands.
+
+2003-07-15 Alan Modra <amodra@bigpond.net.au>
+
+ * frags.c (frag_more): Move segment checks to..
+ (frag_alloc_check): ..here. New function.
+ (frag_append_1_char): Call frag_alloc_check.
+
2003-07-14 Nick Clifton <nickc@redhat.com>
* po/tr.po: Update with latest version.
(relax_and_size_all_segments): Likewise.
(relax_frag): Likewise.
(relax_segment): Likewise.
-
+
2003-06-23 Mark Mitchell <mark@codesourcery.com>
* config/tc-ppc.c (ppc_cleanup): Use bytes to count APUinfo slots.
(get_operand): For CLASS_IR remember register size in mode struct.
(get_specific): Handle new CLASS_IRO type. Add register size
checks for CLASS_IR and CLASS_IRO.
- (md_apply_fix3): Fix undefined usage of buf.
+ (md_apply_fix3): Fix undefined usage of buf.
2003-06-19 Alan Modra <amodra@bigpond.net.au>
2003-03-25 Stan Cox <scox@redhat.com>
Nick Clifton <nickc@redhat.com>
- Contribute support for Intel's iWMMXt chip - an ARM variant:
+ Contribute support for Intel's iWMMXt chip - an ARM variant:
* config/tc-arm.c: (ARM_CEXT_IWMMXT, ARM_ARCH_IWMMXT, WR_PREFIX,
WC_PREFIX, REG_TYPE_IWMMXT): New constants.
* doc/as.texinfo: Document "-mips32r2" option.
* doc/c-mips.texi: Likewise.
-2002-12-30 Dmitry Diky <diwil@mail.ru>
+2002-12-30 Dmitry Diky <diwil@mail.ru>
* configure.in: Add msp430 target.
* configure: Regenerate.