+2020-06-18 Jan Beulich <jbeulich@suse.com>
+
+ * testsuite/gas/i386/arch-13.s: Add alternative VMGEXIT case.
+ * testsuite/gas/i386/arch-13.d: Extend -march=. Adjust
+ expectations.
+
+2020-06-16 Lili Cui <lili.cui@intel.com>
+
+ * config/tc-i386.c (cpu_arch): Correct noavx512_vp2intersect
+ cpu_arch to CPU_ANY_VP2INTERSECT_FLAGS.
+ * doc/c-i386.texi: Add avx512_vp2intersect.
+
+2020-06-16 Jan Beulich <jbeulich@suse.com>
+
+ * config/tc-i386.c (md_assemble): Drop SSE4a from SSE check
+ conditional.
+ * testsuite/gas/i386/sse-check.s: Adjust comment.
+ * testsuite/gas/i386/sse-check-error.l,
+ testsuite/gas/i386/sse-check-warn.e,
+ testsuite/gas/i386/x86-64-sse-check-error.l: Adjust
+ expectations.
+
+2020-06-16 Alan Modra <amodra@gmail.com>
+
+ * config/tc-tic30.h: Remove OBJ_AOUT support.
+ * configure.tgt: Delete tic30-*-*aout* entry.
+
+2020-06-15 Max Filippov <jcmvbkbc@gmail.com>
+
+ * config/tc-xtensa.c (XTHAL_ABI_WINDOWED, XTHAL_ABI_CALL0): New
+ macros.
+ (elf32xtensa_abi): New declaration.
+ (option_abi_windowed, option_abi_call0): New enum constants.
+ (md_longopts): Add entries for --abi-windowed and --abi-call0.
+ (md_parse_option): Add handlers for --abi-windowed and
+ --abi-call0.
+ (xtensa_add_config_info): Use xtensa_abi_choice instead of
+ XSHAL_ABI to format ABI tag.
+ * doc/as.texi (Target Xtensa options): Add --abi-windowed and
+ --abi-call0 to the list of options.
+ * doc/c-xtensa.texi: Add description for options --abi-windowed
+ and --abi-call0.
+ * testsuite/gas/xtensa/abi-call0.d: New test definition.
+ * testsuite/gas/xtensa/abi-windowed.d: New test definition.
+ * testsuite/gas/xtensa/abi.s: New test source.
+
+2020-06-14 H.J. Lu <hongjiu.lu@intel.com>
+
+ PR gas/26115
+ * testsuite/gas/i386/tsxldtrk.d: Replace xsuspldtrk with
+ xsusldtrk.
+ * testsuite/gas/i386/tsxldtrk.s: Likewise.
+ * testsuite/gas/i386/x86-64-tsxldtrk.d: Likewise.
+ * testsuite/gas/i386/x86-64-tsxldtrk.s: Likewise.
+
+2020-06-12 Nelson Chu <nelson.chu@sifive.com>
+
+ * testsuite/gas/riscv/priv-reg-fail-version-1p9.d: Removed.
+ * testsuite/gas/riscv/priv-reg-fail-version-1p9.l: Likewise.
+ * testsuite/gas/riscv/priv-reg-version-1p9.d: Likewise.
+
+2020-06-09 Seth Girvan <snth@snthhacks.com>
+
+ * doc/c-avr.texi: Improve wording.
+
+2020-06-09 Jan Beulich <jbeulich@suse.com>
+
+ * testsuite/gas/i386/x86-64-pseudos-bad.s,
+ testsuite/gas/i386/x86-64-pseudos-bad.l: New.
+
+2020-06-09 Jan Beulich <jbeulich@suse.com>
+
+ * testsuite/gas/i386/prefix.s: Add bogus prefix-with-VEX/EVEX
+ encoding tests.
+ * testsuite/gas/i386/prefix.d: Adjust expectations.
+
+2020-06-09 Jan Beulich <jbeulich@suse.com>
+
+ * testsuite/gas/i386/prefix.s: Add bogus REP / EVEX.W prefix
+ with VEX/EVEX encoding tests.
+ * testsuite/gas/i386/prefix.d: Adjust expectations.
+
+2020-06-09 Jan Beulich <jbeulich@suse.com>
+
+ * config/tc-i386.c (process_suffix): Restrict defaulting to 'q'
+ suffix.
+ * testsuite/gas/i386/noreg64.s: Add lcall/ljmp cases.
+ * testsuite/gas/i386/noreg64.d: Adjust expectations.
+ * testsuite/gas/i386/noreg-intel64.d,
+ testsuite/gas/i386/noreg-intel64.l,
+ testsuite/gas/i386/noreg-intel64.s: New.
+ * testsuite/gas/i386/i386.exp: Run new tests.
+
+2020-06-09 Jan Beulich <jbeulich@suse.com>
+
+ * config/tc-i386.c (vex_encoding_error): New enumerator.
+ (VEX_check_operands): Rename to VEX_check_encoding. Check
+ for vex_encoding_error. Move Imm4 handling ...
+ (check_VecOperands): ... here.
+ (match_template): Call VEX_check_encoding when there are no
+ operands. Split construct calling check_VecOperands and
+ VEX_check_encoding (when there are operands).
+ (check_register): Don't blindly set vex_encoding_evex.
+ * testsuite/gas/i386/pseudos-bad.s,
+ testsuite/gas/i386/pseudos-bad.l: New.
+ * testsuite/gas/i386/i386.exp: Run new test.
+ * testsuite/gas/i386/xmmhi64.s: Drop {vex2}.
+
+2020-06-08 Alex Coplan <alex.coplan@arm.com>
+
+ * config/tc-arm.c (insns): Add dfb.
+ * testsuite/gas/arm/dfb.d: New test.
+ * testsuite/gas/arm/dfb.s: Input for test.
+
+2020-06-08 Nick Clifton <nickc@redhat.com>
+
+ * testsuite/gas/cfi/cfi-i386-2.d: Skip for PE based targets.
+
+2020-06-08 Jan Beulich <jbeulich@suse.com>
+
+ * config/tc-i386.c (pi): Add checks for RegMask and RegBND.
+
+2020-06-08 Jan Beulich <jbeulich@suse.com>
+
+ * config/tc-i386.c (check_byte_reg): Drop dead conditional
+ around as_bad().
+
+2020-06-08 Jan Beulich <jbeulich@suse.com>
+
+ * config/tc-i386.c (check_register): Split RegTR handling, to
+ fail recognition also in 64-bit mode as well as with i586 or
+ i686 explicitly enabled.
+ * testsuite/gas/i386/x86_64.s: Add insns referencing tr<N>.
+ * testsuite/gas/i386/x86_64-intel.d,
+ testsuite/gas/i386/x86_64.d: Adjust expectations.
+
+2020-06-08 Jan Beulich <jbeulich@suse.com>
+
+ * testsuite/gas/cfi/cfi-i386-2.d: Adjust expectations.
+ * testsuite/gas/cfi/cfi.exp: Run this test.
+
+2020-06-08 Jan Beulich <jbeulich@suse.com>
+
+ * config/tc-i386.c (parse_real_register): Add allow_pseudo_reg
+ check to %st(N) parsing logic.
+ * testsuite/gas/cfi/cfi-i386.s: Set "generic32" arch.
+
+2020-06-08 Jan Beulich <jbeulich@suse.com>
+
+ * config/tc-i386.c (bad_reg): New.
+ (check_VecOperations, i386_att_operand, i386_parse_name): Check
+ for it.
+ (check_register): New, broken out from ...
+ (parse_real_register): ... here. Call it.
+ (parse_register): Call it, and error upon failure.
+ * testsuite/gas/i386/equ-bad.s, testsuite/gas/i386/equ-bad.l,
+ testsuite/gas/i386/x86-64-equ-bad.s,
+ testsuite/gas/i386/x86-64-equ-bad.l: New.
+ * testsuite/gas/i386/i386.exp: Run new tests.
+
+2020-06-06 Alan Modra <amodra@gmail.com>
+
+ * config/tc-ppc.c (md_show_usage): Mention -mpower10 and -mpwr10.
+ * doc/c-ppc.texi: Likewise.
+
+2020-06-06 Alan Modra <amodra@gmail.com>
+
+ * config/tc-ppc.c: Update throughout for reloc renaming.
+
+2020-06-05 Jose E. Marchesi <jose.marchesi@oracle.com>
+
+ * config/tc-bpf.c (md_apply_fix): Avoid GCC 10 warning
+ stringop-overflow.
+
+2020-06-05 Nelson Chu <nelson.chu@sifive.com>
+
+ * config/tc-riscv.c (explicit_csr): New static boolean.
+ Used to indicate CSR are explictly used.
+ (riscv_ip): Set explicit_csr to TRUE if any CSR is used.
+ (riscv_write_out_attrs): If we already have set elf priv
+ attributes, then generate them. Otherwise, don't generate
+ them when no CSR are used.
+ * testsuite/gas/riscv/attribute-01.d: Remove the priv attributes.
+ * testsuite/gas/riscv/attribute-02.d: Likewise.
+ * testsuite/gas/riscv/attribute-03.d: Likewise.
+ * testsuite/gas/riscv/attribute-04.d: Likewise.
+ * testsuite/gas/riscv/attribute-05.d: Likewise.
+ * testsuite/gas/riscv/attribute-06.d: Likewise.
+ * testsuite/gas/riscv/attribute-07.d: Likewise.
+ * testsuite/gas/riscv/attribute-08.d: Likewise.
+ * testsuite/gas/riscv/attribute-09.d: Likewise.
+ * testsuite/gas/riscv/attribute-10.d: Likewise.
+ * testsuite/gas/riscv/attribute-unknown.d: Likewise.
+ * testsuite/gas/riscv/attribute-11.s: New testcase.
+ * testsuite/gas/riscv/attribute-11.d: New testcase. The CSR is
+ used, so we should output the ELF priv attributes.
+ * testsuite/gas/riscv/attribute-12.d: New testcase. The CSR is
+ used, so output the priv attributes according to the -mpriv-spec.
+ * testsuite/gas/riscv/attribute-13.d: New testcase. The CSR isn't
+ used, so ignore the -mpriv-spec setting.
+
+2020-06-04 H.J. Lu <hongjiu.lu@intel.com>
+
+ * config/tc-ip2k. (ip2k_apply_fix): Pass endianness to
+ cgen_get_insn_value.
+ * config/tc-xstormy16.c (xstormy16_md_apply_fix): Pass
+ endianness to cgen_get_insn_value and cgen_put_insn_value.
+
+2020-06-04 Jose E. Marchesi <jose.marchesi@oracle.com>
+
+ * config/tc-bpf.c (md_apply_fix): Simplify and avoid using
+ cgen_put_insn_value.
+
+2020-06-04 Jose E. Marchesi <jose.marchesi@oracle.com>
+
+ * config/tc-bpf.c (md_begin): Pass CGEN_CPU_OPEN_INSN_ENDIAN to
+ bpf_cgen_cpu_open.
+ (md_assemble): Remove no longer needed hack.
+
+2020-06-04 Jose E. Marchesi <jose.marchesi@oracle.com>
+
+ * cgen.c (gas_cgen_finish_insn): Pass the endianness to
+ cgen_put_insn_value.
+ (gas_cgen_md_apply_fix): Likewise.
+ (gas_cgen_md_apply_fix): Likewise.
+ * config/tc-bpf.c (md_apply_fix): Pass data endianness to
+ cgen_put_insn_value.
+ * config/tc-mep.c (mep_check_ivc2_scheduling): Pass endianness to
+ cgen_put_insn_value.
+
+2020-06-04 Alan Modra <amodra@gmail.com>
+
+ * testsuite/config/default.exp: Remove global directive outside
+ proc body.
+ * testsuite/gas/mep/complex-relocs.exp: Likewise.
+ * testsuite/gas/microblaze/relax_size.exp: Likewise.
+ * testsuite/gas/microblaze/reloc_sym.exp: Likewise.
+ * testsuite/gas/mt/relocs.exp: Likewise.
+ * testsuite/gas/rx/rx.exp: Likewise.
+
+2020-06-03 Stephen Casner <casner@acm.org>
+
+ * doc/c-riscv.texi (RISC-V-Options): Fix non-ASCII apostrophe.
+
+2020-06-02 Frédéric Pétrot <frederic.petrot@univ-grenoble-alpes.fr>
+ Jim Wilson <jimw@sifive.com>
+
+ PR 26051
+ * doc/c-riscv.texi (RISC-V-Formats): Add missing I format using
+ simm12(rs1). Correct S format to use simm12(rs1). Drop SB and B
+ formats using simm12(rs1). Correct SB and B to use rs1 and rs2.
+ Move B before SB. Move J before UJ.
+
2020-06-01 Alex Coplan <alex.coplan@arm.com>
* write.c (relax_segment): Fix handling of negative offset when
projects / deliverable / binutils-gdb.git / blobdiff