-2019-12-12 H.J. Lu <hongjiu.lu@intel.com>
+2020-06-18 Jan Beulich <jbeulich@suse.com>
- * config/tc-i386.c (OPTION_MBRANCHES_WITH_32B_BOUNDARIES): New.
- (md_longopts): Add -mbranches-within-32B-boundaries.
- (md_parse_option): Handle -mbranches-within-32B-boundaries.
- (md_show_usage): Add -mbranches-within-32B-boundaries.
+ * testsuite/gas/i386/arch-13.s: Add alternative VMGEXIT case.
+ * testsuite/gas/i386/arch-13.d: Extend -march=. Adjust
+ expectations.
-2019-12-12 H.J. Lu <hongjiu.lu@intel.com>
+2020-06-16 Lili Cui <lili.cui@intel.com>
- * config/tc-i386.c (_i386_insn): Add has_gotpc_tls_reloc.
- (tls_get_addr): New.
- (last_insn): New.
- (align_branch_power): New.
- (align_branch_kind): New.
- (align_branch_bit): New.
- (align_branch): New.
- (MAX_FUSED_JCC_PADDING_SIZE): New.
- (align_branch_prefix_size): New.
- (BRANCH_PADDING): New.
- (BRANCH_PREFIX): New.
- (FUSED_JCC_PADDING): New.
- (i386_generate_nops): Support BRANCH_PADDING and FUSED_JCC_PADDING.
- (md_begin): Abort if align_branch_prefix_size <
- MAX_FUSED_JCC_PADDING_SIZE.
- (md_assemble): Set last_insn.
- (maybe_fused_with_jcc_p): New.
- (add_fused_jcc_padding_frag_p): New.
- (add_branch_prefix_frag_p): New.
- (add_branch_padding_frag_p): New.
- (output_insn): Generate a BRANCH_PADDING, FUSED_JCC_PADDING or
- BRANCH_PREFIX frag and terminate each frag to align branches.
- (output_disp): Set i.has_gotpc_tls_reloc to TRUE for GOTPC and
- relaxable TLS relocations.
- (output_imm): Likewise.
- (i386_next_non_empty_frag): New.
- (i386_next_jcc_frag): New.
- (i386_classify_machine_dependent_frag): New.
- (i386_branch_padding_size): New.
- (i386_generic_table_relax_frag): New.
- (md_estimate_size_before_relax): Handle COND_JUMP_PADDING,
- FUSED_JCC_PADDING and COND_JUMP_PREFIX frags.
- (md_convert_frag): Handle BRANCH_PADDING, BRANCH_PREFIX and
- FUSED_JCC_PADDING frags.
- (OPTION_MALIGN_BRANCH_BOUNDARY): New.
- (OPTION_MALIGN_BRANCH_PREFIX_SIZE): New.
- (OPTION_MALIGN_BRANCH): New.
- (md_longopts): Add -malign-branch-boundary=,
- -malign-branch-prefix-size= and -malign-branch=.
- (md_parse_option): Handle -malign-branch-boundary=,
- -malign-branch-prefix-size= and -malign-branch=.
- (md_show_usage): Display -malign-branch-boundary=,
- -malign-branch-prefix-size= and -malign-branch=.
- (i386_target_format): Set tls_get_addr.
- (i386_cons_align): New.
- * config/tc-i386.h (i386_cons_align): New.
- (md_cons_align): New.
- (i386_generic_table_relax_frag): New.
- (md_generic_table_relax_frag): New.
- (i386_tc_frag_data): Add u, padding_address, length,
- max_prefix_length, prefix_length, default_prefix, cmp_size,
- classified and branch_type.
- (TC_FRAG_INIT): Initialize u, padding_address, length,
- max_prefix_length, prefix_length, default_prefix, cmp_size,
- classified and branch_type.
- * doc/c-i386.texi: Document -malign-branch-boundary=,
- -malign-branch= and -malign-branch-prefix-size=.
-
-2019-12-12 H.J. Lu <hongjiu.lu@intel.com>
-
- * write.c (md_generic_table_relax_frag): New. Defined to
- relax_frag if not defined.
- (relax_segment): Call md_generic_table_relax_frag instead of
- relax_frag.
-
-2019-12-12 Alan Modra <amodra@gmail.com>
-
- * config/tc-aarch64.c (get_aarch64_insn): Avoid signed overflow.
- * config/tc-metag.c (parse_dalu): Likewise.
- * config/tc-tic4x.c (md_pcrel_from): Likewise.
- * config/tc-tic6x.c (tic6x_output_unwinding): Likewise.
- * config/tc-csky.c (parse_fexp): Use an unsigned char temp buffer.
- Don't use register keyword. Avoid signed overflow and remove now
- unneccesary char masks. Formatting.
- * config/tc-ia64.c (operand_match): Don't use shifts to sign extend.
- * config/tc-mep.c (mep_apply_fix): Likewise.
- * config/tc-pru.c (md_apply_fix): Likewise.
- * config/tc-riscv.c (load_const): Likewise.
- * config/tc-nios2.c (md_apply_fix): Likewise. Don't potentially
- truncate fixup before right shift. Tidy BFD_RELOC_NIOS2_HIADJ16
- calculation.
-
-2019-12-12 Alan Modra <amodra@gmail.com>
-
- * config/obj-evax.c (crc32, encode_32, encode_16, decode_16):
- Remove unnecessary prototypes.
- (number_of_codings): Delete, use ARRAY_SIZE instead throughout.
- (codings, decodings): Make arrays of unsigned char.
- (crc32): Use unsigned variables. Delete unnecessary mask.
- (encode_32, encode_16): Return unsigned char*, and make static
- buffer an unsigned char array.
- (decode_16): Make arg an unsigned char*. Remove useless casts.
- (shorten_identifier): Use unsigned char crc_chars.
- (is_truncated_identifier): Make ptr an unsigned char*.
-
-2019-12-11 Wilco Dijkstra <wdijkstr@arm.com>
-
- * config/tc-arm.c (warn_on_restrict_it): Add new variable.
- (it_fsm_post_encode): Check warn_on_restrict_it.
- (arm_option_table): Add -mwarn-restrict-it/-mno-warn-restrict-it.
- * testsuite/gas/arm/armv8-2-fp16-scalar-bad.d: Add -mwarn-restrict-it.
- * testsuite/gas/arm/armv8-2-fp16-scalar-bad-ext.d: Likewise.
- * testsuite/gas/arm/armv8-a-bad.d: Likewise.
- * testsuite/gas/arm/armv8-a-it-bad.d: Likewise.
- * testsuite/gas/arm/armv8-r-bad.d: Likewise.
- * testsuite/gas/arm/armv8-r-it-bad.d: Likewise.
- * testsuite/gas/arm/sp-pc-validations-bad-t-v8a.d: Likewise.
- * testsuite/gas/arm/udf.d: Likewise.
-
-2018-12-11 Jan Beulich <jbeulich@suse.com>
-
- * config/tc-i386.c (md_assemble): Extend SSE check conditional.
- * testsuite/gas/i386/sse-check.s: Add SSE4a and SHA tests.
- Extend GFNI tests.
- * testsuite/gas/i386/sse-check.d: Adjust expectations.
+ * config/tc-i386.c (cpu_arch): Correct noavx512_vp2intersect
+ cpu_arch to CPU_ANY_VP2INTERSECT_FLAGS.
+ * doc/c-i386.texi: Add avx512_vp2intersect.
+
+2020-06-16 Jan Beulich <jbeulich@suse.com>
+
+ * config/tc-i386.c (md_assemble): Drop SSE4a from SSE check
+ conditional.
+ * testsuite/gas/i386/sse-check.s: Adjust comment.
* testsuite/gas/i386/sse-check-error.l,
- testsuite/gas/i386/x86-64-sse-check-error.l: Likewise.
- * testsuite/gas/i386/sse-check-warn.e: Likewise.
+ testsuite/gas/i386/sse-check-warn.e,
+ testsuite/gas/i386/x86-64-sse-check-error.l: Adjust
+ expectations.
-2019-12-10 Vladimir Murzin <vladimir.murzin@arm.com>
+2020-06-16 Alan Modra <amodra@gmail.com>
- * config/tc-arm.c (s_arm_arch): Set selected_ctx_ext_table.
- * testsuite/gas/arm/mve-arch-ext.s: New.
- * testsuite/gas/arm/mve-arch-ext.d: New.
+ * config/tc-tic30.h: Remove OBJ_AOUT support.
+ * configure.tgt: Delete tic30-*-*aout* entry.
-2019-12-09 Jan Beulich <jbeulich@suse.com>
+2020-06-15 Max Filippov <jcmvbkbc@gmail.com>
- * config/tc-i386-intel.c (O_oword_ptr): Move.
- (O_xmmword_ptr): Alias to O_oword_ptr.
- (O_fword_ptr, O_tbyte_ptr, O_ymmword_ptr, O_zmmword_ptr): Adjust
- expansion.
- (i386_intel_simplify, i386_intel_operand): Fold O_oword_ptr and
- O_xmmword_ptr cases, leaving comments.
+ * config/tc-xtensa.c (XTHAL_ABI_WINDOWED, XTHAL_ABI_CALL0): New
+ macros.
+ (elf32xtensa_abi): New declaration.
+ (option_abi_windowed, option_abi_call0): New enum constants.
+ (md_longopts): Add entries for --abi-windowed and --abi-call0.
+ (md_parse_option): Add handlers for --abi-windowed and
+ --abi-call0.
+ (xtensa_add_config_info): Use xtensa_abi_choice instead of
+ XSHAL_ABI to format ABI tag.
+ * doc/as.texi (Target Xtensa options): Add --abi-windowed and
+ --abi-call0 to the list of options.
+ * doc/c-xtensa.texi: Add description for options --abi-windowed
+ and --abi-call0.
+ * testsuite/gas/xtensa/abi-call0.d: New test definition.
+ * testsuite/gas/xtensa/abi-windowed.d: New test definition.
+ * testsuite/gas/xtensa/abi.s: New test source.
-2019-12-09 Jan Beulich <jbeulich@suse.com>
+2020-06-14 H.J. Lu <hongjiu.lu@intel.com>
- * config/tc-i386-intel.c (O_mmword_ptr): Define.
- (i386_types): Add mmword entry.
- (i386_intel_simplify, i386_intel_operand): Add comment.
- * testsuite/gas/i386/intel-expr.s: Also test mmword and zmmword.
- * testsuite/gas/i386/intelok.s: Also test "mmword ptr".
- * testsuite/gas/i386/intel-expr.d, testsuite/gas/i386/intelok.d,
- testsuite/gas/i386/intelok.e: Adjust expectations.
+ PR gas/26115
+ * testsuite/gas/i386/tsxldtrk.d: Replace xsuspldtrk with
+ xsusldtrk.
+ * testsuite/gas/i386/tsxldtrk.s: Likewise.
+ * testsuite/gas/i386/x86-64-tsxldtrk.d: Likewise.
+ * testsuite/gas/i386/x86-64-tsxldtrk.s: Likewise.
-2019-12-09 Jan Beulich <jbeulich@suse.com>
+2020-06-12 Nelson Chu <nelson.chu@sifive.com>
- * config/tc-i386-intel.c (i386_intel_operand): Set "byte"
- attribute suffix instead of suffix for floating point insns when
- handling O_near_ptr / O_far_ptr.
- * testsuite/gas/i386/intelbad.s: Add FPU tests.
- * testsuite/gas/i386/intelbad.l: Adjust expectations.
+ * testsuite/gas/riscv/priv-reg-fail-version-1p9.d: Removed.
+ * testsuite/gas/riscv/priv-reg-fail-version-1p9.l: Likewise.
+ * testsuite/gas/riscv/priv-reg-version-1p9.d: Likewise.
-2019-12-09 Jan Beulich <jbeulich@suse.com>
+2020-06-09 Seth Girvan <snth@snthhacks.com>
- * config/tc-i386-intel.c (i386_intel_operand): Set "byte"
- attribute suffix instead of suffix uniformly for insns not
- possibly accepting "tbyte ptr" explicitly.
+ * doc/c-avr.texi: Improve wording.
-2019-12-09 Jan Beulich <jbeulich@suse.com>
+2020-06-09 Jan Beulich <jbeulich@suse.com>
- * config/tc-i386-intel.c (i386_intel_operand): Don't set suffix
- for floating point insns when handling O_fword_ptr.
+ * testsuite/gas/i386/x86-64-pseudos-bad.s,
+ testsuite/gas/i386/x86-64-pseudos-bad.l: New.
-2019-12-09 Jan Beulich <jbeulich@suse.com>
+2020-06-09 Jan Beulich <jbeulich@suse.com>
- * config/tc-i386-intel.c (i386_intel_operand): Don't special
- case LDS et al when handling O_word_ptr.
+ * testsuite/gas/i386/prefix.s: Add bogus prefix-with-VEX/EVEX
+ encoding tests.
+ * testsuite/gas/i386/prefix.d: Adjust expectations.
-2019-12-08 Alan Modra <amodra@gmail.com>
+2020-06-09 Jan Beulich <jbeulich@suse.com>
- * testsuite/gas/aarch64/bfloat16.d: Match 32-bit and 64-bit output.
- * testsuite/gas/aarch64/dgh.d: Likewise.
- * testsuite/gas/aarch64/f32mm.d: Likewise.
- * testsuite/gas/aarch64/f64mm.d: Likewise.
- * testsuite/gas/aarch64/i8mm.d: Likewise.
- * testsuite/gas/aarch64/pac_ab_key.d: Likewise.
- * testsuite/gas/aarch64/pac_negate_ra_state.d: Likewise.
- * testsuite/gas/aarch64/reloc-prel_g0.d: Likewise.
- * testsuite/gas/aarch64/reloc-prel_g0_nc.d: Likewise.
- * testsuite/gas/aarch64/reloc-prel_g1.d: Likewise.
- * testsuite/gas/aarch64/sve-bfloat-movprfx.d: Likewise.
- * testsuite/gas/aarch64/sve-movprfx-mm.d: Likewise.
- * testsuite/gas/aarch64/sve2.d: Likewise.
+ * testsuite/gas/i386/prefix.s: Add bogus REP / EVEX.W prefix
+ with VEX/EVEX encoding tests.
+ * testsuite/gas/i386/prefix.d: Adjust expectations.
-2019-12-06 Kyrylo Tkachov <kyrylo.tkachov@arm.com>
+2020-06-09 Jan Beulich <jbeulich@suse.com>
- * dw2gencfi.c (cfi_pseudo_table): Add cfi_negate_ra_state.
- * testsuite/gas/aarch64/pac_negate_ra_state.s: New file.
- * testsuite/gas/aarch64/pac_negate_ra_state.d: Likewise.
+ * config/tc-i386.c (process_suffix): Restrict defaulting to 'q'
+ suffix.
+ * testsuite/gas/i386/noreg64.s: Add lcall/ljmp cases.
+ * testsuite/gas/i386/noreg64.d: Adjust expectations.
+ * testsuite/gas/i386/noreg-intel64.d,
+ testsuite/gas/i386/noreg-intel64.l,
+ testsuite/gas/i386/noreg-intel64.s: New.
+ * testsuite/gas/i386/i386.exp: Run new tests.
-2019-12-05 Jan Beulich <jbeulich@suse.com>
+2020-06-09 Jan Beulich <jbeulich@suse.com>
+
+ * config/tc-i386.c (vex_encoding_error): New enumerator.
+ (VEX_check_operands): Rename to VEX_check_encoding. Check
+ for vex_encoding_error. Move Imm4 handling ...
+ (check_VecOperands): ... here.
+ (match_template): Call VEX_check_encoding when there are no
+ operands. Split construct calling check_VecOperands and
+ VEX_check_encoding (when there are operands).
+ (check_register): Don't blindly set vex_encoding_evex.
+ * testsuite/gas/i386/pseudos-bad.s,
+ testsuite/gas/i386/pseudos-bad.l: New.
+ * testsuite/gas/i386/i386.exp: Run new test.
+ * testsuite/gas/i386/xmmhi64.s: Drop {vex2}.
- * config/tc-aarch64.c (aarch64_features): Drop redundant AES and
- SHA2 flags from "crypto" entry.
+2020-06-08 Alex Coplan <alex.coplan@arm.com>
-2019-12-05 Jan Beulich <jbeulich@suse.com>
+ * config/tc-arm.c (insns): Add dfb.
+ * testsuite/gas/arm/dfb.d: New test.
+ * testsuite/gas/arm/dfb.s: Input for test.
- * config/tc-aarch64.c (aarch64_features): Make SHA2 a prereq of
- SHA3.
- * testsuite/gas/aarch64/crypto.s
- * testsuite/gas/aarch64/crypto-directive.d: Refer to crypto.d
- for actual output.
- * testsuite/gas/aarch64/illegal-crypto-nofp.l: Relax
- expectations.
- * testsuite/gas/aarch64/crypto-directive2.d,
- testsuite/gas/aarch64/crypto-directive3.d: New.
-
-2019-12-04 Jan Beulich <jbeulich@suse.com>
-
- * config/tc-i386-intel.c (i386_intel_operand): Handle LFS et al
- as well as LGDT at al when processing O_tbyte_ptr.
- * testsuite/gas/i386/intelbad.s: Add LDS et al cases.
- * testsuite/gas/i386/x86-64-intel64.s,
- * testsuite/gas/i386/x86-64-opcode.s: Add LFS et al cases.
- * testsuite/gas/i386/ilp32/x86-64-intel64.d: Add -mintel64
- command line option and fold expectations with parent dir test.
- * testsuite/gas/i386/x86-64-intel64.d: Add -mintel64 command
- line option and adjust expectations.
- * testsuite/gas/i386/intelbad.l,
- testsuite/gas/i386/x86-64-opcode.d: Adjust expectations.
-
-2019-12-04 Jan Beulich <jbeulich@suse.com>
-
- * config/tc-i386-intel.c (i386_intel_operand): Also handle DWORD
- with 64-bit mode branches.
- * testsuite/gas/i386/x86-64-jump.s: Extend Intel syntax branch
- operand coverage.
- * testsuite/gas/i386/x86-64-jump.d: Adjust expectations.
-
-2019-12-04 Jan Beulich <jbeulich@suse.com>
-
- * config/tc-i386.c (output_insn): Don't consider Cpu* settings
- when setting GNU_PROPERTY_X86_FEATURE_2_MMX.
-
-2019-12-04 Jan Beulich <jbeulich@suse.com>
-
- * testsuite/gas/i386/movdir.s: Add Intel syntax case with
- operand size specifier.
- * testsuite/gas/i386/x86-64-movdir.s: Add Intel syntax cases
- with operand size specifier and wit 32-bit operands.
- * testsuite/gas/i386/movdir-intel.d,
- testsuite/gas/i386/movdir.d,
- testsuite/gas/i386/x86-64-movdir-intel.d,
- testsuite/gas/i386/x86-64-movdir.d: Adjust expectations.
-
-2019-12-04 Jan Beulich <jbeulich@suse.com>
-
- * config/tc-i386.c (process_suffix): Arrange for insns with a
- single non-GPR register operand to not have its suffix guessed
- from GPR operands. Extend DefaultSize handling to cover PUSH/POP
- of segment registers.
- * testsuite/gas/i386/general.s: Add PUSH/POP sreg to .code16gcc
- set of insns.
- * testsuite/gas/i386/general.l: Adjust expectations.
-
-2019-12-04 Jan Beulich <jbeulich@suse.com>
-
- * config/tc-i386.c (process_suffix): Exclude SYSRET alongside
- FLDENV et al.
- * testsuite/gas/i386/general.s: Expand .code16gcc set of insns.
- * testsuite/gas/i386/general.l: Adjust expectations.
-
-2019-11-22 Andrew Burgess <andrew.burgess@embecosm.com>
-
- * as.c (flag_dwarf_cie_version): Change initial value to -1, and
- update comment.
- * config/tc-riscv.c (riscv_after_parse_args): Set
- flag_dwarf_cie_version if it has not already been set.
- * dwarf2dbg.c (dwarf2_init): Initialise flag_dwarf_cie_version if
- needed.
- * testsuite/gas/riscv/default-cie-version.d: New file.
- * testsuite/gas/riscv/default-cie-version.s: New file.
-
-2019-11-22 Andrew Burgess <andrew.burgess@embecosm.com>
-
- * dw2gencfi.c (output_cie): Error on return column overflow.
- * testsuite/gas/riscv/cie-rtn-col-1.d: New file.
- * testsuite/gas/riscv/cie-rtn-col-3.d: New file.
- * testsuite/gas/riscv/cie-rtn-col.s: New file.
-
-2019-11-22 Andrew Burgess <andrew.burgess@embecosm.com>
-
- * config/tc-riscv.c (tc_riscv_regname_to_dw2regnum): Lookup CSR
- names too.
- * testsuite/gas/riscv/csr-dw-regnums.d: New file.
- * testsuite/gas/riscv/csr-dw-regnums.s: New file.
-
-2019-11-22 Andrew Burgess <andrew.burgess@embecosm.com>
-
- * config/tc-riscv.c (struct regname): Delete.
- (hash_reg_names): Handle value as 'void *'.
-
-2019-11-25 Andrew Pinski <apinski@marvell.com>
-
- * config/tc-aarch64.c (md_begin): Use correct
- hash table for uppercase version of hint.
- * testsuite/gas/aarch64/system-2.s: Extend psb case to uppercase.
- * testsuite/gas/aarch64/system-2.d: Update.
-
-2019-11-25 Christian Eggers <ceggers@gmx.de>
-
- * as.h: Define SEC_OCTETS as SEC_ELF_OCTETS if OBJ_ELF.
- * dwarf2dbg.c: (dwarf2_finish): Set section flag SEC_OCTETS for
- .debug_line, .debug_info, .debug_abbrev, .debug_aranges, .debug_str
- and .debug_ranges sections.
- * write.c (maybe_generate_build_notes): Set section flag
- SEC_OCTETS for .gnu.build.attributes section.
- * frags.c (frag_now_fix): Don't divide by OCTETS_PER_BYTE if
- SEC_OCTETS is set.
- * symbols.c (resolve_symbol_value): Likewise.
-
-2019-11-25 Christian Eggers <ceggers@gmx.de>
-
- * dwarf2dbg.c (out_set_addr): Revert 2019-03-13 change.
- (out_debug_line, out_debug_aranges, out_debug_info): Likewise.
- * symbols.h (symbol_set_value_now_octets, symbol_octets_p): Remove.
- * symbols.c (struct symbol_flags): Remove member sy_octets.
- (symbol_temp_new_now_octets): Don't set symbol_flags::sy_octets.
- (resolve_symbol_value): Revert: Return octets instead of bytes if
- sy_octets is set.
- (symbol_set_value_now_octets): Remove.
- (symbol_octets_p): Remove.
-
-2019-11-22 Mihail Ionescu <mihail.ionescu@arm.com>
-
- * config/tc-arm.c (arm_ext_crc): New.
- (crc_ext_armv8): Remove.
- (insns): Rename crc_ext_armv8 to arm_ext_crc.
- (arm_cpus): Replace CRC_EXT_ARMV8 with ARM_EXT2_CRC.
- (armv8a_ext_table, armv8r_ext_table,
- arm_option_extension_value_table): Redefine the crc
- extension in terms of ARM_EXT2_CRC.
- * gas/testsuite/gas/arm/crc-ext.s: New.
- * gas/testsuite/gas/arm/crc-ext.d: New.
-
-2019-11-20 Alan Modra <amodra@gmail.com>
-
- PR 24944
- * atof-generic.c (atof_generic): Increase decimal guard digits.
- * testsuite/gas/i386/fp.s: Add more tests.
- * testsuite/gas/i386/fp.d: Update.
-
-2019-11-18 Andrew Burgess <andrew.burgess@embecosm.com>
-
- * as.c (parse_args): Parse --gdwarf-cie-version option.
- (flag_dwarf_cie_version): New variable.
- * as.h (flag_dwarf_cie_version): Declare.
- * dw2gencfi.c (output_cie): Switch from DW_CIE_VERSION to
- flag_dwarf_cie_version.
- * doc/as.texi (Overview): Document --gdwarf-cie-version.
- * NEWS: Likewise.
- * testsuite/gas/cfi/cfi.exp: Add new tests.
- * testsuite/gas/cfi/cie-version-0.d: New file.
- * testsuite/gas/cfi/cie-version-1.d: New file.
- * testsuite/gas/cfi/cie-version-2.d: New file.
- * testsuite/gas/cfi/cie-version-3.d: New file.
- * testsuite/gas/cfi/cie-version-4.d: New file.
- * testsuite/gas/cfi/cie-version.s: New file.
-
-2019-11-14 Jan Beulich <jbeulich@suse.com>
-
- * config/tc-i386.c (operand_size_match, md_assemble,
- parse_insn, match_template, process_suffix, output_jump,
- output_insn, i386_displacement): Adjust jump* field use/
- handling.
- * config/tc-i386-intel.c (i386_intel_operand): Likewise.
-
-2019-11-14 Jan Beulich <jbeulich@suse.com>
-
- * config/tc-i386.c (struct _i386_insn): Add jumpabsolute field.
- (operand_type_match): Drop jumpabsolute use.
- (type_names): Remove OPERAND_TYPE_JUMPABSOLUTE entry.
- (process_suffix, i386_displacement): Adjust jumpabsolute uses.
- (match_template, i386_att_operand): Adjust jumpabsolute
- handling.
- * config/tc-i386-intel.c (i386_intel_operand): Likewise.
-
-2019-11-14 Jan Beulich <jbeulich@suse.com>
-
- * config/tc-i386.c (operand_size_match): Adjust anysize use.
-
-2019-11-14 Jan Beulich <jbeulich@suse.com>
-
- * testsuite/gas/i386/intel-cmps32.d,
- testsuite/gas/i386/intel-cmps64.d: Correct regexp closing
- parentheses placement.
-
-2019-11-14 Jan Beulich <jbeulich@suse.com>
-
- * testsuite/gas/i386/intel-cmps.s,
- testsuite/gas/i386/intel-movs.s: Extend.
- * testsuite/gas/i386/intel-cmps32.d,
- testsuite/gas/i386/intel-cmps64.d,
- testsuite/gas/i386/intel-movs32.d,
- testsuite/gas/i386/intel-movs64.d: Adjust expectations.
- * testsuite/gas/i386/intel-cmps16.d,
- testsuite/gas/i386/intel-movs16.d: New.
- * testsuite/gas/i386/i386.exp: Run new tests.
+2020-06-08 Nick Clifton <nickc@redhat.com>
-2019-11-12 Nelson Chu <nelson.chu@sifive.com>
+ * testsuite/gas/cfi/cfi-i386-2.d: Skip for PE based targets.
- * testsuite/gas/riscv/insn.d: Add the f extension to -march option.
+2020-06-08 Jan Beulich <jbeulich@suse.com>
-2019-11-12 Mihail Ionescu <mihail.ionescu@arm.com>
+ * config/tc-i386.c (pi): Add checks for RegMask and RegBND.
- * config/tc-arm.c (do_vfp_nsyn_push): Move in order to enable it for
- both fpu_vfp_ext_v1xd and mve_ext and add call to the aliased vstm
- instruction for mve_ext.
- (do_vfp_nsyn_pop): Move in order to enable it for both
- fpu_vfp_ext_v1xd and mve_ext and add call to the aliased vldm
- instruction for mve_ext.
- (do_neon_ldm_stm): Add fpu_vfp_ext_v1 and mve_ext checks.
- (insns): Enable vldm, vldmia, vldmdb, vstm, vstmia, vstmdb, vpop,
- vpush, and fldd, fstd, flds, fsts for arm_ext_v6t2 instead
- of fpu_vfp_ext_v1xd.
- * testsuite/gas/arm/v8_1m-mve.s: New.
- * testsuite/gas/arm/v8_1m-mve.d: New.
+2020-06-08 Jan Beulich <jbeulich@suse.com>
-2019-11-12 Mihail Ionescu <mihail.ionescu@arm.com>
+ * config/tc-i386.c (check_byte_reg): Drop dead conditional
+ around as_bad().
- * gas/config/tc-arm.c (do_neon_mvn): Allow mve_ext cmode=0xd.
- * testsuite/gas/arm/mve-vmov-vmvn-vorr-vbic.s: New test.
- * testsuite/gas/arm/mve-vmov-vmvn-vorr-vbic.d: Likewise.
+2020-06-08 Jan Beulich <jbeulich@suse.com>
-2019-11-12 Mihail Ionescu <mihail.ionescu@arm.com>
+ * config/tc-i386.c (check_register): Split RegTR handling, to
+ fail recognition also in 64-bit mode as well as with i586 or
+ i686 explicitly enabled.
+ * testsuite/gas/i386/x86_64.s: Add insns referencing tr<N>.
+ * testsuite/gas/i386/x86_64-intel.d,
+ testsuite/gas/i386/x86_64.d: Adjust expectations.
- * config/tc-arm.c (s_arm_fpu): Clear selected_cpu fpu bits.
- (fpu_any): Remove OBJ_ELF guards.
- * testsuite/gas/arm/fpu-rst.s: New.
- * testsuite/gas/arm/fpu-rst.d: New.
- * testsuite/gas/arm/fpu-rst.l: New.
+2020-06-08 Jan Beulich <jbeulich@suse.com>
-2019-11-12 Jan Beulich <jbeulich@suse.com>
+ * testsuite/gas/cfi/cfi-i386-2.d: Adjust expectations.
+ * testsuite/gas/cfi/cfi.exp: Run this test.
- * config/tc-i386.c (type_names): Remove OPERAND_TYPE_ESSEG
- entry.
- (md_assemble): Adjust isstring field use. Add assertion.
- (check_string): Mostly re-write.
- (i386_index_check): Adjust isstring field use and related code.
+2020-06-08 Jan Beulich <jbeulich@suse.com>
-2019-11-12 Jan Beulich <jbeulich@suse.com>
+ * config/tc-i386.c (parse_real_register): Add allow_pseudo_reg
+ check to %st(N) parsing logic.
+ * testsuite/gas/cfi/cfi-i386.s: Set "generic32" arch.
- * config/tc-i386.c (process_immext): Remove SSE3, SVME, and
- MWAITX special case logic.
- (process_suffix): Replace immext field uses by instance ones.
- * testsuite/gas/i386/arch-13.s,
- testsuite/gas/i386/x86-64-arch-3.s: Add CLZERO with operand
- cases.
- * testsuite/gas/i386/svme.s: Add 16-bit operand cases.
- * testsuite/gas/i386/x86-64-specific-reg.s: Drop FIXME comments.
- * testsuite/gas/i386/arch-13.d,
- testsuite/gas/i386/mwaitx-reg.l, testsuite/gas/i386/svme.d,
- testsuite/gas/i386/x86-64-arch-3.d,
- testsuite/gas/i386/x86-64-mwaitx-reg.l,
- testsuite/gas/i386/x86-64-specific-reg.l: Adjust expectations.
-
-2019-11-12 Jan Beulich <jbeulich@suse.com>
-
- * config/tc-i386.c (operand_type_set, operand_type_and,
- operand_type_and_not, operand_type_or, operand_type_xor): Handle
- "instance" field specially.
- (operand_size_match, md_assemble, match_template, process_suffix,
- check_byte_reg, check_long_reg, check_qword_reg, check_word_reg,
- process_operands, build_modrm_byte): Use "instance" instead of
- "acc" / "inoutportreg" / "shiftcount" fields.
- (optimize_imm): Adjust comment.
-
-2019-11-11 Jan Beulich <jbeulich@suse.com>
-
- * testsuite/gas/aarch64/illegal-sve2.s: Add smaxp/sminp cases
- with mismatched 1st and 3rd operands.
- * testsuite/gas/aarch64/illegal-sve2.l: Adjust expectations.
-
-2019-11-08 H.J. Lu <hongjiu.lu@intel.com>
-
- PR gas/25167
- * config/tc-i386.c (match_template): Don't check instruction
- suffix set from operand.
- * testsuite/gas/i386/code16.d: New file.
- * testsuite/gas/i386/code16.s: Likewise.
- * testsuite/gas/i386/i386.exp: Run code16.
-
-2019-11-08 Jan Beulich <jbeulich@suse.com>
-
- * config/tc-i386.c (optimize_encoding, build_modrm_byte,
- check_VecOperations, parse_real_register): Use "class" instead
- of "regmask" and "regbnd" fields.
-
-2019-11-08 Jan Beulich <jbeulich@suse.com>
-
- * config/tc-i386.c (match_mem_size, operand_size_match,
- operand_type_register_match, pi, check_VecOperands, match_template,
- check_byte_reg, check_long_reg, check_qword_reg, process_operands,
- build_modrm_byte, parse_real_register): Use "class" instead of
- "regsimd" / "regmmx" fields.
-
-2019-11-08 Jan Beulich <jbeulich@suse.com>
-
- * config/tc-i386.c (pi, check_byte_reg, build_modrm_byte,
- parse_real_register): Use "class" instead of "control"/"debug"/
- "test" fields.
-
-2019-11-08 Jan Beulich <jbeulich@suse.com>
-
- * config/tc-i386.c (pi, check_byte_reg, process_operands,
- build_modrm_byte, i386_att_operand, parse_real_register): Use
- "class" instead of "sreg" field.
- * config/tc-i386-intel.c (i386_intel_simplify_register,
- i386_intel_operand): Likewise.
-
-2019-11-08 Jan Beulich <jbeulich@suse.com>
-
- * config/tc-i386.c (operand_type_set, operand_type_and,
- operand_type_and_not, operand_type_or, operand_type_xor): Handle
- "class" field specially.
- (anyimm): New.
- (operand_type_check, operand_size_match,
- operand_type_register_match, pi, md_assemble, is_short_form,
- process_suffix, check_byte_reg, check_long_reg, check_qword_reg,
- check_word_reg, process_operands, build_modrm_byte): Use "class"
- instead of "reg" field.
- (optimize_imm): Likewise. Reduce redundancy. Adjust calculation
- of "allowed".
-
-2019-11-07 Mihail Ionescu <mihail.ionescu@arm.com>
-
- * testsuite/gas/aarch64/dgh.s: New test.
- * testsuite/gas/aarch64/dgh.d: New test.
-
-2019-11-07 Mihail Ionescu <mihail.ionescu@arm.com>
-
- * config/tc-arm.c (arm_ext_i8mm): New feature set.
- (do_vusdot): New.
- (do_vsudot): New.
- (do_vsmmla): New.
- (do_vummla): New.
- (insns): Add vsmmla, vummla, vusmmla, vusdot, vsudot mnemonics.
- (armv86a_ext_table): Add i8mm extension.
- (arm_extensions): Move bf16 extension to context sensitive table.
- (armv82a_ext_table, armv84a_ext_table, armv85a_ext_table):
- Move bf16 extension to context sensitive table.
- (armv86a_ext_table): Add i8mm extension.
- * doc/c-arm.texi: Document i8mm extension.
- * testsuite/gas/arm/i8mm.s: New test.
- * testsuite/gas/arm/i8mm.d: New test.
- * testsuite/gas/arm/bfloat17-cmdline-bad-3.d: Update test.
-
-2019-11-07 Mihail Ionescu <mihail.ionescu@arm.com>
-
- * config/tc-aarch64.c: Add new arch fetures to suppport the mm extension.
- (parse_operands): Add new operand.
- * testsuite/gas/aarch64/i8mm.s: New test.
- * testsuite/gas/aarch64/i8mm.d: New test.
- * testsuite/gas/aarch64/f32mm.s: New test.
- * testsuite/gas/aarch64/f32mm.d: New test.
- * testsuite/gas/aarch64/f64mm.s: New test.
- * testsuite/gas/aarch64/f64mm.d: New test.
- * testsuite/gas/aarch64/sve-movprfx-mm.s: New test.
- * testsuite/gas/aarch64/sve-movprfx-mm.d: New test.
-
-2019-11-07 Mihail Ionescu <mihail.ionescu@arm.com>
-2019-11-07 Barnaby Wilks <barnaby.wilks@arm.com>
-
- * config/tc-aarch64.c (md_atof): Add encoding for the bfloat16 format.
- * testsuite/gas/aarch64/bfloat16-directive-le.d: New test.
- * testsuite/gas/aarch64/bfloat16-directive-be.d: New test.
- * testsuite/gas/aarch64/bfloat16-directive.s: New test.
-
-2019-11-07 Mihail Ionescu <mihail.ionescu@arm.com>
-2019-11-07 Barnaby Wilks <barnaby.wilks@arm.com>
-
- * config/tc-arm.c (md_atof): Add encoding for bfloat16
- * testsuite/gas/arm/bfloat16-directive-le.d: New test.
- * testsuite/gas/arm/bfloat16-directive-be.d: New test.
- * testsuite/gas/arm/bfloat16-directive.s: New test.
-
-2019-11-07 Mihail Ionescu <mihail.ionescu@arm.com>
-2019-11-07 Barnaby Wilks <barnaby.wilks@arm.com>
-
- * as.h (atof_ieee_detail): Add prototype for atof_ieee_detail function.
- (atof_ieee): Move some code into the atof_ieee_detail function.
- (atof_ieee_detail): Add function that provides a higher level of
- control over generating IEEE-like numbers.
-
-2019-11-07 Mihail Ionescu <mihail.ionescu@arm.com>
-2019-11-07 Matthew Malcomson <matthew.malcomson@arm.com>
-
- * config/tc-arm.c (arm_archs): Add armv8.6-a option.
- (cpu_arch_ver): Add TAG_CPU_ARCH_V8 tag for Armv8.6-a.
- * doc/c-arm.texi (-march): New armv8.6-a arch.
- * config/tc-arm.c (arm_ext_bf16): New feature set.
- (enum neon_el_type): Add NT_bfloat value.
- (B_MNEM_vfmat, B_MNEM_vfmab): New bfloat16 encoder
- helpers.
- (BAD_BF16): New message.
- (parse_neon_type): Add bf16 type specifier.
- (enum neon_type_mask): Add N_BF16 type.
- (type_chk_of_el_type): Account for NT_bfloat.
- (el_type_of_type_chk): Account for N_BF16.
- (neon_three_args): Split out from neon_three_same.
- (neon_three_same): Part split out into neon_three_args.
- (CVT_FLAVOUR_VAR): Add bf16_f32 cvt flavour.
- (do_neon_cvt_1): Account for vcvt.bf16.f32.
- (do_bfloat_vmla): New.
- (do_mve_vfma): New function to deal with the mnemonic clash between the BF16
- vfmat and the MVE vfma in a VPT block with a 't'rue condition.
- (do_neon_cvttb_1): Account for vcvt{t,b}.bf16.f32.
- (do_vdot): New
- (do_vmmla): New
- (insns): Add vdot and vmmla mnemonics.
- (arm_extensions): Add "bf16" extension.
- * doc/c-arm.texi: Document "bf16" extension.
- * testsuite/gas/arm/attr-march-armv8_6-a.d: New test.
- * testsuite/gas/arm/bfloat16-bad.d: New test.
- * testsuite/gas/arm/bfloat16-bad.l: New test.
- * testsuite/gas/arm/bfloat16-bad.s: New test.
- * testsuite/gas/arm/bfloat16-cmdline-bad-2.d: New test.
- * testsuite/gas/arm/bfloat16-cmdline-bad-3.d: New test.
- * testsuite/gas/arm/bfloat16-cmdline-bad.d: New test.
- * testsuite/gas/arm/bfloat16-neon.s: New test.
- * testsuite/gas/arm/bfloat16-non-neon.s: New test.
- * testsuite/gas/arm/bfloat16-thumb-bad.d: New test.
- * testsuite/gas/arm/bfloat16-thumb-bad.l: New test.
- * testsuite/gas/arm/bfloat16-thumb.d: New test.
- * testsuite/gas/arm/bfloat16-vfp.d: New test.
- * testsuite/gas/arm/bfloat16.d: New test.
- * testsuite/gas/arm/bfloat16.s: New test.
-
-2019-11-07 Mihail Ionescu <mihail.ionescu@arm.com>
-2019-11-07 Matthew Malcomson <matthew.malcomson@arm.com>
-
- * config/tc-aarch64.c (vectype_to_qualifier): Special case the
- S_2H operand qualifier.
- * doc/c-aarch64.texi: Document bf16 extension.
- * testsuite/gas/aarch64/bfloat16.d: New test.
- * testsuite/gas/aarch64/bfloat16.s: New test.
- * testsuite/gas/aarch64/illegal-bfloat16.d: New test.
- * testsuite/gas/aarch64/illegal-bfloat16.l: New test.
- * testsuite/gas/aarch64/illegal-bfloat16.s: New test.
- * testsuite/gas/aarch64/sve-bfloat-movprfx.s: New test.
- * testsuite/gas/aarch64/sve-bfloat-movprfx.d: New test.
-
-2019-11-07 Mihail Ionescu <mihail.ionescu@arm.com>
-2019-11-07 Matthew Malcomson <matthew.malcomson@arm.com>
-
- * config/tc-aarch64.c (armv8.6-a): New arch.
- * doc/c-aarch64.texi (armv8.6-a): Document new arch.
-
-2019-11-07 Jan Beulich <jbeulich@suse.com>
-
- * config/tc-i386.c (cpu_arch): Add .rdpru and .mcommit entries.
- * doc/c-i386.texi: Mention rdpru and mcommit.
- * testsuite/gas/i386/arch-13.s,
- testsuite/gas/i386/x86-64-arch-3.s: Add mcommit and rdpru cases.
- * testsuite/gas/i386/arch-13.d,
- testsuite/gas/i386/x86-64-arch-3.d: Extend -march=. Adjust
- expectations.
- * testsuite/gas/i386/arch-13-znver1.d: Extend -march=. Redirect
- expectations to arch-13.d.
- * testsuite/gas/i386/arch-13-znver2.d: Redirect expectations to
- arch-13.d.
- testsuite/gas/i386/x86-64-arch-3-znver1.d: Extend -march=.
-
-2019-11-07 Jan Beulich <jbeulich@suse.com>
-
- * testsuite/gas/i386/x86-64-arch-3.s: Add monitorx/mwaitx cases
- with canonical operand sizes.
- * testsuite/gas/i386/x86-64-sse3.s: Add monitor/mwait cases with
- canonical operand sizes.
- * testsuite/gas/i386/x86-64-arch-3-znver1.d,
- testsuite/gas/i386/x86-64-arch-3-znver2.d: Redirect expectations
- to x86-64-arch-3.d.
- * testsuite/gas/i386/ilp32/x86-64-sse-noavx.d: Redirect
- expectations to parent dir's x86-64-sse-noavx.d.
- * testsuite/gas/i386/ilp32/x86-64-sse3.d: Redirect expectations
- to to parent dir's x86-64-sse3.d.
- * testsuite/gas/i386/x86-64-arch-3.d,
- testsuite/gas/i386/x86-64-mwaitx-bdver4.d,
- testsuite/gas/i386/x86-64-sse-noavx.d,
- testsuite/gas/i386/x86-64-sse3.d,
- testsuite/gas/i386/x86-64-suffix.d: Adjust expectations.
-
-2019-11-04 Jan Beulich <jbeulich@suse.com>
-
- * config/tc-i386.c (process_operands): Handle ShortForm insns
- later, splitting out their segment register sub-form.
-
-2019-10-31 H.J. Lu <hongjiu.lu@intel.com>
-
- * testsuite/gas/i386/general.s: Add .code16gcc fldenv tests.
- * testsuite/gas/i386/general.l: Updated.
+2020-06-08 Jan Beulich <jbeulich@suse.com>
-2019-10-31 Mihail Ionescu <mihail.ionescu@arm.com>
-
- * config/tc-arm.c (selected_ctx_ext_table) New static variable.
- (arm_parse_arch): Set context sensitive extension table based on the
- chosen base architecture.
- (s_arm_arch_extension): Change to lookup extensions in the new context
- sensitive tables.
- * gas/testsuite/gas/arm/mve-ext.s: New.
- * gas/testsuite/gas/arm/mve-ext.d: New.
- * gas/testsuite/gas/arm/mvefp-ext.s: New.
- * gas/testsuite/gas/arm/mvefp-ext.d: New.
-
-2019-10-30 Delia Burduv <Delia.Burduv@arm.com>
-
- * config/tc-aarch64.c (parse_address_main): Accept the omission of
- the immediate argument for ldraa and ldrab as a shorthand for the
- immediate being 0.
- * testsuite/gas/aarch64/ldraa-ldrab-no-offset.d: New test.
- * testsuite/gas/aarch64/ldraa-ldrab-no-offset.s: New test.
- * testsuite/gas/aarch64/illegal-ldraa.s: Modified to accept the
- writeback form with no offset.
- * testsuite/gas/aarch64/illegal-ldraa.s: Removed missing offset
- error.
-
-2019-10-30 Jan Beulich <jbeulich@suse.com>
-
- * testsuite/gas/i386/noreg16.d, testsuite/gas/i386/noreg16.s,
- testsuite/gas/i386/noreg32.d, testsuite/gas/i386/noreg32.s,
- testsuite/gas/i386/noreg64.d, testsuite/gas/i386/noreg64.s: New.
+ * config/tc-i386.c (bad_reg): New.
+ (check_VecOperations, i386_att_operand, i386_parse_name): Check
+ for it.
+ (check_register): New, broken out from ...
+ (parse_real_register): ... here. Call it.
+ (parse_register): Call it, and error upon failure.
+ * testsuite/gas/i386/equ-bad.s, testsuite/gas/i386/equ-bad.l,
+ testsuite/gas/i386/x86-64-equ-bad.s,
+ testsuite/gas/i386/x86-64-equ-bad.l: New.
* testsuite/gas/i386/i386.exp: Run new tests.
-2019-10-30 Jan Beulich <jbeulich@suse.com>
-
- * config/tc-i386.c (optimize_encoding): Adjust opcodes compared
- against. Adjust replacement opcode and clear .w.
-
-2019-10-29 Alan Modra <amodra@gmail.com>
-
- PR 25125
- * dw2gencfi.c (output_cfi_insn): Don't allow DW_CFA_advance_loc4
- to be placed in a different frag to the rs_cfa.
-
-2019-10-26 John David Anglin <danglin@gcc.gnu.org>
-
- PR gas/25121
- * config/tc-hppa.c (tc_gen_reloc): Cast some enums to int.
- (md_assemble): Likewise.
-
-2019-10-26 Alan Modra <amodra@gmail.com>
-
- PR 25125
- * dw2gencfi.c (output_cfi_insn): Don't output DW_CFA_advance_loc+0.
- * ehopt.c (eh_frame_estimate_size_before_relax): Return -1 for
- an advance_loc of zero.
- (eh_frame_relax_frag): Translate fr_subtype of 7 to size -1.
- (eh_frame_convert_frag): Handle fr_subtype of 7. Abort on
- unexpected fr_subtype.
-
-2019-10-25 Alan Modra <amodra@gmail.com>
-
- PR gas/25125
- PR gas/12049
- * write.c (relax_frag): Correct calculation of delta for
- positive branches where "stretch" would make the branch
- negative. Return zero immediately in that case. Correct
- TC_PCREL_ADJUST comment.
-
-2019-10-16 Alan Modra <amodra@gmail.com>
-
- * config/tc-xtensa.c (xg_order_trampoline_chain_entry): Don't
- call S_GET_VALUE multiple times for a symbol. Rearrange code
- so it is obvious what is the primary sort key.
- (xg_order_trampoline_chain): Similarly.
-
-2019-10-15 Alan Modra <amodra@gmail.com>
-
- * config/tc-nds32.c (nds32_set_section_relocs): Use relocs and n
- parameters rather than equivalent sec->orelocation and
- sec->reloc_count. Don't sort for n <= 1. Tidy.
-
-2019-10-09 Nick Clifton <nickc@redhat.com>
-
- PR 25041
- * testsuite/gas/avr/pr25041.s: New test.
- * testsuite/gas/avr/pr25041.d: New test driver.
-
-2019-10-07 Jozef Lawrynowicz <jozef.l@mittosystems.com>
-
- * config/tc-msp430.c (md_parse_option): Set lower_data_region_only
- to FALSE if the data region is set to "upper", "either" or "none".
- (msp430_object_attribute): New.
- (md_pseudo_table): Handle .mspabi_attribute and .gnu_attribute.
- (msp430_md_end): Replace hard-coded attribute values with enums.
- Handle data region object attribute.
- * doc/as.texi: Document MSP430 Data Region object attribute.
- * doc/c-msp430.texi: Document the .mspabi_attribute directive.
- * testsuite/gas/msp430/attr-430-small-bad.d: New test.
- * testsuite/gas/msp430/attr-430-small-bad.l: New test.
- * testsuite/gas/msp430/attr-430-small-good.d: New test.
- * testsuite/gas/msp430/attr-430-small.s: New test.
- * testsuite/gas/msp430/attr-430x-large-any-bad.d: New test.
- * testsuite/gas/msp430/attr-430x-large-any-bad.l: New test.
- * testsuite/gas/msp430/attr-430x-large-any-good.d: New test.
- * testsuite/gas/msp430/attr-430x-large-any.s: New test.
- * testsuite/gas/msp430/attr-430x-large-lower-bad.d: New test.
- * testsuite/gas/msp430/attr-430x-large-lower-bad.l: New test.
- * testsuite/gas/msp430/attr-430x-large-lower-good.d: New test.
- * testsuite/gas/msp430/attr-430x-large-lower.s: New test.
- * testsuite/gas/msp430/msp430.exp: Run new tests.
-
-2019-10-07 Jan Beulich <jbeulich@suse.com>
-
- * config/tc-i386.c (check_string): Make reported operand number
- depend on Intel syntax.
- * testsuite/gas/i386/intel-cmps.s,
- testsuite/gas/i386/intel-cmps32.d,
- testsuite/gas/i386/intel-cmps64.d: New.
- * testsuite/gas/i386/i386.exp: Run new tests.
- * testsuite/gas/i386/intel-movs.s: Extend.
- * testsuite/gas/i386/intel-movs32.d,
- testsuite/gas/i386/intel-movs64.d: Adjust expectations.
- * testsuite/gas/i386/string-bad.l: Tighten expectations.
+2020-06-06 Alan Modra <amodra@gmail.com>
-2019-09-24 Tamar Christina <tamar.christina@arm.com>
+ * config/tc-ppc.c (md_show_usage): Mention -mpower10 and -mpwr10.
+ * doc/c-ppc.texi: Likewise.
- PR gas/24991
- * config/tc-arm.c (out_of_range_p): New.
- (md_apply_fix): Use it in BFD_RELOC_THUMB_PCREL_BRANCH9,
- BFD_RELOC_THUMB_PCREL_BRANCH12, BFD_RELOC_THUMB_PCREL_BRANCH20,
- BFD_RELOC_THUMB_PCREL_BRANCH23, BFD_RELOC_THUMB_PCREL_BRANCH25
- * testsuite/gas/arm/pr24991.d: New test.
- * testsuite/gas/arm/pr24991.l: New test.
- * testsuite/gas/arm/pr24991.s: New test.
+2020-06-06 Alan Modra <amodra@gmail.com>
-2019-09-23 Alan Modra <amodra@gmail.com>
+ * config/tc-ppc.c: Update throughout for reloc renaming.
- * config/obj-ecoff.c: Include ecoff-bfd.h.
- * config/obj-elf.c: Likewise.
+2020-06-05 Jose E. Marchesi <jose.marchesi@oracle.com>
-2019-09-23 Alan Modra <amodra@gmail.com>
+ * config/tc-bpf.c (md_apply_fix): Avoid GCC 10 warning
+ stringop-overflow.
- * config/tc-arm.c: Include cpu-arm.h.
+2020-06-05 Nelson Chu <nelson.chu@sifive.com>
-2019-09-21 Alan Modra <amodra@gmail.com>
+ * config/tc-riscv.c (explicit_csr): New static boolean.
+ Used to indicate CSR are explictly used.
+ (riscv_ip): Set explicit_csr to TRUE if any CSR is used.
+ (riscv_write_out_attrs): If we already have set elf priv
+ attributes, then generate them. Otherwise, don't generate
+ them when no CSR are used.
+ * testsuite/gas/riscv/attribute-01.d: Remove the priv attributes.
+ * testsuite/gas/riscv/attribute-02.d: Likewise.
+ * testsuite/gas/riscv/attribute-03.d: Likewise.
+ * testsuite/gas/riscv/attribute-04.d: Likewise.
+ * testsuite/gas/riscv/attribute-05.d: Likewise.
+ * testsuite/gas/riscv/attribute-06.d: Likewise.
+ * testsuite/gas/riscv/attribute-07.d: Likewise.
+ * testsuite/gas/riscv/attribute-08.d: Likewise.
+ * testsuite/gas/riscv/attribute-09.d: Likewise.
+ * testsuite/gas/riscv/attribute-10.d: Likewise.
+ * testsuite/gas/riscv/attribute-unknown.d: Likewise.
+ * testsuite/gas/riscv/attribute-11.s: New testcase.
+ * testsuite/gas/riscv/attribute-11.d: New testcase. The CSR is
+ used, so we should output the ELF priv attributes.
+ * testsuite/gas/riscv/attribute-12.d: New testcase. The CSR is
+ used, so output the priv attributes according to the -mpriv-spec.
+ * testsuite/gas/riscv/attribute-13.d: New testcase. The CSR isn't
+ used, so ignore the -mpriv-spec setting.
- * config/tc-i386.c (md_parse_option): Fix warning on vexwig assignment.
+2020-06-04 H.J. Lu <hongjiu.lu@intel.com>
-2019-09-20 Alan Modra <amodra@gmail.com>
+ * config/tc-ip2k. (ip2k_apply_fix): Pass endianness to
+ cgen_get_insn_value.
+ * config/tc-xstormy16.c (xstormy16_md_apply_fix): Pass
+ endianness to cgen_get_insn_value and cgen_put_insn_value.
- * config/tc-tic6x.c (tc_gen_reloc): Correct common symbol check.
+2020-06-04 Jose E. Marchesi <jose.marchesi@oracle.com>
-2018-09-20 Jan Beulich <jbeulich@suse.com>
+ * config/tc-bpf.c (md_apply_fix): Simplify and avoid using
+ cgen_put_insn_value.
- PR gas/25012
- * config/tc-i386.c (process_operands): Adjust handling of
- PUSH/POP of segment registers.
- * testsuite/gas/i386/x86-64-opcode.s: Add PUSHq/POPq case with
- %fs/%gs operands. Add PUSHF/POPF case without suffix.
- * testsuite/gas/i386/x86-64-opcode.d: Adjust expectations.
+2020-06-04 Jose E. Marchesi <jose.marchesi@oracle.com>
-2019-09-19 Matthew Malcomson <matthew.malcomson@arm.com>
+ * config/tc-bpf.c (md_begin): Pass CGEN_CPU_OPEN_INSN_ENDIAN to
+ bpf_cgen_cpu_open.
+ (md_assemble): Remove no longer needed hack.
- * NEWS: Add SVE2 and TME entries.
+2020-06-04 Jose E. Marchesi <jose.marchesi@oracle.com>
-2019-09-18 Alan Modra <amodra@gmail.com>
+ * cgen.c (gas_cgen_finish_insn): Pass the endianness to
+ cgen_put_insn_value.
+ (gas_cgen_md_apply_fix): Likewise.
+ (gas_cgen_md_apply_fix): Likewise.
+ * config/tc-bpf.c (md_apply_fix): Pass data endianness to
+ cgen_put_insn_value.
+ * config/tc-mep.c (mep_check_ivc2_scheduling): Pass endianness to
+ cgen_put_insn_value.
- * as.c, * as.h, * dw2gencfi.c, * dwarf2dbg.c, * ecoff.c,
- * read.c, * stabs.c, * subsegs.c, * subsegs.h, * write.c,
- * config/obj-coff-seh.c, * config/obj-coff.c, * config/obj-ecoff.c,
- * config/obj-elf.c, * config/obj-macho.c, * config/obj-som.c,
- * config/tc-aarch64.c, * config/tc-alpha.c, * config/tc-arc.c,
- * config/tc-arm.c, * config/tc-avr.c, * config/tc-bfin.c,
- * config/tc-bpf.c, * config/tc-d10v.c, * config/tc-d30v.c,
- * config/tc-epiphany.c, * config/tc-fr30.c, * config/tc-frv.c,
- * config/tc-h8300.c, * config/tc-hppa.c, * config/tc-i386.c,
- * config/tc-ia64.c, * config/tc-ip2k.c, * config/tc-iq2000.c,
- * config/tc-lm32.c, * config/tc-m32c.c, * config/tc-m32r.c,
- * config/tc-m68hc11.c, * config/tc-mep.c, * config/tc-microblaze.c,
- * config/tc-mips.c, * config/tc-mmix.c, * config/tc-mn10200.c,
- * config/tc-mn10300.c, * config/tc-msp430.c, * config/tc-mt.c,
- * config/tc-nds32.c, * config/tc-or1k.c, * config/tc-ppc.c,
- * config/tc-pru.c, * config/tc-rl78.c, * config/tc-rx.c,
- * config/tc-s12z.c, * config/tc-s390.c, * config/tc-score.c,
- * config/tc-score7.c, * config/tc-sh.c, * config/tc-sparc.c,
- * config/tc-spu.c, * config/tc-tic4x.c, * config/tc-tic54x.c,
- * config/tc-tic6x.c, * config/tc-tilegx.c, * config/tc-tilepro.c,
- * config/tc-v850.c, * config/tc-visium.c, * config/tc-wasm32.c,
- * config/tc-xc16x.c, * config/tc-xgate.c, * config/tc-xstormy16.c,
- * config/tc-xtensa.c, * config/tc-z8k.c: Update throughout for
- bfd section macro and function changes.
- * write.c (compress_debug): Use bfd_rename_section.
+2020-06-04 Alan Modra <amodra@gmail.com>
-2019-09-18 Alan Modra <amodra@gmail.com>
+ * testsuite/config/default.exp: Remove global directive outside
+ proc body.
+ * testsuite/gas/mep/complex-relocs.exp: Likewise.
+ * testsuite/gas/microblaze/relax_size.exp: Likewise.
+ * testsuite/gas/microblaze/reloc_sym.exp: Likewise.
+ * testsuite/gas/mt/relocs.exp: Likewise.
+ * testsuite/gas/rx/rx.exp: Likewise.
- * symbols.c (S_IS_LOCAL): Update bfd_get_section to
- bfd_asymbol_section.
+2020-06-03 Stephen Casner <casner@acm.org>
-2019-09-18 Simon Marchi <simon.marchi@polymtl.ca>
+ * doc/c-riscv.texi (RISC-V-Options): Fix non-ASCII apostrophe.
- * Makefile.in: Re-generate.
- * configure: Re-generate.
- * doc/Makefile.in: Re-generate.
+2020-06-02 Frédéric Pétrot <frederic.petrot@univ-grenoble-alpes.fr>
+ Jim Wilson <jimw@sifive.com>
-2019-09-17 Maxim Blinov <maxim.blinov@embecosm.com>
+ PR 26051
+ * doc/c-riscv.texi (RISC-V-Formats): Add missing I format using
+ simm12(rs1). Correct S format to use simm12(rs1). Drop SB and B
+ formats using simm12(rs1). Correct SB and B to use rs1 and rs2.
+ Move B before SB. Move J before UJ.
- * config/tc-riscv.c (riscv_multi_subset_supports): Handle
- insn_class enum rather than subset char string.
- (riscv_ip): Update call to riscv_multi_subset_supports.
+2020-06-01 Alex Coplan <alex.coplan@arm.com>
-2019-09-16 Phil Blundell <pb@pbcl.net>
+ * write.c (relax_segment): Fix handling of negative offset when
+ relaxing an rs_org frag.
+ * testsuite/gas/aarch64/org-neg.d: New test.
+ * testsuite/gas/aarch64/org-neg.l: Error output for test.
+ * testsuite/gas/aarch64/org-neg.s: Input for test.
+ * testsuite/gas/arm/org-neg.d: New test.
+ * testsuite/gas/arm/org-neg.l: Error output for test.
+ * testsuite/gas/arm/org-neg.s: Input for test.
- * Makefile.in, configure, doc/Makefile.in: Regenerated.
+2020-05-28 Stephen Casner <casner@acm.org>
-2019-09-10 Nick Clifton <nickc@redhat.com>
+ Fix unexpected failures in gas testsuite for pdp11-aout target.
+ These are caused by the PDP11's mix of little-endian octets in
+ shorts but shorts in big endian order for long or quad.
- PR 24907
- * testsuite/gas/arm/pr24907.s: New test.
- * testsuite/gas/arm/pr24907.d: Expected disassembly.
+ * config/tc-pdp11.c (md_number_to_chars): Implement .quad
+ * testsuite/gas/all/gas.exp: Select alternate test scripts for
+ pdp11, skip octa test completely.
+ * testsuite/gas/all/eqv-dot-pdp11.s: Identical to eqv-dot.s
+ * testsuite/gas/all/eqv-dot-pdp11.d: Match different octet order.
+ * testsuite/gas/all/cond-pdp11.l: Match different octet order.
-2019-09-09 Phil Blundell <pb@pbcl.net>
+2020-05-28 Alex Coplan <alex.coplan@arm.com>
- binutils 2.33 branch created.
+ * frags.c (frag_grow): Fix comment.
-2019-09-05 Alan Modra <amodra@gmail.com>
+2020-05-27 Stephen Casner <casner@acm.org>
- * config/tc-ppc.c (ppc_elf_suffix): Display the relocation
- operator on GOT reloc warnings/errors.
+ PR gas/26001
+ * config/tc-pdp11.c (parse_reg): Distinguish register names from
+ symbols that begin with a register name.
+ * testsuite/gas/pdp11/pdp11.exp: Add test of such symbols.
+ * testsuite/gas/pdp11/pr26001.s: Likewise.
+ * testsuite/gas/pdp11/pr26001.d: Likewise.
-2019-08-27 Srinath Parvathaneni <srinath.parvathaneni@arm.com>
+2020-05-27 Simon Cook <simon.cook@embecosm.com>
- * config/tc-arm.c (parse_neon_mov): Add check to accept vector
- register to both the arguments in VMOV instruction.
- * testsuite/gas/arm/mve-vmov-1.d: Modify.
- * testsuite/gas/arm/mve-vmov-1.s: Likewise.
- * testsuite/gas/arm/mve-vorr.d: Likewise.
+ * config/tc-riscv.c (riscv_init_csr_hash): NULL initilize next
+ pointer when creating struct riscv_csr_extra.
-2019-08-23 Nick Clifton <nickc@redhat.com>
+2020-05-26 H.J. Lu <hongjiu.lu@intel.com>
- * po/sv.po: Updated Swedish translation.
+ * testsuite/gas/i386/align-branch-9.d: Updated for PECOFF.
+ * testsuite/gas/i386/inval-avx512f.s: Add .p2align for PECOFF.
+ * testsuite/gas/i386/inval-avx512f.l: Updated.
-2019-08-22 Dennis Zhang <dennis.zhang@arm.com>
+2020-05-26 Stefan Schulze Frielinghaus <stefansf@linux.ibm.com>
- * config/tc-arm.c: New entries for Cortex-M35P, Cortex-A77,
- and Cortex-A76AE.
- * doc/c-arm.texi: Document new processors.
- * testsuite/gas/arm/cpu-cortex-a76ae.d: New test.
- * testsuite/gas/arm/cpu-cortex-a77.d: New test.
- * testsuite/gas/arm/cpu-cortex-m35p.d: New test.
+ * testsuite/gas/s390/zarch-z13.d: Add regexp checks for vector
+ load/store instruction variants with alignment hints.
+ * testsuite/gas/s390/zarch-z13.s: Emit new vector load/store
+ instruction variants with alignment hints.
-2019-08-22 Bosco GarcÃa <jbgg.gnu@gmail.com>
- Nick Clifton <nickc@redhat.com>
+2020-05-26 H.J. Lu <hongjiu.lu@intel.com>
- * atof-generic.c (atof_generic): Do not ignore leading zeros if
- they appear after a decimal point.
- * testsuite/gas/all/float.s: Extend test to include a number with
- a leading decimal point followed by several zeroes.
- * testsuite/gas/i386/fp.s: Likewise.
- * testsuite/gas/i386/fp.d: Update expected output.
+ PR gas/26044
+ * config/tc-xgate.c (md_apply_fix): Check BFD_RELOC_XGATE_PCREL_X
+ instead of R_XGATE_PCREL_X.
+ (xgate_parse_operand): Replace R_XGATE_PCREL_X with
+ BFD_RELOC_XGATE_PCREL_X.
-2019-08-22 Barnaby Wilks <barnaby.wilks@arm.com>
+2020-05-26 H.J. Lu <hongjiu.lu@intel.com>
- * config/tc-aarch64.c: Add float16 directive and add "Hh" to
- acceptable float characters.
- * doc/c-aarch64.texi: Documentation for float16 directive.
- * testsuite/gas/aarch64/float16-be.d: New test.
- * testsuite/gas/aarch64/float16-le.d: New test.
- * testsuite/gas/aarch64/float16.s: New test.
- * NEWS: Add NEWS entry.
+ PR gas/26044
+ * config/tc-visium.c (md_convert_frag): Replace fragP->fr_literal
+ with &fragP->fr_literal[0].
-2019-08-22 Kyrylo Tkachov <kyrylo.tkachov@arm.com>
+2020-05-26 H.J. Lu <hongjiu.lu@intel.com>
- * testsuite/gas/aarch64/sysreg-4.d: Update expected disassembly for
- tfsre0_el1, tfsr_el1, tfsr_el2, tfsr_el3, tfsr_el12 system registers.
+ PR gas/26044
+ * config/tc-vax.c (md_estimate_size_before_relax): Replace
+ fragP->fr_literal with &fragP->fr_literal[0].
+ (md_convert_frag): Likewise.
-2019-08-20 Dennis Zhang <dennis.zhang@arm.com>
+2020-05-26 H.J. Lu <hongjiu.lu@intel.com>
- * NEWS: Mention the Arm and AArch64 new processors.
- * config/tc-aarch64.c: New entries for Cortex-A34, Cortex-A65,
- Cortex-A77, cortex-A65AE, and Cortex-A76AE.
- * doc/c-aarch64.texi: Document new CPUs.
- * testsuite/gas/aarch64/cpu-cortex-a34.d: New test.
- * testsuite/gas/aarch64/cpu-cortex-a65.d: New test.
- * testsuite/gas/aarch64/cpu-cortex-a65ae.d: New test.
- * testsuite/gas/aarch64/cpu-cortex-a76ae.d: New test.
- * testsuite/gas/aarch64/cpu-cortex-a77.d: New test.
- * testsuite/gas/aarch64/nop-asm.s: New test.
+ PR gas/26044
+ * config/tc-v850.c (md_convert_frag): Replace fragP->fr_literal
+ with &fragP->fr_literal[0].
-2019-08-19 Faraz Shahbazker <fshahbazker@wavecomp.com>
+2020-05-26 H.J. Lu <hongjiu.lu@intel.com>
- * config/tc-mips.c (fix_bad_misaligned_address): New function.
- (fix_validate_branch): Call fix_bad_misaligned address_to
- calculate the target address.
- (md_apply_fix): Likewise.
- (md_convert_frag): Update misaligned address calculation to
- disregard ISA mode bit.
+ PR gas/26044
+ * config/tc-crx.c (getreg_image): Change argument type to int.
+ (md_convert_frag): Replace fragP->fr_literal with
+ &fragP->fr_literal[0].
-2019-08-19 Faraz Shahbazker <fshahbazker@wavecomp.com>
+2020-05-26 H.J. Lu <hongjiu.lu@intel.com>
- * config/tc-mips.c (mips_move_labels): Retain ISA mode bit
- when moving labels in text segments.
- (mips_align): Indicate text mode when aligning labels in
- text segments.
- * gas/testsuite/gas/mips/insn-isa-mode.d: New test.
- * gas/testsuite/gas/mips/insn-isa-mode.s: New test source.
- * gas/testsuite/gas/mips/mips.exp: Run the new test.
+ PR gas/26044
+ * onfig/tc-score.c (s3_do_macro_bcmp): Replace overlapping
+ sprintf with memmove.
-2019-08-19 Barnaby Wilks <Barnaby.Wilks@arm.com>
+2020-05-25 H.J. Lu <hongjiu.lu@intel.com>
- * config/tc-arm.c (md_atof): Add precision check. Formatting.
+ * config/tc-mcore.c (md_convert_frag): Replace fragP->fr_literal
+ with &fragP->fr_literal[0].
-2019-08-15 Nick Clifton <nickc@redhat.com>
+2020-05-25 H.J. Lu <hongjiu.lu@intel.com>
- * po/sv.po: Updated Swedish translation.
+ PR gas/26041
+ * config/tc-cr16.c (md_assemble): Use memmove to concatenate
+ 2 overlapping strings.
-2019-08-12 Srinath Parvathaneni <srinath.parvathaneni@arm.com>
-
- * config/tc-arm.c (enum operand_parse_code): Add the entry OP_I48_I64.
- (po_imm1_or_imm2_or_fail): Marco to check the immediate is either of
- 48 or 64.
- (parse_operands): Add case OP_I48_I64.
- (do_mve_scalar_shift1): Add function to encode the MVE shift
- instructions with 4 arguments.
- * testsuite/gas/arm/mve-shift-bad.l: Modify.
- * testsuite/gas/arm/mve-shift-bad.s: Likewise.
- * testsuite/gas/arm/mve-shift.d: Likewise.
- * testsuite/gas/arm/mve-shift.s: Likewise.
-
-2019-08-12 Barnaby Wilks <barnaby.wilks@arm.com>
-
- * config/tc-arm.c (enum fp_16bit_format): Add enum to represent the 2 float16 encodings.
- (md_atof): Set precision for float16 type.
- (arm_is_largest_exponent_ok): Check for whether to encode with the IEEE or alternative
- format.
- (set_fp16_format): Parse a float16_format directive.
- (arm_parse_fp16_opt): Parse the fp16-format command line option.
- (aeabi_set_public_attributes): For ELF encode the FP16 format EABI attribute.
- * config/tc-arm.h (TC_LARGEST_EXPONENT_IS_NORMAL): Macro that expands to
- arm_is_largest_exponent_ok.
- (arm_is_largest_exponent_ok): Add prototype for arm_is_largest_exponent_ok function.
- * doc/c-arm.texi: Add documentation for .float16, .float16_format and -mfp16-format=
- * testsuite/gas/arm/float16-bad.d: New test.
- * testsuite/gas/arm/float16-bad.l: New test.
- * testsuite/gas/arm/float16-bad.s: New test.
- * testsuite/gas/arm/float16-be.d: New test.
- * testsuite/gas/arm/float16-format-bad.d: New test.
- * testsuite/gas/arm/float16-format-bad.l: New test.
- * testsuite/gas/arm/float16-format-bad.s: New test.
- * testsuite/gas/arm/float16-format-opt-bad.d: New test.
- * testsuite/gas/arm/float16-format-opt-bad.l: New test.
- * testsuite/gas/arm/float16-le.d: New test.
- * testsuite/gas/arm/float16.s: New test.
- * testsuite/gas/arm/float16-eabi-alternative-format.d: New test.
- * testsuite/gas/arm/float16-eabi-ieee-format.d: New test.
- * testsuite/gas/arm/float16-eabi-no-format.d: New test.
- * testsuite/gas/arm/float16-eabi.s: New test.
-
-2019-08-12 Barnaby Wilks <barnaby.wilks@arm.com>
-
- * config/atof-ieee.c (H_PRECISION): Macro for precision of float16
- type.
- (atof_ieee): Set precision and exponent bits for encoding float16
- types.
- (gen_to_words): NaN and Infinity encoding for float16.
- (ieee_md_atof): Set precision for encoding float16 type.
-
-2019-08-12 Alan Modra <amodra@gmail.com>
-
- PR 24851
- * config/tc-epiphany.c (md_estimate_size_before_relax): Clear
- extra opcode bytes when changing from a 2-byte to a 4-byte insn.
-
-2019-08-09 Jan Beulich <jbeulich@suse.com>
-
- * testsuite/gas/i386/ilp32/x86-64-simd-intel.d,
- testsuite/gas/i386/ilp32/x86-64-simd-suffix.d,
- testsuite/gas/i386/ilp32/x86-64-simd.d: Redirect to parent dir
- output expectations.
- * testsuite/gas/i386/x86-64-simd-intel.d,
- testsuite/gas/i386/x86-64-simd-suffix.d,
- testsuite/gas/i386/x86-64-simd.d: Don't hard-code hex addresses
- and symbol-relative offsets.
+2020-05-25 H.J. Lu <hongjiu.lu@intel.com>
-2019-08-08 Nick Clifton <nickc@redhat.com>
+ * config/tc-cr16.c (md_convert_frag): Replace fragP->fr_literal
+ with &fragP->fr_literal[0].
- PR 24887
- * testsuite/gas/i386/property-1.d: Adjust for new output format
- from readelf.
- * testsuite/gas/i386/property-2.d: Likewise.
- * testsuite/gas/i386/x86-64-property-1.d: Likewise.
- * testsuite/gas/i386/x86-64-property-2.d: Likewise.
+2020-05-25 H.J. Lu <hongjiu.lu@intel.com>
-2019-08-08 Yoshinori Sato <ysato@users.sourceforge.jp>
+ * config/tc-csky.c (md_convert_frag): Replace fragp->fr_literal
+ with &fragp->fr_literal[0].
+ * config/tc-microblaze.c (md_apply_fix): Likewise.
+ * config/tc-sh.c (md_convert_frag): Likewise.
- * testsuite/gas/h8300/h8300.exp: Fix movfpe and movtpe tests.
- * testsuite/gas/h8300/misc.s: Likewise.
- * testsuite/gas/h8300/misch.s: Likewise.
- * testsuite/gas/h8300/miscs.s: Likewise.
+2020-05-24 Jim Wilson <jimw@sifive.com>
-2019-08-05 Barnaby Wilks <barnaby.wilks@arm.com>
+ PR 26025
+ * config/tc-riscv.c (riscv_pre_output_hook): Change s type from const
+ asection to segT. New locals seg and subseg. Call subseg_set before
+ fix_new_exp. Call subseg_set after loop to restore original values.
- * config/tc-arm.c (do_mve_vqdmlah): Use N_S_32 macro.
- (do_neon_qrdmlah): Use N_S_32 macro.
- * testsuite/gas/arm/mve-vqdmlah-bad.d: New test.
- * testsuite/gas/arm/mve-vqdmlah-bad.l: New test.
- * testsuite/gas/arm/mve-vqdmlah-bad.s: New test.
- * testsuite/gas/arm/mve-vqdmlah.d: Remove unsigned instruction tests.
- * testsuite/gas/arm/mve-vqdmlah.s: Remove unsigned instruction tests.
- * testsuite/gas/arm/mve-vqdmlash-bad.d: New test.
- * testsuite/gas/arm/mve-vqdmlash-bad.l: New test.
- * testsuite/gas/arm/mve-vqdmlash-bad.s: New test.
- * testsuite/gas/arm/mve-vqdmlash.d: Remove unsigned instruction tests.
- * testsuite/gas/arm/mve-vqdmlash.s: Remove unsigned instruction tests.
+2020-05-21 Alan Modra <amodra@gmail.com>
-2019-07-30 Mel Chen <mel.chen@sifive.com>
+ * atof-generic.c: Replace "if (x) free (x)" with "free (x)"
+ throughout.
+ * config/obj-elf.c: Likewise.
+ * config/tc-aarch64.c: Likewise.
+ * config/tc-arm.c: Likewise.
+ * config/tc-m68k.c: Likewise.
+ * config/tc-nios2.c: Likewise.
+ * config/tc-tic30.c: Likewise.
+ * ecoff.c: Likewise.
+ * read.c: Likewise.
+ * stabs.c: Likewise.
+ * symbols.c: Likewise.
+ * testsuite/gas/all/test-gen.c: Likewise.
+
+2020-05-20 Nelson Chu <nelson.chu@sifive.com>
+
+ * testsuite/gas/riscv/priv-reg-fail-read-only-01.s: Updated.
+ * config/tc-riscv.c (default_arch_with_ext, default_isa_spec):
+ Static variables which are used to set the ISA extensions. You can
+ use -march (or ELF build attributes) and -misa-spec to set them,
+ respectively.
+ (ext_version_hash): The hash table used to handle the extensions
+ with versions.
+ (init_ext_version_hash): Initialize the ext_version_hash according
+ to riscv_ext_version_table.
+ (riscv_get_default_ext_version): The callback function of
+ riscv_parse_subset_t. According to the choosed ISA spec,
+ get the default version for the specific extension.
+ (riscv_set_arch): Set the callback function.
+ (enum options, struct option md_longopts): Add new option -misa-spec.
+ (md_parse_option): Do not call riscv_set_arch for -march. We will
+ call it later in riscv_after_parse_args. Call riscv_get_isa_spec_class
+ to set default_isa_spec class.
+ (riscv_after_parse_args): Call init_ext_version_hash to initialize the
+ ext_version_hash, and then call riscv_set_arch to set the architecture
+ with versions according to default_arch_with_ext.
+ * testsuite/gas/riscv/attribute-02.d: Set 0p0 as default version for
+ x extensions.
+ * testsuite/gas/riscv/attribute-03.d: Likewise.
+ * testsuite/gas/riscv/attribute-09.d: New testcase. For i-ext, we
+ already set it's version to 2p1 by march, so no need to use the default
+ 2p2 version. For m-ext, we do not set the version by -march and ELF arch
+ attribute, so set the default 2p0 to it. For zicsr, it is not defined in
+ ISA spec 2p2, so set 0p0 to it.
+ * testsuite/gas/riscv/attribute-10.d: New testcase. The version of
+ zicsr is 2p0 according to ISA spec 20191213.
+ * config/tc-riscv.c (DEFAULT_RISCV_ARCH_WITH_EXT)
+ (DEFAULT_RISCV_ISA_SPEC): Default configure option settings.
+ You can set them by configure options --with-arch and
+ --with-isa-spec, respectively.
+ (riscv_set_default_isa_spec): New function used to set the
+ default ISA spec.
+ (md_parse_option): Call riscv_set_default_isa_spec rather than
+ call riscv_get_isa_spec_class directly.
+ (riscv_after_parse_args): If the -isa-spec is not set, then we
+ set the default ISA spec according to DEFAULT_RISCV_ISA_SPEC by
+ calling riscv_set_default_isa_spec.
+ * testsuite/gas/riscv/attribute-01.d: Add -misa-spec=2.2, since
+ the --with-isa-spec may be set to different ISA spec.
+ * testsuite/gas/riscv/attribute-02.d: Likewise.
+ * testsuite/gas/riscv/attribute-03.d: Likewise.
+ * testsuite/gas/riscv/attribute-04.d: Likewise.
+ * testsuite/gas/riscv/attribute-05.d: Likewise.
+ * testsuite/gas/riscv/attribute-06.d: Likewise.
+ * testsuite/gas/riscv/attribute-07.d: Likewise.
+ * configure.ac: Add configure options, --with-arch and
+ --with-isa-spec.
+ * configure: Regenerated.
+ * config.in: Regenerated.
+ * config/tc-riscv.c (default_priv_spec): Static variable which is
+ used to check if the CSR is valid for the chosen privilege spec. You
+ can use -mpriv-spec to set it.
+ (enum reg_class): We now get the CSR address from csr_extra_hash rather
+ than reg_names_hash. Therefore, move RCLASS_CSR behind RCLASS_MAX.
+ (riscv_init_csr_hashes): Only need to initialize one hash table
+ csr_extra_hash.
+ (riscv_csr_class_check): Change the return type to void. Don't check
+ the ISA dependency if -mcsr-check isn't set.
+ (riscv_csr_version_check): New function. Check and find the CSR address
+ from csr_extra_hash, according to default_priv_spec. Report warning
+ for the invalid CSR if -mcsr-check is set.
+ (reg_csr_lookup_internal): Updated.
+ (reg_lookup_internal): Likewise.
+ (md_begin): Updated since DECLARE_CSR and DECLARE_CSR_ALIAS are changed.
+ (enum options, struct option md_longopts): Add new GAS option -mpriv-spec.
+ (md_parse_option): Call riscv_set_default_priv_version to set
+ default_priv_spec.
+ (riscv_after_parse_args): If -mpriv-spec isn't set, then set the default
+ privilege spec to the newest one.
+ (enum riscv_csr_class, struct riscv_csr_extra): Move them to
+ include/opcode/riscv.h.
+ * testsuite/gas/riscv/priv-reg-fail-fext.d: This test case just want
+ to check the ISA dependency for CSR, so fix the spec version by adding
+ -mpriv-spec=1.11.
+ * testsuite/gas/riscv/priv-reg-fail-fext.l: Likewise. There are some
+ version warnings for the test case.
+ * gas/testsuite/gas/riscv/priv-reg-fail-read-only-01.d: Likewise.
+ * gas/testsuite/gas/riscv/priv-reg-fail-read-only-01.l: Likewise.
+ * gas/testsuite/gas/riscv/priv-reg-fail-read-only-02.d: Likewise.
+ * gas/testsuite/gas/riscv/priv-reg-fail-rv32-only.d: Likewise.
+ * gas/testsuite/gas/riscv/priv-reg-fail-rv32-only.l: Likewise.
+ * gas/testsuite/gas/riscv/priv-reg-fail-version-1p9.d: New test case.
+ Check whether the CSR is valid when privilege version 1.9 is choosed.
+ * gas/testsuite/gas/riscv/priv-reg-fail-version-1p9.l: Likewise.
+ * gas/testsuite/gas/riscv/priv-reg-fail-version-1p9p1.d: New test case.
+ Check whether the CSR is valid when privilege version 1.9.1 is choosed.
+ * gas/testsuite/gas/riscv/priv-reg-fail-version-1p9p1.l: Likewise.
+ * gas/testsuite/gas/riscv/priv-reg-fail-version-1p10.d: New test case.
+ Check whether the CSR is valid when privilege version 1.10 is choosed.
+ * gas/testsuite/gas/riscv/priv-reg-fail-version-1p10.l: Likewise.
+ * gas/testsuite/gas/riscv/priv-reg-fail-version-1p11.d: New test case.
+ Check whether the CSR is valid when privilege version 1.11 is choosed.
+ * gas/testsuite/gas/riscv/priv-reg-fail-version-1p11.l: Likewise.
+ * config/tc-riscv.c (DEFAULT_RISCV_ISA_SPEC): Default configure option
+ setting. You can set it by configure option --with-priv-spec.
+ (riscv_set_default_priv_spec): New function used to set the default
+ privilege spec.
+ (md_parse_option): Call riscv_set_default_priv_spec rather than
+ call riscv_get_priv_spec_class directly.
+ (riscv_after_parse_args): If -mpriv-spec isn't set, then we set the
+ default privilege spec according to DEFAULT_RISCV_PRIV_SPEC by
+ calling riscv_set_default_priv_spec.
+ * testsuite/gas/riscv/csr-dw-regnums.d: Add -mpriv-spec=1.11, since
+ the --with-priv-spec may be set to different privilege spec.
+ * testsuite/gas/riscv/priv-reg.d: Likewise.
+ * configure.ac: Add configure option --with-priv-spec.
+ * configure: Regenerated.
+ * config.in: Regenerated.
+ * config/tc-riscv.c (explicit_attr): Rename explicit_arch_attr to
+ explicit_attr. Set it to TRUE if any ELF attribute is found.
+ (riscv_set_default_priv_spec): Try to set the default_priv_spec if
+ the priv attributes are set.
+ (md_assemble): Set the default_priv_spec according to the priv
+ attributes when we start to assemble instruction.
+ (riscv_write_out_attrs): Rename riscv_write_out_arch_attr to
+ riscv_write_out_attrs. Update the arch and priv attributes. If we
+ don't set the corresponding ELF attributes, then try to output the
+ default ones.
+ (riscv_set_public_attributes): If any ELF attribute or -march-attr
+ options is set (explicit_attr is TRUE), then call riscv_write_out_attrs
+ to update the arch and priv attributes.
+ (s_riscv_attribute): Make sure all arch and priv attributes are set
+ before any instruction.
+ * testsuite/gas/riscv/attribute-01.d: Update the priv attributes if any
+ ELF attribute or -march-attr is set. If the priv attributes are not
+ set, then try to update them by the default setting (-mpriv-spec or
+ --with-priv-spec).
+ * testsuite/gas/riscv/attribute-02.d: Likewise.
+ * testsuite/gas/riscv/attribute-03.d: Likewise.
+ * testsuite/gas/riscv/attribute-04.d: Likewise.
+ * testsuite/gas/riscv/attribute-06.d: Likewise.
+ * testsuite/gas/riscv/attribute-07.d: Likewise.
+ * testsuite/gas/riscv/attribute-08.d: Likewise.
+ * testsuite/gas/riscv/attribute-09.d: Likewise.
+ * testsuite/gas/riscv/attribute-10.d: Likewise.
+ * testsuite/gas/riscv/attribute-unknown.d: Likewise.
+ * testsuite/gas/riscv/attribute-05.d: Likewise. Also, the priv spec
+ set by priv attributes must be supported.
+ * testsuite/gas/riscv/attribute-05.s: Likewise.
+ * testsuite/gas/riscv/priv-reg-fail-version-1p9.d: Likewise. Updated
+ priv attributes according to the -mpriv-spec option.
+ * testsuite/gas/riscv/priv-reg-fail-version-1p9p1.d: Likewise.
+ * testsuite/gas/riscv/priv-reg-fail-version-1p10.d: Likewise.
+ * testsuite/gas/riscv/priv-reg-fail-version-1p11.d: Likewise.
+ * testsuite/gas/riscv/priv-reg.d: Removed.
+ * testsuite/gas/riscv/priv-reg-version-1p9.d: New test case. Dump the
+ CSR according to the priv spec 1.9.
+ * testsuite/gas/riscv/priv-reg-version-1p9p1.d: New test case. Dump the
+ CSR according to the priv spec 1.9.1.
+ * testsuite/gas/riscv/priv-reg-version-1p10.d: New test case. Dump the
+ CSR according to the priv spec 1.10.
+ * testsuite/gas/riscv/priv-reg-version-1p11.d: New test case. Dump the
+ CSR according to the priv spec 1.11.
+ * config/tc-riscv.c (md_show_usage): Add descriptions about
+ the new GAS options.
+ * doc/c-riscv.texi: Likewise.
+
+2020-05-19 Peter Bergner <bergner@linux.ibm.com>
+
+ * testsuite/gas/ppc/power9.s <dcbf, dcbfl, dcbflp>: Add tests.
+ * testsuite/gas/ppc/power9.d: Likewise.
+ * testsuite/gas/ppc/power10.s <dcbf, dcbfps, dcbstps, hwsync, lwsync,
+ pause_short, phwsync, plwsync, ptesync, stcisync, stncisync, stsync,
+ sync, wait, waitrsv>: Add tests.
+ * testsuite/gas/ppc/power10.d: Likewise.
- * testsuite/gas/riscv/alias-csr.s: Add testcase for CSR-access
- alias instructions.
- * testsuite/gas/riscv/no-aliases-csr.d: Run testcase alias-csr.s with
- -Mno-aliases.
+2020-05-19 Alexander Fedotov <alfedotov@gmail.com>
- * testsuite/gas/riscv/alias-csr.d: Run testcase alias-csr.s.
- * testsuite/gas/riscv/priv-reg.d: Update.
+ PR 25992
+ * config/tc-arm.c : Add arm_ext_v8r feature.
+ (it_fsm_post_encode): Check arm_ext_v8r feature.
+ (get_aeabi_cpu_arch_from_fset): Check arm_ext_v8r feature.
-2019-07-24 Nick Clifton <nickc@redhat.com>
+2020-05-19 Alan Modra <amodra@gmail.com>
- * po/sv.po: Updated Swedish translation.
+ * write.c (write_contents): Use bfd_get_filename rather than
+ accessing bfd->filename directly. Use bfd_section_name rather
+ than accessing section->name directly.
-2019-07-24 Claudiu Zissulescu <claziss@synopsys.com>
+2020-05-19 Alan Modra <amodra@gmail.com>
- * testsuite/gas/arc/nps400-6.d: Update test.
+ * symbols.c (local_symbol_make): Init all of lsy_flags.
-20
19-07-24 Alan Modra <amodra@gmail.com>
+20
20-05-18 Alan Modra <amodra@gmail.com>
- * config/obj-elf.c (obj_elf_section, obj_elf_type): Set has_gnu_osabi.
- * testsuite/gas/elf/section12a.d: Update xfails.
- * testsuite/gas/elf/section12b.d: Likewise.
+ * symbols.c (resolve_symbol_value): Invoke LOCAL_SYMBOL_CHECK
+ before looking at add_symbol->sy_flags.
-2019-07-24 Alan Modra <amodra@gmail.com>
+2020-05-18 Hongtao Liu <hongtao.liu@intel.com>
- * testsuite/gas/elf/section12a.d: xfail visium and cloudabi.
- * testsuite/gas/elf/section12b.d: Likewise.
- * testsuite/gas/elf/section13.d: Likewise.
+ * config/tc-i386.c: Not handle lret/iret.
+ * testsuite/gas/i386/lfence-ret-a.d: Adjust testcase.
+ * testsuite/gas/i386/lfence-ret-b.d: Ditto.
+ * testsuite/gas/i386/lfence-ret-c.d: Ditto.
+ * testsuite/gas/i386/lfence-ret-d.d: Ditto.
+ * testsuite/gas/i386/lfence-ret.s: Ditto.
+ * testsuite/gas/i386/x86-64-lfence-ret-a.d: Ditto.
+ * testsuite/gas/i386/x86-64-lfence-ret-b.d: Ditto.
+ * testsuite/gas/i386/x86-64-lfence-ret-c.d: Ditto.
+ * testsuite/gas/i386/x86-64-lfence-ret-d.d: Ditto.
+ * testsuite/gas/i386/x86-64-lfence-ret-e.d: Ditto.
+ * testsuite/gas/i386/x86-64-lfence-ret.s: Ditto.
+ * testsuite/gas/i386/x86-64-lfence-ret.e: Deleted.
-2019-07-23 Kyrylo Tkachov <kyrylo.tkachov@arm.com>
+2020-05-15 Alan Modra <amodra@gmail.com>
+ Alex Coplan <alex.coplan@arm.com>
- * testsuite/gas/aarch64/sysreg-4.s: Test gmid_el1 read.
- * testsuite/gas/aarch64/sysreg-4.d: Update expected output.
- * testsuite/gas/aarch64/illegal-sysreg-4.l: Likewise.
+ * symbols.c (struct local_symbol): Update comment.
+ (resolve_symbol_value): For resolved symbols equated to other
+ symbols, verify that the referenced symbol is not a local_symbol
+ before accessing sy_value. Don't leave symbol loops during
+ finalize_syms resolution.
+ * testsuite/gas/all/assign-bad-recursive.d: New test.
+ * testsuite/gas/all/assign-bad-recursive.l: Error output for test.
+ * testsuite/gas/all/assign-bad-recursive.s: Assembly for test.
+ * testsuite/gas/all/gas.exp: Run it.
-2019-07-23 Alan Modra <amodra@gmail.com>
+2020-05-14 Nick Clifton <nickc@redhat.com>
- * config/obj-elf.c (obj_elf_change_section): Don't emit a fatal
- error for non-SHF_ALLOC SHF_GNU_MBIND here.
- (obj_elf_parse_section_letters): Return SHF_GNU_MBIND in new
- gnu_attr param.
- (obj_elf_section): Adjust obj_elf_parse_section_letters call.
- Formatting. Set SHF_GNU_MBIND and elf_osabi from gnu_attr.
- Emit normal error for non-SHF_ALLOC SHF_GNU_MBIND and wrong osabi.
- (obj_elf_type): Set elf_osabi for ifunc.
- * testsuite/gas/elf/section12a.d: xfail msp430 and hpux.
- * testsuite/gas/elf/section12b.d: Likewise.
- * testsuite/gas/elf/section13.d: Likewise.
- * testsuite/gas/elf/section13.l: Adjust expected error.
+ * po/sv.po: Updated Swedish translation.
-20
19-07-23 Alan Modra <amodra@gmail.com>
+20
20-05-11 Alan Modra <amodra@gmail.com>
- * testsuite/gas/elf/section12a.d: Don't skip for rx.
+ * testsuite/gas/ppc/scalarquad.d,
+ * testsuite/gas/ppc/scalarquad.s: New test.
+ * testsuite/gas/ppc/ppc.exp: Run it.
-2019-07-22 Barnaby Wilks <barnaby.wilks@arm.com>
+2020-05-11 Alan Modra <amodra@gmail.com>
- * config/tc-arm.c (do_mve_vqdmladh): Remove check for UNPREDICTABLE.
- * testsuite/gas/arm/mve-vqdmladh-bad.l: Remove tests.
- * testsuite/gas/arm/mve-vqdmladh-bad.s: Remove tests.
- * testsuite/gas/arm/mve-vqdmladh.d: New tests.
- * testsuite/gas/arm/mve-vqdmladh.s: New tests.
- * testsuite/gas/arm/mve-vqdmlsdh-bad.l: Remove tests.
- * testsuite/gas/arm/mve-vqdmlsdh-bad.s: Remove tests.
- * testsuite/gas/arm/mve-vqdmlsdh.d: New tests.
- * testsuite/gas/arm/mve-vqdmlsdh.s: New tests.
+ * testsuite/gas/ppc/rightmost.d,
+ * testsuite/gas/ppc/rightmost.s: New test.
+ * testsuite/gas/ppc/ppc.exp: Run it.
-2019-07-19 H.J. Lu <hongjiu.lu@intel.com>
+2020-05-11 Alan Modra <amodra@gmail.com>
- * testsuite/gas/i386/noextreg.d: Pass -O0 to assembler.
+ * testsuite/gas/ppc/xvtlsbb.d,
+ * testsuite/gas/ppc/xvtlsbb.s: New test.
+ * testsuite/gas/ppc/ppc.exp: Run it.
-2019-07-19 Jose E. Marchesi <jose.marchesi@oracle.com>
+2020-05-11 Alan Modra <amodra@gmail.com>
- * testsuite/gas/bpf/alu.d: Use %r6 instead of %ctx.
- * testsuite/gas/bpf/lddw-be.d: Likewise.
- * testsuite/gas/bpf/lddw.d: Likewise.
- * testsuite/gas/bpf/alu-be.d: Likewise.
- * testsuite/gas/bpf/alu32.d: Likewise.
+ * testsuite/gas/ppc/stringop.d,
+ * testsuite/gas/ppc/stringop.s: New test.
+ * testsuite/gas/ppc/ppc.exp: Run it.
-2019-07-19 Jose E. Marchesi <jose.marchesi@oracle.com>
+2020-05-11 Peter Bergner <bergner@linux.ibm.com>
- * config/tc-bpf.c (pe_lcomm_internal): Adapted from tc-i386.c.
- (pe_lcomm): Likewise.
- (md_pseudo_table): Use pe_lcomm to implement .lcomm.
+ * testsuite/gas/ppc/set_bool.d,
+ * testsuite/gas/ppc/set_bool.s: New test.
+ * testsuite/gas/ppc/ppc.exp: Run it.
-2019-07-19 Richard Sandiford <richard.sandiford@arm.com>
+2020-05-11 Alan Modra <amodra@gmail.com>
- * doc/c-aarch64.texi: Remame the +bitperm extension to +sve2-bitperm.
- * config/tc-aarch64.c (aarch64_features): Likewise.
- * testsuite/gas/aarch64/illegal-sve2-aes.d: Update accordingly.
- * testsuite/gas/aarch64/illegal-sve2-sha3.d: Likewise.
- * testsuite/gas/aarch64/illegal-sve2-sm4.d: Likewise.
- * testsuite/gas/aarch64/illegal-sve2.d: Likewise.
- * testsuite/gas/aarch64/sve2.d: Likewise.
+ * testsuite/gas/ppc/bitmanip.d,
+ * testsuite/gas/ppc/bitmanip.s: New test.
+ * testsuite/gas/ppc/ppc.exp: Run it.
-20
19-07-19 Alan Modra <amodra@gmail.com>
+20
20-05-11 Alan Modra <amodra@gmail.com>
- * config/tc-ppc.c (ppc_elf_suffix): Map "tls@pcrel", "got@tlsgd@pcrel",
- "got@tlsld@pcrel", "got@tprel@pcrel", and "got@dtprel@pcrel".
- (fixup_size, md_assemble): Handle pcrel tls relocs.
- (ppc_force_relocation, ppc_fix_adjustable): Likewise.
- (md_apply_fix, tc_gen_reloc): Likewise.
+ * testsuite/gas/ppc/genpcv.d,
+ * testsuite/gas/ppc/genpcv.s: New test.
+ * testsuite/gas/ppc/ppc.exp: Run it.
-2019-07-17 Jose E. Marchesi <jose.marchesi@oracle.com>
+2020-05-11 Alan Modra <amodra@gmail.com>
- * config/tc-bpf.c: Make .lcomm to get a third argument with the
- alignment.
+ * testsuite/gas/ppc/maskmanip.d,
+ * testsuite/gas/ppc/maskmanip.s: New test.
+ * testsuite/gas/ppc/ppc.exp: Run it.
-2019-07-17 Jose E. Marchesi <jose.marchesi@oracle.com>
+2020-05-11 Alan Modra <amodra@gmail.com>
+ Peter Bergner <bergner@linux.ibm.com>
- * config/tc-bpf.c (md_pseudo_table): .half, .word and .dword.
+ * config/tc-ppc.c (pre_defined_registers): Add accumulators.
+ (md_assemble): Check acc specified in correct operand.
+ * testsuite/gas/ppc/outerprod.d,
+ * testsuite/gas/ppc/outerprod.s,
+ * testsuite/gas/ppc/vsx4.d,
+ * testsuite/gas/ppc/vsx4.s: New tests.
+ * testsuite/gas/ppc/ppc.exp: Run them.
- * testsuite/gas/bpf/data.s: New file.
- * testsuite/gas/bpf/data.d: Likewise.
- * testsuite/gas/bpf/data-be.d: Likewise.
- * testsuite/gas/bpf/bpf.exp: Run data and data-be.
- * doc/c-bpf.texi (BPF Directives): New section.
+2020-05-11 Alan Modra <amodra@gmail.com>
-2019-07-17 Jan Beulich <jbeulich@suse.com>
+ * testsuite/gas/ppc/simd_perm.d,
+ * testsuite/gas/ppc/simd_perm.s: New test.
+ * testsuite/gas/ppc/ppc.exp: Run it.
- * config/tc-i386.c (check_hle, md_assemble, check_VecOperands,
- match_template, check_string, build_modrm_byte): Replace
- operand_type_check(..., anymem) by Operand_Mem ones.
- (process_operands): Also copy i.flags[] when copying other
- operand properties.
+2020-05-11 Alan Modra <amodra@gmail.com>
-2019-07-16 Jan Beulich <jbeulich@suse.com>
+ * testsuite/gas/ppc/int128.d,
+ * testsuite/gas/ppc/int128.s: New test.
+ * testsuite/gas/ppc/ppc.exp: Run it.
- * config/tc-i386.c (match_template): Adjust regmem reference.
- Adjust comment and update regmem when swapping operands.
- (build_modrm_byte): Drop clearing of regmem and stale part of
- comment. Correct comment. Adjust regmem reference.
+2020-05-11 Alan Modra <amodra@gmail.com>
-2019-07-16 Jan Beulich <jbeulich@suse.com>
+ * testsuite/gas/ppc/vsx_32byte.d,
+ * testsuite/gas/ppc/vsx_32byte.s: New test.
+ * testsuite/gas/ppc/ppc.exp: Run it.
- * config/tc-i386.c (type_names): Replace SReg entries.
- (pi, check_byte_reg, build_modrm_byte, i386_att_operand,
- parse_real_register): Switch to using sreg field.
- (process_operands): Likewise. Extend handling of PUSH/POP of
- segment registers. Drop dead setting of REX_B.
- * config/tc-i386-intel.c (i386_intel_simplify_register,
- i386_intel_operand): Switch to using sreg field.
- * testsuite/gas/i386/x86-64-opcode.s: Add PUSH/POP of %fs/%gs.
- * testsuite/gas/i386/x86-64-opcode.d: Adjust expectations.
- * testsuite/gas/i386/ilp32/x86-64-opcode.d: Use parent dir
- expectations.
+2020-05-11 Alan Modra <amodra@gmail.com>
-2019-07-15 Jose E. Marchesi <jose.marchesi@oracle.com>
-
- * testsuite/gas/bpf/mem.s: ldabs instructions do not take a `src'
- register as an argument.
- * testsuite/gas/bpf/mem.d: Updated accordingly.
- * testsuite/gas/bpf/mem-be.d: Likewise.
- * doc/c-bpf.texi (BPF Opcodes): Update to reflect the correct
- explicit arguments to ldabs and ldind instructions.
-
-2019-07-14 Jose E. Marchesi <jose.marchesi@oracle.com>
-
- * testsuite/gas/bpf/mem.s: Do not use explicit arguments for
- ldabs and ldind instructions.
- * testsuite/gas/bpf/mem.d: Updated accordingly.
- * testsuite/gas/bpf/mem-be.d: Likewise.
-
-2019-07-09 Alan Modra <amodra@gmail.com>
-
- * config/obj-elf.c (elf_frob_symbol): Remove mips hacks.
- * config/tc-mips.h (tc_frob_symbol): Define.
- (mips_frob_symbol): Declare.
- * config/tc-mips.c (s_mips_globl): Don't set BSF_OBJECT for irix.
- (mips_frob_symbol): Fudge symbols for irix here.
- * testsuite/gas/elf/type-2.e: Allow random target symbols.
-
-2019-07-05 Kito Cheng <kito.cheng@sifive.com>
-
- * doc/c-riscv.texi (Instruction Formats): Add r4 type.
- * testsuite/gas/riscv/insn.d: Add testcase for r4 type.
- * testsuite/gas/riscv/insn.s: Ditto.
-
- * doc/c-riscv.texi (Instruction Formats): Add b and j type.
- * testsuite/gas/riscv/insn.d: Add test case for b and j type.
- * testsuite/gas/riscv/insn.s: Ditto.
-
- * testsuite/gas/riscv/insn.s: Correct instruction type for load
- and store.
-
- * testsuite/gas/riscv/insn.d: Using regular expression to match
- address.
-
- * doc/c-riscv.texi (Instruction Formats): Fix encoding table for SB
- type and fix typo.
-
-2019-07-04 Jan Beulich <jbeulich@suse.com>
-
- * config/tc-i386.c (md_parse_option): Don't blindly accept all
- -Q options.
- (md_show_usage): Correctly name the ignored -Q option flavors.
-
-2019-07-04 Jan Beulich <jbeulich@suse.com>
-
- * config/obj-elf.c (obj_elf_type): Check for conflicts between
- old and new types.
- * config/tc-hppa.h (md_elf_symbol_type_change): New.
- * doc/as.texi: Mention warning behavior for the ELF flavor of
- .type.
- * testsuite/gas/elf/type-2.e, testsuite/gas/elf/type-2.l,
- testsuite/gas/elf/type-2.s: New.
- * testsuite/gas/elf/elf.exp: Run new test.
-
-2019-07-03 Nick Clifton <nickc@redhat.com>
-
- * testsuite/gas/aarch64/codealign.d: Update to work with a
- toolchain configured to generate build notes.
- * testsuite/gas/aarch64/codealign_1.d: Likewise.
- * testsuite/gas/aarch64/dwarf.d: Likewise.
- * testsuite/gas/aarch64/mapmisc.d: Likewise.
- * testsuite/gas/aarch64/mapping.d: Likewise.
- * testsuite/gas/aarch64/mapping2.d: Likewise.
- * testsuite/gas/aarch64/mapping3.d: Likewise.
- * testsuite/gas/aarch64/mapping4.d: Likewise.
- * testsuite/gas/aarch64/mapping_5.d: Likewise.
- * testsuite/gas/aarch64/mapping_6.d: Likewise.
- * testsuite/gas/aarch64/sve-movprfx_1.d: Likewise.
- * testsuite/gas/aarch64/sve-movprfx_10.d: Likewise.
- * testsuite/gas/aarch64/sve-movprfx_11.d: Likewise.
- * testsuite/gas/aarch64/sve-movprfx_12.d: Likewise.
- * testsuite/gas/aarch64/sve-movprfx_13.d: Likewise.
- * testsuite/gas/aarch64/sve-movprfx_14.d: Likewise.
- * testsuite/gas/aarch64/sve-movprfx_15.d: Likewise.
- * testsuite/gas/aarch64/sve-movprfx_16.d: Likewise.
- * testsuite/gas/aarch64/sve-movprfx_17.d: Likewise.
- * testsuite/gas/aarch64/sve-movprfx_18.d: Likewise.
- * testsuite/gas/aarch64/sve-movprfx_19.d: Likewise.
- * testsuite/gas/aarch64/sve-movprfx_2.d: Likewise.
- * testsuite/gas/aarch64/sve-movprfx_20.d: Likewise.
- * testsuite/gas/aarch64/sve-movprfx_21.d: Likewise.
- * testsuite/gas/aarch64/sve-movprfx_22.d: Likewise.
- * testsuite/gas/aarch64/sve-movprfx_23.d: Likewise.
- * testsuite/gas/aarch64/sve-movprfx_24.d: Likewise.
- * testsuite/gas/aarch64/sve-movprfx_25.d: Likewise.
- * testsuite/gas/aarch64/sve-movprfx_26.d: Likewise.
- * testsuite/gas/aarch64/sve-movprfx_27.d: Likewise.
- * testsuite/gas/aarch64/sve-movprfx_3.d: Likewise.
- * testsuite/gas/aarch64/sve-movprfx_4.d: Likewise.
- * testsuite/gas/aarch64/sve-movprfx_5.d: Likewise.
- * testsuite/gas/aarch64/sve-movprfx_6.d: Likewise.
- * testsuite/gas/aarch64/sve-movprfx_7.d: Likewise.
- * testsuite/gas/aarch64/sve-movprfx_8.d: Likewise.
- * testsuite/gas/aarch64/sve-movprfx_9.d: Likewise.
- * testsuite/gas/aarch64/symbol-variant_pcs-1.d: Likewise.
- * testsuite/gas/aarch64/symbol-variant_pcs-2.d: Likewise.
- * testsuite/gas/aarch64/symbol-variant_pcs-3.d: Likewise.
- * testsuite/gas/all/assign.d: Likewise.
- * testsuite/gas/all/none.d: Likewise.
- * testsuite/gas/all/weakref1.d: Likewise.
- * testsuite/gas/arm/got_prel.d: Likewise.
- * testsuite/gas/arm/local_function.d: Likewise.
- * testsuite/gas/arm/mapdir.d: Likewise.
- * testsuite/gas/arm/mapmisc.d: Likewise.
- * testsuite/gas/arm/mapping2.d: Likewise.
- * testsuite/gas/arm/mapping3.d: Likewise.
- * testsuite/gas/arm/mapping4.d: Likewise.
- * testsuite/gas/arm/mapsecs.d: Likewise.
- * testsuite/gas/arm/mapshort-eabi.d: Likewise.
- * testsuite/gas/arm/thumbrel.d: Likewise.
- * testsuite/gas/arm/unwind.d: Likewise.
- * testsuite/gas/cfi/cfi-label.d: Likewise.
- * testsuite/gas/elf/elf.exp: Likewise.
- * testsuite/gas/i386/bss.d: Likewise.
- * testsuite/gas/i386/ifunc-3.d: Likewise.
- * testsuite/gas/i386/ilp32/mixed-mode-reloc64.d: Likewise.
- * testsuite/gas/i386/ilp32/quad.d: Likewise.
- * testsuite/gas/i386/ilp32/reloc64.d: Likewise.
- * testsuite/gas/i386/ilp32/x86-64-size-1.d: Likewise.
- * testsuite/gas/i386/ilp32/x86-64-size-3.d: Likewise.
- * testsuite/gas/i386/ilp32/x86-64-size-5.d: Likewise.
- * testsuite/gas/i386/ilp32/x86-64-unwind.d: Likewise.
- * testsuite/gas/i386/mixed-mode-reloc32.d: Likewise.
- * testsuite/gas/i386/mixed-mode-reloc64.d: Likewise.
- * testsuite/gas/i386/nop-6.d: Likewise.
- * testsuite/gas/i386/property-1.d: Likewise.
- * testsuite/gas/i386/property-2.d: Likewise.
- * testsuite/gas/i386/relax.d: Likewise.
- * testsuite/gas/i386/reloc64.d: Likewise.
- * testsuite/gas/i386/size-1.d: Likewise.
- * testsuite/gas/i386/size-3.d: Likewise.
- * testsuite/gas/i386/x86-64-nop-6.d: Likewise.
- * testsuite/gas/i386/x86-64-property-1.d: Likewise.
- * testsuite/gas/i386/x86-64-property-2.d: Likewise.
- * testsuite/gas/i386/x86-64-size-1.d: Likewise.
- * testsuite/gas/i386/x86-64-size-3.d: Likewise.
- * testsuite/gas/i386/x86-64-size-5.d: Likewise.
- * testsuite/gas/i386/x86-64-unwind.d: Likewise.
- * testsuite/gas/macros/irp.d: Likewise.
- * testsuite/gas/macros/repeat.d: Likewise.
- * testsuite/gas/macros/rept.d: Likewise.
- * testsuite/gas/macros/test2.d: Likewise.
- * testsuite/gas/macros/test3.d: Likewise.
- * testsuite/gas/macros/vararg.d: Likewise.
- * testsuite/gas/ppc/astest2.d: Likewise.
- * testsuite/gas/ppc/astest2_64.d: Likewise.
- * testsuite/gas/ppc/astest64.d: Likewise.
- * testsuite/gas/ppc/power4.d: Likewise.
- * testsuite/gas/ppc/test1elf64.d: Likewise.
-
-2019-07-02 Barnaby Wilks <barnaby.wilks@arm.com>
-
- * config/tc-aarch64.c (parse_operands): Add error check.
- * testsuite/gas/aarch64/diagnostic.l: New test.
- * testsuite/gas/aarch64/diagnostic.s: New test.
- * testsuite/gas/aarch64/illegal.l: New tests.
- * testsuite/gas/aarch64/illegal.s: New tests.
-
-2019-07-02 Richard Sandiford <richard.sandiford@arm.com>
-
- * testsuite/gas/aarch64/sve-movprfx_27.s,
- * testsuite/gas/aarch64/sve-movprfx_27.d: New test.
-
-2019-07-02 Richard Sandiford <richard.sandiford@arm.com>
-
- * testsuite/gas/aarch64/sve-movprfx_26.s: Also test FCVTZS, FCVTZU,
- SCVTF, UCVTF, LSR and ASR.
- * testsuite/gas/aarch64/sve-movprfx_26.d: Update accordingly.
- * testsuite/gas/aarch64/sve-movprfx_26.l: Likewise.
-
-2019-07-02 Richard Sandiford <richard.sandiford@arm.com>
-
- * testsuite/gas/aarch64/sve-movprfx_25.s: Allow CPY Z1.D.P1/M,X1
- to be prefixed by MOVPRFX.
- * testsuite/gas/aarch64/sve-movprfx_25.d: Update accordingly.
- * testsuite/gas/aarch64/sve-movprfx_25.l: Likewise.
-
-2019-07-01 Nick Clifton <nickc@redhat.com>
-
- PR 24748
- * write.c (create_note_reloc): Add desc2_offset parameter. Change
- name of offset parameter to note_offset. Only use desc2_offset
- when placing addend into REL reloc's address space.
- (maybe_generate_build_notes): Update parameters passed to
- create_note_reloc.
-
-2019-07-01 Matthew Malcomson <matthew.malcomson@arm.com>
-
- * testsuite/gas/aarch64/illegal-sve2-aes.d: Update tests.
- * testsuite/gas/aarch64/illegal-sve2.l: Update tests.
- * doc/c-aarch64.texi: Add special note of pmull{t,b}
- instructions under the sve2-aes architecture extension.
- * testsuite/gas/aarch64/illegal-sve2.s: Add small size
- pmull{t,b} instructions.
- * testsuite/gas/aarch64/sve2.d: Add small size pmull{t,b}
- disassembly.
- * testsuite/gas/aarch64/sve2.s: Add small size pmull{t,b}
- instructions.
+ * testsuite/gas/ppc/vec_mul.s,
+ * testsuite/gas/ppc/vec_mul.d: New test.
+ * testsuite/gas/ppc/ppc.exp: Run it.
-2019-07-01 Nick Clifton <nickc@redhat.com>
+2020-05-11 Peter Bergner <bergner@linux.ibm.com>
- PR 24738
- * doc/c-i386.texi (i386-Directives): Add a description of the
- Value directive.
+ * testsuite/gas/ppc/byte_rev.d,
+ * testsuite/gas/ppc/byte_rev.s: New test.
+ * testsuite/gas/ppc/ppc.exp: Run it.
-2019-07-01 Nick Clifton <nickc@redhat.com>
+2020-05-11 Peter Bergner <bergner@linux.ibm.com>
- PR 24737
- * doc/as.texi (Align): Add missing word to description of
- pseudo-op.
- (P2align): Likewise.
+ * testsuite/gas/ppc/power10.d: Add paste. tests.
+ * testsuite/gas/ppc/power10.s: Likewise.
-2019-06-28 Nick Clifton <nickc@redhat.com>
+2020-05-11 Peter Bergner <bergner@linux.ibm.com>
- PR 24735
- * doc/as.texi (Zero): Fix spelling typo.
+ * testsuite/gas/ppc/power10.s: New test.
+ * testsuite/gas/ppc/power10.d: Likewise.
+ * testsuite/gas/ppc/ppc.exp: Run it.
-2019-07-01 Jan Beulich <jbeulich@suse.com>
+2020-05-11 Alan Modra <amodra@gmail.com>
- * config/tc-i386.c (vec_imm4): Delete.
- (VEX_check_operands): Replace Vec_Imm4 check by CpuXOP with five
- operands one. Clear Imm<N> by different means.
- (build_modrm_byte): Adjust comment. Remove dead code. Add and
- adjust assertions.
+ * config/tc-ppc.c (md_assemble): Update for PPC_OPCODE_POWER10
+ renaming.
+ * testsuite/gas/ppc/prefix-align.d: Use -mpower10/-Mpower10 in
+ place of -mfuture/-Mfuture.
+ * testsuite/gas/ppc/prefix-pcrel.d: Likewise.
+ * testsuite/gas/ppc/prefix-reloc.d: Likewise.
-2019-07-01 Jan Beulich <jbeulich@suse.com>
+2020-05-06 Nick Clifton <nickc@redhat.com>
- * config/tc-i386.c (output_insn): Adjust recognition of xFENCE
- insns. Move PadLock special case of prefix emission to 3-byte
- long base opcode handling.
- (i386_index_check): Check for CpuPadLock instead of ImmExt.
+ * po/sv.po: Updated Swedish translation.
-2019-07-01 Jan Beulich <jbeulich@suse.com>
+2020-05-06 Nick Clifton <nickc@redhat.com>
- * config/tc-i386.c (optimize_encoding): Handle AND / OR with
- both operands being the same register.
- * doc/c-i386.texi: Update -O2 documentation.
- * testsuite/gas/i386/optimize-2.s,
- testsuite/gas/i386/x86-64-optimize-3.s: Add cases of AND / OR
- with both operands being the same register.
- * testsuite/gas/i386/optimize-2.d,
- testsuite/gas/i386/x86-64-optimize-3.d: Adjust expectations.
- * testsuite/gas/i386/optimize-2b.d,
- testsuite/gas/i386/x86-64-optimize-3b.d: New.
- * testsuite/gas/i386/i386.exp: Run new test.
+ PR 25927
+ * doc/as.texi (Preprocessing): Replace cross reference to not
+ existant document with a URL to the equivalent page in the GCC
+ manual.
+
+2020-05-05 Nick Clifton <nickc@redhat.com>
+
+ * dwarf2dbg.c (out_dir_and_file_list): Add comments describing the
+ construction of a DWARF-5 directory name table.
+ * testsuite/gas/elf/pr25917.d: Update expected output.
+
+2020-05-05 Gunther Nikl <gnikl@justmail.de>
+
+ * config/tc-rx.c (elf_flags): Initialize for non-linux targets.
+ (md_parse_option): Remove initialization of elf_flags.
+
+2020-05-04 Andre Vieira <andre.simoesdiasvieira@arm.com>
+
+ PR gas/25863
+ * config/tc-arm.c (do_mve_vmull): Fix scalar and NEON parsing of vmul.
+ * testsuite/gas/arm/mve-scalar-vmult-it.d: New test.
+ * testsuite/gas/arm/mve-scalar-vmult-it.s: New test.
+
+2020-05-04 Nick Clifton <nickc@redhat.com>
+
+ PR 25917
+ * dwarf2dbg.c (out_dir_and_file_list): Check for the directory
+ table's existence before looking at its entries.
+ Also do not emit a default directory entry if there are no
+ directories in use.
+
+ * testsuite/gas/elf/pr25917.s: New test source file.
+ * testsuite/gas/elf/pr25917.d: New test driver.
+ * testsuite/gas/elf/elf.exp (run_elf_list_test): Run the new test.
+
+2020-04-30 Alex Coplan <alex.coplan@arm.com>
+
+ * config/tc-aarch64.c (fix_insn): Implement for
+ AARCH64_OPND_UNDEFINED.
+ (parse_operands): Implement for AARCH64_OPND_UNDEFINED.
+ * testsuite/gas/aarch64/udf.s: New.
+ * testsuite/gas/aarch64/udf.d: New.
+ * testsuite/gas/aarch64/udf-invalid.s: New.
+ * testsuite/gas/aarch64/udf-invalid.l: New.
+ * testsuite/gas/aarch64/udf-invalid.d: New.
+
+2020-04-30 Yoshinori Sato <ysato@users.sourceforge.jp>
+
+ * config/tc-rx.c (elf_flags): Reset default value.
+ (md_parse_option): For rx-elf Initialize elf_flags with RX_ABI.
+
+2020-04-29 Max Filippov <jcmvbkbc@gmail.com>
+
+ * config/tc-xtensa.c (XTENSA_MARCH_EARLIEST): Define macro as 0
+ if it's not defined.
+ (microarch_earliest): New static variable.
+ (xg_translate_idioms): Translate "simcall" to "simcall 0" when
+ simcall opcode has mandatory parameter.
+ (xg_init_global_config): Initialize microarch_earliest.
+
+2020-04-29 Nick Clifton <nickc@redhat.com>
+
+ PR 22699
+ * config/tc-sh.c (build_Mytes): Change operand type IMM0_8 to
+ IMM0_8S and add support for IMM0_8U.
+ * testsuite/gas/sh/sh4a.s: Add test of a logical insn using an
+ unsigned 8-bit immediate.
+ * testsuite/gas/sh/sh4a.d: Extended expected disassembly.
+ * testsuite/gas/sh/sh4al-dsp.d: Update expected disassembly.
+
+2020-04-27 Tamar Christina <tamar.christina@arm.com>
+
+ * NEWS: Add news entry for big-obj.
+ * config/tc-i386.c (i386_target_format): Support new format.
+ * doc/c-i386.texi: Add i386 support.
+ * testsuite/gas/pe/big-obj.d: Rename test to not be x64 specific.
+ * testsuite/gas/pe/pe.exp (big-obj): Make test run on i386 as well.
+
+2020-04-27 Nick Clifton <nickc@redhat.com>
+
+ PR 25878
+ * dwarf2dbg.c (struct file_entry): Add auto_assigned field.
+ (assign_file_to_slot): New function. Fills in an entry in the
+ files table.
+ (allocate_filenum): Use new function.
+ (allocate_filename_to_slot): Use new function. If the specified
+ slot entry is already in use, but was chosen automatically then
+ reassign the automatic entry.
+
+2020-04-26 Hongtao Liu <hongtao.liu@intel.com
+
+ * config/tc-i386.c (lfence_before_ret_shl): New member.
+ (load_insn_p): implict load for POP/POPA/POPF/XLATB, no load
+ for Anysize insns.
+ (insert_after_load): Issue warning for REP CMPS/SCAS.
+ (insert_before_before): Handle iret, Handle
+ -mlfence-before-ret=shl, Adjust operand size of or/not/shl to ret's,
+ (md_parse_option): Change -mlfence-before-ret=[none|not|or] to
+ -mlfence-before-ret=[none/not/or/shl/yes].
+ Enable -mlfence-before-ret=shl when
+ -mlfence-beofre-indirect-branch=all and no explict -mlfence-before-ret option.
+ (md_show_usage): Ditto.
+ * doc/c-i386.texi: Ditto.
+ * testsuite/gas/i386/i386.exp: Add new testcases.
+ * testsuite/gas/i386/lfence-load-b.d: New.
+ * testsuite/gas/i386/lfence-load-b.e: New.
+ * testsuite/gas/i386/lfence-load.d: Modified.
+ * testsuite/gas/i386/lfence-load.e: New.
+ * testsuite/gas/i386/lfence-load.s: Modified.
+ * testsuite/gas/i386/lfence-ret-a.d: Modified.
+ * testsuite/gas/i386/lfence-ret-b.d: Modified.
+ * testsuite/gas/i386/lfence-ret-c.d: New.
+ * testsuite/gas/i386/lfence-ret-d.d: New.
+ * testsuite/gas/i386/lfence-ret.s: Modified.
+ * testsuite/gas/i386/x86-64-lfence-load-b.d: New.
+ * testsuite/gas/i386/x86-64-lfence-load.d: Modified.
+ * testsuite/gas/i386/x86-64-lfence-load.s: Modified.
+ * testsuite/gas/i386/x86-64-lfence-ret-a.d: Modified.
+ * testsuite/gas/i386/x86-64-lfence-ret-b.d: Modified.
+ * testsuite/gas/i386/x86-64-lfence-ret-c.d: New.
+ * testsuite/gas/i386/x86-64-lfence-ret-d.d: New
+ * testsuite/gas/i386/x86-64-lfence-ret-e.d: New.
+ * testsuite/gas/i386/x86-64-lfence-ret.e: New.
+ * testsuite/gas/i386/x86-64-lfence-ret.s: New.
+
+2020-04-22 Max Filippov <jcmvbkbc@gmail.com>
+
+ PR ld/25861
+ * config/tc-xtensa.c (md_apply_fix): Replace
+ BFD_RELOC_XTENSA_DIFF{8,16,32} generation with
+ BFD_RELOC_XTENSA_PDIFF{8,16,32} and
+ BFD_RELOC_XTENSA_NDIFF{8,16,32} generation.
+ * testsuite/gas/xtensa/loc.d: Replace BFD_RELOC_XTENSA_DIFF16
+ with BFD_RELOC_XTENSA_PDIFF16 in the expected output.
+
+2020-04-22 Alan Modra <amodra@gmail.com>
+
+ * config/obj-elf.c (elf_frob_symbol): Unconditionally remove
+ symbol for ".symver .. remove".
+ * doc/as.texi (.symver): Update.
+ * testsuite/gas/symver/symver11.s: Make foo weak.
+ * testsuite/gas/symver/symver11.d: Expect an error.
+ * testsuite/gas/symver/symver7.d: Allow other random symbols.
+
+2020-04-21 H.J. Lu <hongjiu.lu@intel.com>
+
+ * testsuite/gas/symver/symver11.s: Add ".balign 8".
+
+2020-04-21 Andreas Schwab <schwab@linux-m68k.org>
+
+ PR 25848
+ * testsuite/gas/m68k/operands.s: Add tests for cmpi.
+ * testsuite/gas/m68k/operands.d: Update.
+ * testsuite/gas/m68k/op68000.d: Update for new error messages.
+
+2020-04-21 Tamar Christina <tamar.christina@arm.com>
+
+ PR binutils/24753
+ * testsuite/gas/arm/pr24753.d: New test.
+ * testsuite/gas/arm/pr24753.s: New test.
+
+2020-04-21 H.J. Lu <hongjiu.lu@intel.com>
+
+ PR gas/23840
+ PR gas/25295
+ * NEWS: Mention .symver extension.
+ * config/obj-elf.c (obj_elf_find_and_add_versioned_name): New
+ function.
+ (obj_elf_symver): Call obj_elf_find_and_add_versioned_name to
+ add a version name. Add local, hidden and remove visibility
+ support.
+ (elf_frob_symbol): Handle the list of version names. Update the
+ original symbol to local, hidden or remove it from the symbol
+ table.
+ (elf_frob_file_before_adjust): Handle the list of version names.
+ * config/obj-elf.h (elf_visibility): New.
+ (elf_versioned_name_list): Likewise.
+ (elf_obj_sy): Change local to bitfield. Add rename, bad_version
+ and visibility. Change versioned_name pointer to struct
+ elf_versioned_name_list.
+ * doc/as.texi: Update .symver directive.
+ * testsuite/gas/symver/symver.exp: Run all *.d tests. Add more
+ error checking tests.
+ * testsuite/gas/symver/symver6.d: New file.
+ * testsuite/gas/symver/symver7.d: Likewise.
+ * testsuite/gas/symver/symver7.s: Likewise.
+ * testsuite/gas/symver/symver8.d: Likewise.
+ * testsuite/gas/symver/symver8.s: Likewise.
+ * testsuite/gas/symver/symver9.s: Likewise.
+ * testsuite/gas/symver/symver9a.d: Likewise.
+ * testsuite/gas/symver/symver9b.d: Likewise.
+ * testsuite/gas/symver/symver10.s: Likewise.
+ * testsuite/gas/symver/symver10a.d: Likewise.
+ * testsuite/gas/symver/symver10b.d: Likewise.
+ * testsuite/gas/symver/symver11.d: Likewise.
+ * testsuite/gas/symver/symver11.s: Likewise.
+ * testsuite/gas/symver/symver12.d: Likewise.
+ * testsuite/gas/symver/symver12.s: Likewise.
+ * testsuite/gas/symver/symver13.d: Likewise.
+ * testsuite/gas/symver/symver13.s: Likewise.
+ * testsuite/gas/symver/symver14.d: Likewise.
+ * testsuite/gas/symver/symver14.l: Likewise.
+ * testsuite/gas/symver/symver15.d: Likewise.
+ * testsuite/gas/symver/symver15.l: Likewise.
+ * testsuite/gas/symver/symver6.l: Removed.
+ * testsuite/gas/symver/symver6.s: Updated.
+
+2020-04-20 Sudakshina Das <sudi.das@arm.com>
+
+ * config/tc-aarch64.c (parse_barrier_psb): Update error messages
+ to include TSB.
+ * testsuite/gas/aarch64/system-2.d: Update -march and new tsb tests.
+ * testsuite/gas/aarch64/system-2.s: Add new tsb tests.
+ * testsuite/gas/aarch64/system.d: Update.
+
+2020-04-20 Sudakshina Das <sudi.das@arm.com>
+
+ * testsuite/gas/aarch64/bti.d: Update -march option.
+ * testsuite/gas/aarch64/illegal-bti.d: Remove.
+ * testsuite/gas/aarch64/illegal-bti.l: Remove.
+ * testsuite/gas/aarch64/illegal-ras-1.l: Remove esb.
+ * testsuite/gas/aarch64/illegal-ras-1.s: Remove esb.
+
+2020-04-17 Alan Modra <amodra@gmail.com>
+
+ * config/tc-bfin.h (TC_EQUAL_IN_INSN): Allow assignment to dot.
+
+2020-04-16 Gagan Singh Sidhu <broly@mac.com>
+ Nick Clifton <nickc@redhat.com>
-2019-07-01 Jan Beulich <jbeulich@suse.com>
-
- * config/tc-i386.c (commutative): New.
- (build_vex_prefix): Handle commutative case.
- (optimize_encoding): Set commutative flag when appropriate.
- * doc/c-i386.texi: Update -O2 documentation.
- * testsuite/gas/i386/ilp32/x86-64-sse2avx.d: Re-use parent dir
- output.
- * testsuite/gas/i386/x86-64-sse2avx.s: Add tests with high
- numbered source operands.
- * testsuite/gas/i386/x86-64-optimize-2.d,
- testsuite/gas/i386/x86-64-optimize-2b.d,
- testsuite/gas/i386/x86-64-optimize-3.d,
- testsuite/gas/i386/x86-64-optimize-5.d,
- testsuite/gas/i386/x86-64-optimize-6.d,
- testsuite/gas/i386/x86-64-sse2avx.d: Adjust expectations.
- * testsuite/gas/i386/x86-64-avx-swap-2.d,
- testsuite/gas/i386/x86-64-avx-swap-2.s: New.
- * testsuite/gas/i386/i386.exp: Run new test.
+ PR 25803
+ * config/obj-elf.c (obj_elf_type): Reject ifunc symbols on MIPS
+ targets.
+ * testsuite/gas/elf/elf.exp: Add MIPS targets to the list to skip
+ for the type-2 test.
+ * testsuite/gas/elf/type-noifunc.e: Update to allow for MIPS
+ targets running this test.
+
+2020-02-16 David Faust <david.faust@oracle.com>
+
+ * testsuite/gas/bpf/bpf.exp: Run jump32 tests.
+ * testsuite/gas/bpf/jump32.s: New file.
+ * testsuite/gas/bpf/jump32.d: Likewise.
+
+2020-04-08 H.J. Lu <hongjiu.lu@intel.com>
+
+ * doc/c-i386.texi: Correct -mlfence-before-indirect-branch=
+ documentation.
+
+2020-04-08 Gunther Nikl <gnikl@justmail.de>
+
+ * config/tc-moxie.h (MD_PCREL_FROM_SECTION): Delete define.
+ (md_pcrel_from): Remove prototytpe.
+ * config/tc-m32c.h (MD_PCREL_FROM_SECTION): Delete duplicate
+ define.
+ (md_pcrel_from_section): Remove duplicate prototype.
+ * tc.h (md_pcrel_from_section): Add prototype.
+ * config/tc-aarch64.h (md_pcrel_from_section): Remove prototype.
+ * config/tc-arc.h (md_pcrel_from_section): Likewise.
+ * config/tc-arm.h (md_pcrel_from_section): Likewise.
+ * config/tc-avr.h (md_pcrel_from_section): Likewise.
+ * config/tc-bfin.h (md_pcrel_from_section): Likewise.
+ * config/tc-bpf.h (md_pcrel_from_section): Likewise.
+ * config/tc-csky.h (md_pcrel_from_section): Likewise.
+ * config/tc-d10v.h (md_pcrel_from_section): Likewise.
+ * config/tc-d30v.h (md_pcrel_from_section): Likewise.
+ * config/tc-epiphany.h (md_pcrel_from_section): Likewise.
+ * config/tc-fr30.h (md_pcrel_from_section): Likewise.
+ * config/tc-frv.h (md_pcrel_from_section): Likewise.
+ * config/tc-iq2000.h (md_pcrel_from_section): Likewise.
+ * config/tc-lm32.h (md_pcrel_from_section): Likewise.
+ * config/tc-m32c.h (md_pcrel_from_section): Likewise.
+ * config/tc-m32r.h (md_pcrel_from_section): Likewise.
+ * config/tc-mcore.h (md_pcrel_from_section): Likewise.
+ * config/tc-mep.h (md_pcrel_from_section): Likewise.
+ * config/tc-metag.h (md_pcrel_from_section): Likewise.
+ * config/tc-microblaze.h (md_pcrel_from_section): Likewise.
+ * config/tc-mmix.h (md_pcrel_from_section): Likewise.
+ * config/tc-moxie.h (md_pcrel_from_section): Likewise.
+ * config/tc-msp430.h (md_pcrel_from_section): Likewise.
+ * config/tc-mt.h (md_pcrel_from_section): Likewise.
+ * config/tc-or1k.h (md_pcrel_from_section): Likewise.
+ * config/tc-ppc.h (md_pcrel_from_section): Likewise.
+ * config/tc-rl78.h (md_pcrel_from_section): Likewise.
+ * config/tc-rx.h (md_pcrel_from_section): Likewise.
+ * config/tc-s390.h (md_pcrel_from_section): Likewise.
+ * config/tc-sh.h (md_pcrel_from_section): Likewise.
+ * config/tc-xc16x.h (md_pcrel_from_section): Likewise.
+ * config/tc-xstormy16.h (md_pcrel_from_section): Likewise.
+ * config/tc-microblaze.h (md_begin, md_assemble, md_undefined_symbol,
+ md_show_usage, md_convert_frag, md_operand, md_number_to_chars,
+ md_estimate_size_before_relax, md_section_align, tc_gen_reloc,
+ md_apply_fix3): Delete prototypes.
+
+2020-04-07 H.J. Lu <hongjiu.lu@intel.com>
+
+ * NEWS: Mention support for Intel SERIALIZE and TSXLDTRK
+ instructions.
-2019-07-01 Jan Beulich <jbeulich@suse.com>
-
- * config/tc-i386.c (is_evex_encoding): Don't check for SAE.
- (check_VecOperands): Simplify static rounding / SAE checking.
-
-2019-07-01 Jan Beulich <jbeulich@suse.com>
-
- * config/tc-i386.c (optimize_encoding): Make j unsigned. Handle
- vpand{d,q}, vpandn{d,q}, vpor{d,q}, and vpxor{d,q}. Also check/
- clear broadcast. Eliminate a loop.
- * doc/c-i386.texi: Update -O1 documentation.
- * testsuite/gas/i386/optimize-1.s,
- testsuite/gas/i386/optimize-2.s,
- testsuite/gas/i386/optimize-3.s,
- testsuite/gas/i386/optimize-5.s,
- testsuite/gas/i386/x86-64-optimize-2.s,
- testsuite/gas/i386/x86-64-optimize-3.s,
- testsuite/gas/i386/x86-64-optimize-4.s,
- testsuite/gas/i386/x86-64-optimize-6.s: Add vpand{d,q},
- vpandn{d,q}, vpor{d,q}, and vpxor{d,q} cases.
- testsuite/gas/i386/optimize-1.d,
- testsuite/gas/i386/optimize-1a.d,
- testsuite/gas/i386/optimize-2.d,
- testsuite/gas/i386/optimize-3.d,
- testsuite/gas/i386/optimize-4.d,
- testsuite/gas/i386/optimize-5.d,
- testsuite/gas/i386/x86-64-optimize-2.d,
- testsuite/gas/i386/x86-64-optimize-2a.d,
- testsuite/gas/i386/x86-64-optimize-2b.d,
- testsuite/gas/i386/x86-64-optimize-3.d,
- testsuite/gas/i386/x86-64-optimize-4.d,
- testsuite/gas/i386/x86-64-optimize-5.d,
- testsuite/gas/i386/x86-64-optimize-6.d: Adjust expectations.
-
-2019-07-01 Jan Beulich <jbeulich@suse.com>
-
- * testsuite/gas/i386/avx512f_vpclmulqdq.s,
- testsuite/gas/i386/avx512vl_vpclmulqdq.s,
- testsuite/gas/i386/vpclmulqdq.s,
- testsuite/gas/i386/x86-64-avx512f_vpclmulqdq.s,
- testsuite/gas/i386/x86-64-avx512vl_vpclmulqdq.s: Add pseudo ops.
- * testsuite/gas/i386/x86-64-vpclmulqdq.s: Likewise. Don't use
- high 16 [xy]mm registers.
- * testsuite/gas/i386/avx512f_vpclmulqdq.d,
- testsuite/gas/i386/avx512f_vpclmulqdq-intel.d,
- testsuite/gas/i386/avx512vl_vpclmulqdq.d,
- testsuite/gas/i386/avx512vl_vpclmulqdq-intel.d,
- testsuite/gas/i386/vpclmulqdq.d,
- testsuite/gas/i386/vpclmulqdq-intel.d,
- testsuite/gas/i386/x86-64-avx512f_vpclmulqdq.d,
- testsuite/gas/i386/x86-64-avx512f_vpclmulqdq-intel.d,
- testsuite/gas/i386/x86-64-avx512vl_vpclmulqdq.d,
- testsuite/gas/i386/x86-64-avx512vl_vpclmulqdq-intel.d,
- testsuite/gas/i386/x86-64-vpclmulqdq.d,
- testsuite/gas/i386/x86-64-vpclmulqdq-intel.d: Adjust
- expectations.
+2020-04-07 H.J. Lu <hongjiu.lu@intel.com>
+
+ * doc/c-z80.texi: Fix @xref warnings.
+
+2020-04-07 Lili Cui <lili.cui@intel.com>
+
+ * config/tc-i386.c (cpu_arch): Add .TSXLDTRK.
+ (cpu_noarch): Likewise.
+ * doc/c-i386.texi: Document TSXLDTRK.
+ * testsuite/gas/i386/i386.exp: Run TSXLDTRK tests.
+ * testsuite/gas/i386/tsxldtrk.d: Likewise.
+ * testsuite/gas/i386/tsxldtrk.s: Likewise.
+ * testsuite/gas/i386/x86-64-tsxldtrk.d: Likewise.
-2019-07-01 Jan Beulich <jbeulich@suse.com>
+2020-04-02 Lili Cui <lili.cui@intel.com>
- * tc-i386.c (output_disp, output_imm): Use encoding_length.
+ * config/tc-i386.c (cpu_arch): Add .serialize.
+ (cpu_noarch): Likewise.
+ * doc/c-i386.texi: Document serialize.
+ * testsuite/gas/i386/i386.exp: Run serialize tests
+ * testsuite/gas/i386/serialize.d: Likewise.
+ * testsuite/gas/i386/x86-64-serialize.d: Likewise.
+ * testsuite/gas/i386/serialize.s: Likewise.
-2019-07-01 Jan Beulich <jbeulich@suse.com>
+2020-04-02 Rainer Orth <ro@CeBiTec.Uni-Bielefeld.DE>
+
+ * testsuite/gas/elf/section12a.d: Use notarget instead of xfail.
+ * testsuite/gas/elf/section12b.d: Likewise.
+ * testsuite/gas/elf/section16a.d: Likewise.
+ * testsuite/gas/elf/section16b.d: Likewise.
+
+2020-04-02 Gunther Nikl <gnikl@justmail.de>
+
+ * config/tc-m68k.c (m68k_ip): Fix range check for index register
+ with a suppressed address register.
+
+2020-04-01 H.J. Lu <hongjiu.lu@intel.com>
+
+ PR gas/25756
+ * config/tc-i386.h (TC_FORCE_RELOCATION_ABS): New.
+ * testsuite/gas/i386/localpic.s: Add a test for relocation
+ against local absolute symbol.
+ * testsuite/gas/i386/x86-64-localpic.s: Likewise.
+ * testsuite/gas/i386/localpic.d: Updated.
+ * testsuite/gas/i386/x86-64-localpic.d: Likewise.
+ * testsuite/gas/i386/ilp32/x86-64-localpic.d: Likewise.
+
+2020-04-01 Rainer Orth <ro@CeBiTec.Uni-Bielefeld.DE>
+
+ PR gas/25732
+ * testsuite/gas/i386/solaris/x86-64-branch-2.d: New file.
+ * testsuite/gas/i386/solaris/x86-64-branch-3.d: New file.
+ * testsuite/gas/i386/solaris/x86-64-jump.d: Incorporate changes to
+ testsuite/gas/i386/x86-64-jump.d.
+ * gas/testsuite/gas/i386/solaris/x86-64-mpx-branch-1.d:
+ Incorporate changes to
+ gas/testsuite/gas/i386/x86-64-mpx-branch-1.d.
+ * testsuite/gas/i386/solaris/x86-64-mpx-branch-2.d : Incorporate
+ changes to testsuite/gas/i386/x86-64-mpx-branch-2.d.
+ * testsuite/gas/i386/x86-64-branch-2.d: Skip on *-*-solaris*.
+ * testsuite/gas/i386/x86-64-branch-3.d: Likewise.
+
+2020-03-31 Maciej W. Rozycki <macro@linux-mips.org>
+
+ PR 25611
+ PR 25614
+ * dwarf2dbg.c: Do not include "bignum.h".
+
+2020-03-30 Nelson Chu <nelson.chu@sifive.com>
+
+ * testsuite/gas/riscv/alias-csr.d: Move this to priv-reg-pseudo.
+ * testsuite/gas/riscv/alias-csr.s: Likewise.
+ * testsuite/gas/riscv/no-aliases-csr.d: Move this
+ to priv-reg-pseudo-noalias.
+ * testsuite/gas/riscv/bad-csr.d: Rename to priv-reg-fail-nonexistent.
+ * testsuite/gas/riscv/bad-csr.l: Likewise.
+ * testsuite/gas/riscv/bad-csr.s: Likewise.
+ * testsuite/gas/riscv/satp.d: Removed. Already included in priv-reg.
+ * testsuite/gas/riscv/satp.s: Likewise.
+ * testsuite/gas/riscv/priv-reg-pseudo.d: New testcase for all pseudo
+ csr instruction, including alias-csr testcase.
+ * testsuite/gas/riscv/priv-reg-pseudo.s: Likewise.
+ * testsuite/gas/riscv/priv-reg-pseudo-noalias.d: New testcase for all
+ pseudo instruction with objdump -Mno-aliases.
+ * testsuite/gas/riscv/priv-reg-fail-nonexistent.d: New testcase.
+ * testsuite/gas/riscv/priv-reg-fail-nonexistent.l: Likewise.
+ * testsuite/gas/riscv/priv-reg-fail-nonexistent.s: Likewise.
+ * testsuite/gas/riscv/priv-reg.d: Update CSR to 1.11.
+ * testsuite/gas/riscv/priv-reg.s: Likewise.
+ * testsuite/gas/riscv/priv-reg-fail-rv32-only.l: Likewise.
+ * testsuite/gas/riscv/csr-dw-regnums.d: Likewise.
+ * testsuite/gas/riscv/csr-dw-regnums.s: Likewise.
+
+2020-03-25 J.W. Jagersma <jwjagersma@gmail.com>
+
+ * config/obj-coff.c (obj_coff_section): Set the bss flag on
+ sections with the "b" attribute.
+
+2020-03-22 Alan Modra <amodra@gmail.com>
+
+ * testsuite/gas/s12z/truncated.d: Update expected output.
+
+2020-03-17 Sergey Belyashov <sergey.belyashov@gmail.com>
+
+ PR 25690
+ * config/tc-z80.c (md_pseudo_table): Add xdef anf xref pseudo ops.
+ * doc/c-z80.texi: Update documentation.
+
+2020-03-17 Sergey Belyashov <sergey.belyashov@gmail.com>
+
+ PR 25641
+ PR 25668
+ PR 25633
+ Fix disassembling ED+A4/AC/B4/BC opcodes.
+ Fix assembling lines containing colonless label and instruction
+ with first operand inside parentheses.
+ Fix registration of unsupported by target CPU registers.
+ * config/tc-z80.c: See above.
+ * config/tc-z80.h: See above.
+ * testsuite/gas/z80/colonless.d: Update test.
+ * testsuite/gas/z80/colonless.s: Likewise.
+ * testsuite/gas/z80/ez80_adl_all.d: Likewise.
+ * testsuite/gas/z80/ez80_unsup_regs.d: Likewise.
+ * testsuite/gas/z80/ez80_z80_all.d: Likewise.
+ * testsuite/gas/z80/gbz80_unsup_regs.d: Likewise.
+ * testsuite/gas/z80/r800_unsup_regs.d: Likewise.
+ * testsuite/gas/z80/unsup_regs.s: Likewise.
+ * testsuite/gas/z80/z180_unsup_regs.d: Likewise.
+ * testsuite/gas/z80/z80.exp: Likewise.
+ * testsuite/gas/z80/z80_strict_unsup_regs.d: Likewise.
+ * testsuite/gas/z80/z80_unsup_regs.d: Likewise.
+ * testsuite/gas/z80/z80n_unsup_regs.d: Likewise.
+
+2020-03-13 Andre Vieira <andre.simoesdiasvieira@arm.com>
+
+ PR 25660
+ * config/tc-arm.c (operand_parse_code): Add OP_RNSDMQR and OP_oRNSDMQ.
+ (parse_operands): Handle new operand codes.
+ (do_neon_dyadic_long): Make shape check accept the scalar variants.
+ (asm_opcode_insns): Fix operand codes for vaddl and vsubl.
+ * testsuite/gas/arm/mve-vaddsub-it.s: New test.
+ * testsuite/gas/arm/mve-vaddsub-it.d: New test.
+ * testsuite/gas/arm/mve-vaddsub-it-bad.s: New test.
+ * testsuite/gas/arm/mve-vaddsub-it-bad.l: New test.
+ * testsuite/gas/arm/mve-vaddsub-it-bad.d: New test.
+ * testsuite/gas/arm/nomve-vaddsub-it.d: New test.
+
+2020-03-11 H.J. Lu <hongjiu.lu@intel.com>
+
+ * NEWS: Mention x86 assembler options for CVE-2020-0551.
+
+2020-03-11 H.J. Lu <hongjiu.lu@intel.com>
- * tc-i386.c (encoding_length): New.
- (output_insn): Use it.
- * testsuite/gas/i386/oversized16.l,
- testsuite/gas/i386/oversized16.s,
- testsuite/gas/i386/oversized64.l,
- testsuite/gas/i386/oversized64.s: New.
* testsuite/gas/i386/i386.exp: Run new tests.
+ * testsuite/gas/i386/lfence-byte.d: New file.
+ * testsuite/gas/i386/lfence-byte.e: Likewise.
+ * testsuite/gas/i386/lfence-byte.s: Likewise.
+ * testsuite/gas/i386/lfence-indbr-a.d: Likewise.
+ * testsuite/gas/i386/lfence-indbr-b.d: Likewise.
+ * testsuite/gas/i386/lfence-indbr-c.d: Likewise.
+ * testsuite/gas/i386/lfence-indbr.e: Likewise.
+ * testsuite/gas/i386/lfence-indbr.s: Likewise.
+ * testsuite/gas/i386/lfence-load.d: Likewise.
+ * testsuite/gas/i386/lfence-load.s: Likewise.
+ * testsuite/gas/i386/lfence-ret-a.d: Likewise.
+ * testsuite/gas/i386/lfence-ret-b.d: Likewise.
+ * testsuite/gas/i386/lfence-ret.s: Likewise.
+ * testsuite/gas/i386/x86-64-lfence-byte.d: Likewise.
+ * testsuite/gas/i386/x86-64-lfence-byte.e: Likewise.
+ * testsuite/gas/i386/x86-64-lfence-byte.s: Likewise.
+ * testsuite/gas/i386/x86-64-lfence-indbr-a.d: Likewise.
+ * testsuite/gas/i386/x86-64-lfence-indbr-b.d: Likewise.
+ * testsuite/gas/i386/x86-64-lfence-indbr-c.d: Likewise.
+ * testsuite/gas/i386/x86-64-lfence-indbr.e: Likewise.
+ * testsuite/gas/i386/x86-64-lfence-indbr.s: Likewise.
+ * testsuite/gas/i386/x86-64-lfence-load.d: Likewise.
+ * testsuite/gas/i386/x86-64-lfence-load.s: Likewise.
+ * testsuite/gas/i386/x86-64-lfence-ret-a.d: Likewise.
+ * testsuite/gas/i386/x86-64-lfence-ret-b.d: Likewise.
+
+2020-03-11 H.J. Lu <hongjiu.lu@intel.com>
+
+ * config/tc-i386.c (lfence_after_load): New.
+ (lfence_before_indirect_branch_kind): New.
+ (lfence_before_indirect_branch): New.
+ (lfence_before_ret_kind): New.
+ (lfence_before_ret): New.
+ (last_insn): New.
+ (load_insn_p): New.
+ (insert_lfence_after): New.
+ (insert_lfence_before): New.
+ (md_assemble): Call insert_lfence_before and insert_lfence_after.
+ Set last_insn.
+ (OPTION_MLFENCE_AFTER_LOAD): New.
+ (OPTION_MLFENCE_BEFORE_INDIRECT_BRANCH): New.
+ (OPTION_MLFENCE_BEFORE_RET): New.
+ (md_longopts): Add -mlfence-after-load=,
+ -mlfence-before-indirect-branch= and -mlfence-before-ret=.
+ (md_parse_option): Handle -mlfence-after-load=,
+ -mlfence-before-indirect-branch= and -mlfence-before-ret=.
+ (md_show_usage): Display -mlfence-after-load=,
+ -mlfence-before-indirect-branch= and -mlfence-before-ret=.
+ (i386_cons_align): New.
+ * config/tc-i386.h (i386_cons_align): New.
+ (md_cons_align): New.
+ * doc/c-i386.texi: Document -mlfence-after-load=,
+ -mlfence-before-indirect-branch= and -mlfence-before-ret=.
+
+2020-03-11 Nick Clifton <nickc@redhat.com>
+
+ PR 25611
+ PR 25614
+ * dwarf2dbg.c (DWARF2_FILE_TIME_NAME): Default to -1.
+ (DWARF2_FILE_SIZE_NAME): Default to -1.
+ (DWARF2_LINE_VERSION): Default to the current dwarf level or 3,
+ whichever is higher.
+ (DWARF2_LINE_MAX_OPS_PER_INSN): Provide a default value of 1.
+ (NUM_MD5_BYTES): Define.
+ (struct file entry): Add md5 field.
+ (get_filenum): Delete and replace with...
+ (get_basename): New function.
+ (get_directory_table_entry): New function.
+ (allocate_filenum): New function.
+ (allocate_filename_to_slot): New function.
+ (dwarf2_where): Use new functions.
+ (dwarf2_directive_filename): Add support for extended .file
+ pseudo-op.
+ (dwarf2_directive_loc): Allow the use of file number zero with
+ DWARF 5 or higher.
+ (out_file_list): Rename to...
+ (out_dir_and_file_list): Add DWARF 5 support.
+ (out_debug_line): Emit extra values into the section header for
+ DWARF 5.
+ (out_debug_str): Allow for file 0 to be used with DWARF 5.
+ * doc/as.texi (.file): Update the description of this pseudo-op.
+ * testsuite/gas/elf-dwarf-5-file0.s: Add more lines.
+ * testsuite/gas/elf-dwarf-5-file0.d: Update expected dump output.
+ * testsuite/gas/lns/lns-diag-1.l: Update expected error message.
+ * NEWS: Mention the new feature.
+
+2020-03-10 Alan Modra <amodra@gmail.com>
+
+ * config/tc-csky.c (get_operand_value): Rewrite 1 << 31 expressions
+ to avoid signed overflow.
+ * config/tc-mcore.c (md_assemble): Likewise.
+ * config/tc-mips.c (gpr_read_mask, gpr_write_mask): Likewise.
+ * config/tc-nds32.c (SET_ADDEND): Likewise.
+ * config/tc-nios2.c (nios2_assemble_arg_R): Likewise.
+
+2020-03-09 Jan Beulich <jbeulich@suse.com>
+
+ * testsuite/gas/i386/avx.s: Add long-form VCMP[PS][SD] pseudos.
+ * testsuite/gas/i386/avx.d, testsuite/gas/i386/avx-16bit.d,
+ testsuite/gas/i386/avx-intel.d: Adjust expectations.
+
+2020-03-07 Alan Modra <amodra@gmail.com>
+
+ * testsuite/gas/elf/dwarf-5-file0.s: Don't start directives in
+ first column.
+
+2020-03-06 Nick Clifton <nickc@redhat.com>
+
+ PR 25614
+ * dwarf2dbg.c (dwarf2_directive_filename): Allow a file number of
+ 0 if the dwarf_level is 5 or more. Complain if a filename follows
+ a file 0.
+ * testsuite/gas/elf/dwarf-5-file0.s: New test.
+ * testsuite/gas/elf/dwarf-5-file0.d: New test driver.
+ * testsuite/gas/elf/elf.exp: Run the new test.
+
+ PR 25612
+ * config/tc-ia64.h (DWARF2_VERISION): Fix typo.
+ * doc/as.texi: Fix another typo.
+
+2020-03-06 Nick Clifton <nickc@redhat.com>
+
+ PR 25612
+ * as.c (dwarf_level): Define.
+ (show_usage): Add --gdwarf-3, --gdwarf-4 and --gdwarf-5.
+ (parse_args): Add support for the new options.
+ as.h (dwarf_level): Prototype.
+ * dwarf2dbg.c (DWARF2_VERSION): Use dwarf_level as default version
+ value.
+ * config/tc-ia64.h (DWARF2_VERISION): Update definition.
+ (DWARF2_LINE_VERSION): Remove definition.
+ * doc/as.texi: Document the new options.
+
+2020-03-06 Nick Clifton <nickc@redhat.com>
+
+ PR 25572
+ * as.c (main): Allow matching input and outputs when they are
+ not regular files.
+
+2020-03-06 Jan Beulich <jbeulich@suse.com>
+
+ * config/tc-i386.c (match_mem_size): Generalize broadcast special
+ casing.
+ (check_VecOperands): Zap xmmword/ymmword/zmmword when more than
+ one of byte/word/dword/qword is set alongside a SIMD register in
+ a template's operand.
+
+2020-03-06 Jan Beulich <jbeulich@suse.com>
+
+ * config/tc-i386.c (match_template): Extend code in logic
+ rejecting certain suffixes in certain modes to also cover mask
+ register use and VecSIB. Drop special casing of broadcast. Skip
+ immediates in the check.
+
+2020-03-06 Jan Beulich <jbeulich@suse.com>
+
+ * config/tc-i386.c (match_template): Fold duplicate code in
+ logic rejecting certain suffixes in certain modes. Drop
+ pointless "else".
+
+2020-03-06 Jan Beulich <jbeulich@suse.com>
+
+ * config/tc-i386.c (process_suffix): Exlucde !vexw insns
+ alongside !norex64 ones.
+ * testsuite/gas/i386/x86-64-avx512bw.s: Test VPEXTR* and VPINSR*
+ with both 32- and 64-bit GPR operands.
+ * testsuite/gas/i386/x86-64-avx512f.s: Test VEXTRACTPS with both
+ 32- and 64-bit GPR operands.
+ * testsuite/gas/i386/x86-64-avx512bw-intel.d,
+ testsuite/gas/i386/x86-64-avx512bw.d,
+ testsuite/gas/i386/x86-64-avx512f-intel.d,
+ testsuite/gas/i386/x86-64-avx512f.d: Adjust expectations.
+
+2020-03-06 Jan Beulich <jbeulich@suse.com>
+
+ * config/tc-i386.c (md_assemble): Drop use of rex64.
+ (process_suffix): For REX.W for 64-bit CRC32.
+
+2020-03-06 Jan Beulich <jbeulich@suse.com>
+
+ * config/tc-i386.c (i386_addressing_mode): For 32-bit
+ addressing for MPX insns without base/index.
+ * testsuite/gas/i386/mpx-16bit.s,
+ * testsuite/gas/i386/mpx-16bit.d: New.
+ * testsuite/gas/i386/i386.exp: Run new test.
-2019-06-27 H.J. Lu <hongjiu.lu@intel.com>
-
- PR binutils/24719
- * testsuite/gas/i386/disassem.s: Add test for vgatherpf0dps
- with invalid vector length.
- * testsuite/gas/i386/x86-64-disassem.s: Likewise.
- * testsuite/gas/i386/disassem.d: Updated.
- * testsuite/gas/i386/x86-64-disassem.d: Likewise.
-
-2019-06-27 Barnaby Wilk s<barnaby.wilks@arm.com>
-
- * config/tc-arm.c (do_smc): Add range check for immediate operand.
- (do_t_smc): Add range check for immediate operand. Remove
- obsolete immediate encoding.
- (md_apply_fix): Fix range check. Remove obsolete immediate encoding.
- * testsuite/gas/arm/arch6zk.d: Fix test.
- * testsuite/gas/arm/arch6zk.s: Fix test.
- * testsuite/gas/arm/smc-bad.d: New test.
- * testsuite/gas/arm/smc-bad.l: New test.
- * testsuite/gas/arm/smc-bad.s: New test.
- * testsuite/gas/arm/thumb32.d: Fix test.
- * testsuite/gas/arm/thumb32.s: Fix test.
-
-2019-06-27 Jan Beulich <jbeulich@suse.com>
-
- config/tc-i386.c (md_assemble): Check for protected mode
- incapable processor before encoding VEX and alike insns.
- * testsuite/gas/i386/inval-16.s: For 80186 architecture.
- * testsuite/gas/i386/inval-16.l: Adjust expectations.
- * testsuite/gas/i386/avx-16bit.d,
- testsuite/gas/i386/avx-16bit.s,
- testsuite/gas/i386/avx512f-16bit.d,
- testsuite/gas/i386/avx512f-16bit.s,
- testsuite/gas/i386/bmi-16bit.d,
- testsuite/gas/i386/bmi-16bit.s,
- testsuite/gas/i386/bmi2-16bit.d,
- testsuite/gas/i386/bmi2-16bit.s,
- testsuite/gas/i386/lwp-16bit.d,
- testsuite/gas/i386/lwp-16bit.s: New
- testsuite/gas/i386/i386.exp: Run new tests.
-
-2019-06-26 Jim Wilson <jimw@sifive.com>
-
- * testsuite/gas/xstormy16/allinsn.sh: Change first line to
- #!/bin/bash and make it executable.
- * testsuite/gas/xstormy16/gcc.sh: Likewise.
-
-2019-06-26 Lili Cui <lili.cui@intel.com>
-
- * doc/c-i386.texi: Document x/y/z instruction sufffixes in AT&T
- syntax and xmmword/ymmword/zmmword/fword/tbyte/oword ptr in
- Intel syntax.
-
-2019-06-25 Faraz Shahbazker <fshahbazker@wavecomp.com>
-
- * config/tc-mips.c (macro) <M_LI>: Re-order MTHC1 with
- respect to MTC1 and use $0 for either part where possible.
- * testsuite/gas/mips/li-d.s: Add test cases for non-zero
- words in double precision constants.
- * testsuite/gas/mips/li-d.d: Update reference output.
- * testsuite/gas/mips/micromips@isa-override-1.d: Likewise.
- * testsuite/gas/mips/mips32r2@isa-override-1.d: Likewise.
- * testsuite/gas/mips/mips64r2@isa-override-1.d: Likewise.
-
-2019-06-25 Jan Beulich <jbeulich@suse.com>
-
- * tc-i386.c (acc32, acc64): Delete.
- (pi): Make first parameter pinter-to-const.
- (type_names): Remove Acc. Add acc8, acc16, acc32, and acc64.
- (pt): Use operand_type_equal().
- (match_template): Replace use of acc32.
- (process_suffix): Replace use of acc64.
-
-2019-06-25 Jan Beulich <jbeulich@suse.com>
-
- * doc/c-i386.texi: Mark -mavxscalar= and -mvexwig as dangrous to
- use.
-
-2019-06-25 Jan Beulich <jbeulich@suse.com>
-
- * tc-i386.c (process_suffix): Use is_any_vex_encoding().
-
-2019-06-25 Jan Beulich <jbeulich@suse.com>
-
- * testsuite/gas/i386/sse2-16bit.d,
- testsuite/gas/i386/sse2-16bit.s: New.
- testsuite/gas/i386/i386.exp: Run new test.
-
-2019-06-25 Jan Beulich <jbeulich@suse.com>
-
- * config/tc-i386.c (optimize_encoding): Also handle ANDQ with
- immediatie fitting in 7 bits.
- * testsuite/gas/i386/x86-64-optimize-1.s: Add ANDQ cases with
- 7- and 8-bit immediates.
- * testsuite/gas/i386/x86-64-optimize-1.d: Adjust expectations.
-
-2019-06-25 Jan Beulich <jbeulich@suse.com>
-
- * testsuite/gas/i386/xmmword.s: Add cvtps2pi and cvttps2pi
- tests.
- * testsuite/gas/i386/xmmword.l: Adjust expectations.
+2020-03-06 Jan Beulich <jbeulich@suse.com>
+
+ * testsuite/gas/i386/adx.s, testsuite/gas/i386/cet.s,
+ testsuite/gas/i386/ept.s, testsuite/gas/i386/fsgs.s,
+ testsuite/gas/i386/invpcid.s, testsuite/gas/i386/movdir.s,
+ testsuite/gas/i386/ptwrite.s, testsuite/gas/i386/vmx.s,
+ * testsuite/gas/i386/code16.s: Add CR, DR, and TR access cases
+ as well as a BSWAP one.
+ * testsuite/gas/i386/rdpid.s: Add 16-bit case.
+ * testsuite/gas/i386/sse2-16bit.s: Cover more insns.
+ * testsuite/gas/i386/adx-intel.d, testsuite/gas/i386/adx.d,
+ testsuite/gas/i386/cet-intel.d, testsuite/gas/i386/cet.d,
+ testsuite/gas/i386/code16.d, testsuite/gas/i386/ept-intel.d,
+ testsuite/gas/i386/ept.d, testsuite/gas/i386/fsgs-intel.d,
+ testsuite/gas/i386/fsgs.d, testsuite/gas/i386/invpcid-intel.d,
+ testsuite/gas/i386/invpcid.d, testsuite/gas/i386/movdir-intel.d,
+ testsuite/gas/i386/movdir.d, testsuite/gas/i386/ptwrite-intel.d,
+ testsuite/gas/i386/ptwrite.d, testsuite/gas/i386/rdpid-intel.d,
+ testsuite/gas/i386/rdpid.d, testsuite/gas/i386/sse2-16bit.d,
+ testsuite/gas/i386/vmx.d: Adjust expectations.
+
+2020-03-06 Jan Beulich <jbeulich@suse.com>
+
+ * config/tc-i386.c (md_assemble): Also exclude tpause and umwait
+ from having their operands swapped.
+ * testsuite/gas/i386/waitpkg.s,
+ testsuite/gas/i386/x86-64-waitpkg.s: Add tpause and umwait
+ 3-operand cases as well as testing of 16-bit code generation.
+ * testsuite/gas/i386/waitpkg.d,
+ testsuite/gas/i386/waitpkg-intel.d,
+ testsuite/gas/i386/x86-64-waitpkg.d,
+ testsuite/gas/i386/x86-64-waitpkg-intel.d: Adjust expectations.
+
+2020-03-04 Nelson Chu <nelson.chu@sifive.com>
+
+ * config/tc-riscv.c (percent_op_utype): Support the modifier
+ %got_pcrel_hi.
+ * doc/c-riscv.texi: Add documentation.
+ * testsuite/gas/riscv/no-relax-reloc.d: Add test case for the new
+ modifier %got_pcrel_hi.
+ * testsuite/gas/riscv/no-relax-reloc.s: Likewise.
+ * testsuite/gas/riscv/relax-reloc.d: Likewise.
+ * testsuite/gas/riscv/relax-reloc.s: Likewise.
+
+ * doc/c-riscv.texi (relocation modifiers): Add documentation.
+ (RISC-V-Formats): Update the section name from "Instruction Formats"
+ to "RISC-V Instruction Formats".
+
+2020-03-04 Alexandre Oliva <oliva@adacore.com>
+
+ * config/tc-arm.c (md_apply_fix): Warn if a PC-relative load is
+ detected in a section which does not have at least 4 byte
+ alignment.
+ * testsuite/gas/arm/armv8-ar-it-bad.s: Add alignment directive.
+ * testsuite/gas/arm/ldr-t.s: Likewise.
+ * testsuite/gas/arm/sp-pc-usage-t.s: Likewise.
+ * testsuite/gas/arm/sp-pc-usage-t.d: Finish test at end of
+ disassembly, ignoring any NOPs that may have been inserted because
+ of section alignment.
+ * testsuite/gas/arm/ldr-t.d: Likewise.
+
+2020-03-04 Jan Beulich <jbeulich@suse.com>
+
+ * config/tc-i386.c (cpu_arch): Add .sev_es entry.
+ * doc/c-i386.texi: Mention sev_es.
+ * testsuite/gas/i386/arch-13.s: Add SEV-ES case.
+ * testsuite/gas/i386/arch-13.d: Extend -march=. Adjust
+ expectations.
+ * testsuite/gas/i386/arch-13-znver1.d,
+ testsuite/gas/i386/arch-13-znver2.d: Extend -march=.
+
+2020-03-03 H.J. Lu <hongjiu.lu@intel.com>
+
+ * config/tc-i386.c (match_template): Replace ignoresize and
+ defaultsize with mnemonicsize.
+ (process_suffix): Likewise.
+
+2020-03-03 Sergey Belyashov <sergey.belyashov@gmail.com>
+
+ PR 25627
+ * config/tc-z80.c (emit_ld_rr_m): Fix invalid compilation of
+ instruction LD IY,(HL).
+ * testsuite/gas/z80/ez80_adl_all.d: Update expected disassembly.
+ * testsuite/gas/z80/ez80_adl_all.s: Add tests of the instruction.
+ * testsuite/gas/z80/ez80_z80_all.d: Update expected disassembly.
+ * testsuite/gas/z80/ez80_z80_all.s: Add tests of the instruction.
+
+2020-03-03 H.J. Lu <hongjiu.lu@intel.com>
+
+ PR gas/25622
+ * testsuite/gas/i386/i386.exp: Run x86-64-default-suffix and
+ x86-64-default-suffix-avx.
+ * testsuite/gas/i386/noreg64.s: Remove cvtsi2sd, cvtsi2ss,
+ vcvtsi2sd, vcvtsi2ss, vcvtusi2sd and vcvtusi2ss entries.
+ * testsuite/gas/i386/noreg64.d: Updated.
+ * testsuite/gas/i386/noreg64.l: Likewise.
+ * testsuite/gas/i386/x86-64-default-suffix-avx.d: New file.
+ * testsuite/gas/i386/x86-64-default-suffix.d: Likewise.
+ * testsuite/gas/i386/x86-64-default-suffix.s: Likewise.
+
+2020-03-03 Sergey Belyashov <sergey.belyashov@gmail.com>
+
+ PR 25604
+ * config/tc-z80.c (contains_register): Prevent an illegal memory
+ access when checking an expression for a register name.
+
+2020-03-03 Alan Modra <amodra@gmail.com>
+
+ * config/obj-coff.h: Remove vestiges of coff-m68k and pe-mips
+ support.
+
+2020-03-02 Alan Modra <amodra@gmail.com>
+
+ * config/tc-m32r.c (md_begin): Set SEC_SMALL_DATA on .scommon section.
+ * config/tc-mips.c (s_change_sec): Set SEC_SMALL_DATA for .sdata
+ and .sbss sections.
+ * config/tc-score.c: Delete !BFD_ASSEMBLER code throughout.
+ (s3_s_change_sec): Set SEC_SMALL_DATA for .sbss section.
+ (s3_s_score_lcomm): Likewise.
+ * config/tc-score7.c: Similarly.
+ * read.c (bss_alloc): Set SEC_SMALL_DATA for .sbss section.
+
+2020-02-28 YunQiang Su <syq@debian.org>
+
+ PR gas/25539
+ * config/tc-mips.c (fix_loongson3_llsc): Compare label value
+ to handle multi-labels.
+ (has_label_name): New.
+
+2020-02-26 Matthew Malcomson <matthew.malcomson@arm.com>
+
+ * config/tc-arm.c (enum pred_instruction_type): Remove
+ NEUTRAL_IT_NO_VPT_INSN predication type.
+ (cxn_handle_predication): Modify to require condition suffixes.
+ (handle_pred_state): Remove NEUTRAL_IT_NO_VPT_INSN cases.
+ * testsuite/gas/arm/cde-scalar.s: Update test.
+ * testsuite/gas/arm/cde-warnings.l: Update test.
+ * testsuite/gas/arm/cde-warnings.s: Update test.
+
+2020-02-26 Alan Modra <amodra@gmail.com>
+
+ * config/tc-arm.c (reg_expected_msgs[REG_TYPE_RNB]): Don't use
+ N_() on empty string.
+
+2020-02-26 Alan Modra <amodra@gmail.com>
+
+ * read.c (read_a_source_file): Call strncpy with length one
+ less than size of original_case_string.
+
+2020-02-26 Alan Modra <amodra@gmail.com>
+
+ * config/obj-elf.c: Indent labels correctly.
+ * config/obj-macho.c: Likewise.
+ * config/tc-aarch64.c: Likewise.
+ * config/tc-alpha.c: Likewise.
+ * config/tc-arm.c: Likewise.
+ * config/tc-cr16.c: Likewise.
+ * config/tc-crx.c: Likewise.
+ * config/tc-frv.c: Likewise.
+ * config/tc-i386-intel.c: Likewise.
+ * config/tc-i386.c: Likewise.
+ * config/tc-ia64.c: Likewise.
+ * config/tc-mn10200.c: Likewise.
+ * config/tc-mn10300.c: Likewise.
+ * config/tc-nds32.c: Likewise.
+ * config/tc-riscv.c: Likewise.
+ * config/tc-s12z.c: Likewise.
+ * config/tc-xtensa.c: Likewise.
+ * config/tc-z80.c: Likewise.
+ * read.c: Likewise.
+ * symbols.c: Likewise.
+ * write.c: Likewise.
+
+2020-02-20 Nelson Chu <nelson.chu@sifive.com>
+
+ * config/tc-riscv.c (riscv_ip): New boolean insn_with_csr to indicate
+ we are assembling instruction with CSR. Call riscv_csr_read_only_check
+ after parsing all arguments.
+ (enum csr_insn_type): New enum is used to classify the CSR instruction.
+ (riscv_csr_insn_type, riscv_csr_read_only_check): New functions. These
+ are used to check if we write a read-only CSR by the CSR instruction.
+ * testsuite/gas/riscv/priv-reg-fail-read-only-01.s: New testcase. Test
+ all CSR for the read-only CSR checking.
+ * testsuite/gas/riscv/priv-reg-fail-read-only-01.d: Likewise.
+ * testsuite/gas/riscv/priv-reg-fail-read-only-01.l: Likewise.
+ * testsuite/gas/riscv/priv-reg-fail-read-only-02.s: New testcase. Test
+ all CSR instructions for the read-only CSR checking.
+ * testsuite/gas/riscv/priv-reg-fail-read-only-02.d: Likewise.
+ * testsuite/gas/riscv/priv-reg-fail-read-only-02.l: Likewise.
+
+ * config/tc-riscv.c (struct riscv_set_options): New field csr_check.
+ (riscv_opts): Initialize it.
+ (reg_lookup_internal): Check the `riscv_opts.csr_check`
+ before doing the CSR checking.
+ (enum options): Add OPTION_CSR_CHECK and OPTION_NO_CSR_CHECK.
+ (md_longopts): Add mcsr-check and mno-csr-check.
+ (md_parse_option): Handle new enum option values.
+ (s_riscv_option): Handle new long options.
+ * doc/c-riscv.texi: Add description for the new .option and assembler
+ options.
+ * testsuite/gas/riscv/priv-reg-fail-fext.d: Add `-mcsr-check` to enable
+ the CSR checking.
+ * testsuite/gas/riscv/priv-reg-fail-rv32-only.d: Likewise.
+
+ * config/tc-riscv.c (csr_extra_hash): New.
+ (enum riscv_csr_class): New enum. Used to decide
+ whether or not this CSR is legal in the current ISA string.
+ (struct riscv_csr_extra): New structure to hold all extra information
+ of CSR.
+ (riscv_init_csr_hashes): New. According to the DECLARE_CSR and
+ DECLARE_CSR_ALIAS, insert CSR extra information into csr_extra_hash.
+ Call hash_reg_name to insert CSR address into reg_names_hash.
+ (reg_csr_lookup_internal, riscv_csr_class_check): New functions.
+ Decide whether the CSR is valid according to the csr_extra_hash.
+ (reg_lookup_internal): Call reg_csr_lookup_internal for CSRs.
+ (init_opcode_hash): Update 'if (hash_error != NULL)' as hash_error is
+ not a boolean. This is same as riscv_init_csr_hash, so keep the
+ consistent usage.
+ (md_begin): Call riscv_init_csr_hashes for each DECLARE_CSR.
+ * testsuite/gas/riscv/csr-dw-regnums.d: Add -march=rv32if option.
+ * testsuite/gas/riscv/priv-reg.d: Add f-ext by -march option.
+ * testsuite/gas/riscv/priv-reg-fail-fext.d: New testcase. The source
+ file is `priv-reg.s`, and the ISA is rv32i without f-ext, so the
+ f-ext CSR are not allowed.
+ * testsuite/gas/riscv/priv-reg-fail-fext.l: Likewise.
+ * testsuite/gas/riscv/priv-reg-fail-rv32-only.d: New testcase. The
+ source file is `priv-reg.s`, and the ISA is rv64if, so the
+ rv32-only CSR are not allowed.
+ * testsuite/gas/riscv/priv-reg-fail-rv32-only.l: Likewise.
+
+2020-02-21 Alan Modra <amodra@gmail.com>
+
+ * config/tc-pdp11.c (md_apply_fix): Handle BFD_RELOC_32.
+ (tc_gen_reloc): Only give a BAD_CASE assertion on pcrel relocs.
+
+2020-02-21 Alan Modra <amodra@gmail.com>
+
+ PR 25569
+ * config/obj-aout.c (obj_aout_frob_file_before_fix): Don't loop
+ on section size adjustment, instead perform another write if
+ exec header size is larger than section size.
+
+2020-02-19 Nelson Chu <nelson.chu@sifive.com>
+
+ * doc/c-riscv.texi: Add the doc entries for -march-attr/
+ -mno-arch-attr command line options.
+
+2020-02-19 Nelson Chu <nelson.chu@sifive.com>
+
+ * testsuite/gas/riscv/c-add-addi.d: New testcase.
+ * testsuite/gas/riscv/c-add-addi.s: Likewise.
+
+2020-02-19 Sergey Belyashov <sergey.belyashov@gmail.com>
+
+ PR 25576
+ * config/tc-z80.c (md_parse_option): Do not use an underscore
+ prefix for local labels in SDCC compatability mode.
+ (z80_start_line_hook): Remove SDCC dollar label support.
+ * testsuite/gas/z80/sdcc.d: Update expected disassembly.
+ * testsuite/gas/z80/sdcc.s: Likewise.
+
+2020-02-19 Sergey Belyashov <sergey.belyashov@gmail.com>
+
+ PR 25517
+ * config/tc-z80.c: Add -march option.
+ * doc/as.texi: Update Z80 documentation.
+ * doc/c-z80.texi: Likewise.
+ * testsuite/gas/z80/ez80_adl_all.d: Update command line.
+ * testsuite/gas/z80/ez80_adl_suf.d: Likewise.
+ * testsuite/gas/z80/ez80_pref_dis.d: Likewise.
+ * testsuite/gas/z80/ez80_z80_all.d: Likewise.
+ * testsuite/gas/z80/ez80_z80_suf.d: Likewise.
+ * testsuite/gas/z80/gbz80_all.d: Likewise.
+ * testsuite/gas/z80/r800_extra.d: Likewise.
+ * testsuite/gas/z80/r800_ii8.d: Likewise.
+ * testsuite/gas/z80/r800_z80_doc.d: Likewise.
+ * testsuite/gas/z80/sdcc.d: Likewise.
+ * testsuite/gas/z80/z180.d: Likewise.
+ * testsuite/gas/z80/z180_z80_doc.d: Likewise.
+ * testsuite/gas/z80/z80_doc.d: Likewise.
+ * testsuite/gas/z80/z80_ii8.d: Likewise.
+ * testsuite/gas/z80/z80_in_f_c.d: Likewise.
+ * testsuite/gas/z80/z80_op_ii_ld.d: Likewise.
+ * testsuite/gas/z80/z80_out_c_0.d: Likewise.
+ * testsuite/gas/z80/z80_sli.d: Likewise.
+ * testsuite/gas/z80/z80n_all.d: Likewise.
+ * testsuite/gas/z80/z80n_reloc.d: Likewise.
+
+2020-02-19 H.J. Lu <hongjiu.lu@intel.com>
+
+ * config/tc-i386.c (output_insn): Mark cvtpi2ps and cvtpi2pd
+ with GNU_PROPERTY_X86_FEATURE_2_MMX.
+ * testsuite/gas/i386/i386.exp: Run property-3 and
+ x86-64-property-3.
+ * testsuite/gas/i386/property-3.d: New file.
+ * testsuite/gas/i386/property-3.s: Likewise.
+ * testsuite/gas/i386/x86-64-property-3.d: Likewise.
+
+2020-02-17 H.J. Lu <hongjiu.lu@intel.com>
+
+ * config/tc-i386.c (cpu_arch): Add .popcnt.
+ * doc/c-i386.texi: Remove abm and .abm. Add popcnt and .popcnt.
+ Add a tab before @samp{.sse4a}.
+
+2020-02-17 Jan Beulich <jbeulich@suse.com>
+
+ * config/tc-i386.c (process_suffix): Don't try to guess a suffix
+ for AddrPrefixOpReg templates. Combine the two pieces of
+ addrprefixopreg handling. Reject 16-bit address reg in 64-bit
+ mode.
+
+2020-02-17 Jan Beulich <jbeulich@suse.com>
+
+ PR gas/14439
+ * config/tc-i386.c (md_assemble): Also suppress operand
+ swapping for MONITOR{,X} and MWAIT{,X}.
+ * testsuite/gas/i386/sse3.s, testsuite/gas/i386/x86-64-sse3.s:
+ Add Intel syntax monitor/mwait tests.
+ * testsuite/gas/i386/sse3.d, testsuite/gas/i386/x86-64-sse3.d:
+ Adjust expectations.
+ *testsuite/gas/i386/sse3-intel.d,
+ testsuite/gas/i386/x86-64-sse3-intel.d: New.
+ * testsuite/gas/i386/i386.exp: Run new tests.
-2019-06-25 Alan Modra <amodra@gmail.com>
+2020-02-17 Jan Beulich <jbeulich@suse.com>
- * config/tc-ppc.c (ppc_handle_align): Add parentheses.
+ PR gas/6518
+ * config/tc-i386.c (process_suffix): Re-work Intel-syntax
+ [XYZ]MMWord memory operand ambiguity recognition logic (largely
+ re-indentation).
+ * testsuite/gas/i386/avx512dq-inval.s: Add vcvtqq2ps/vcvtuqq2ps
+ cases.
+ * testsuite/gas/i386/inval-avx512f.s: Also test vcvtneps2bf16.
+ * testsuite/gas/i386/avx512dq-inval.l,
+ testsuite/gas/i386/inval-avx.l,
+ testsuite/gas/i386/inval-avx512f.l: Adjust expectations.
+ * testsuite/gas/i386/avx512vl-ambig.s,
+ testsuite/gas/i386/avx512vl-ambig.l: New.
+ * testsuite/gas/i386/i386.exp: Run new test.
-2019-06-25 Alan Modra <amodra@gmail.com>
+2020-02-16 H.J. Lu <hongjiu.lu@intel.com>
+
+ * config/tc-i386.c (cpu_arch): Add .sse4a and nosse4a. Restore
+ nosse4.
+ * doc/c-i386.texi: Document sse4a and nosse4a.
+
+2020-02-14 H.J. Lu <hongjiu.lu@intel.com>
+
+ * doc/c-i386.texi: Remove the old movsx and movzx documentation
+ for AT&T syntax.
+
+2020-02-14 Jan Beulich <jbeulich@suse.com>
+
+ PR gas/25438
+ * config/tc-i386.c (md_assemble): Move movsx/movzx special
+ casing ...
+ (process_suffix): ... here. Consider just the first operand
+ initially.
+ (check_long_reg): Drop opcode 0x63 special case again.
+ * testsuite/gas/i386/i386.s, testsuite/gas/i386/iamcu-1.s,
+ testsuite/gas/i386/ilp32/x86-64.s, testsuite/gas/i386/x86_64.s:
+ Move ambiguous operand size tests ...
+ * testsuite/gas/i386/noreg16.s, testsuite/gas/i386/noreg32.s,
+ testsuite/gas/i386/noreg64.s: ... here.
+ * testsuite/gas/i386/i386.d, testsuite/gas/i386/i386-intel.d
+ testsuite/gas/i386/iamcu-1.d, testsuite/gas/i386/ilp32/x86-64.d,
+ testsuite/gas/i386/k1om.d, testsuite/gas/i386/l1om.d,
+ testsuite/gas/i386/movx16.l, testsuite/gas/i386/movx32.l,
+ testsuite/gas/i386/movx64.l, testsuite/gas/i386/noreg16.d,
+ testsuite/gas/i386/noreg32.d, testsuite/gas/i386/noreg64.d,
+ testsuite/gas/i386/x86-64-movsxd.d,
+ testsuite/gas/i386/x86-64-movsxd-intel.d,
+ testsuite/gas/i386/x86_64.d, testsuite/gas/i386/x86_64-intel.d:
+ Adjust expectations.
+ * testsuite/gas/i386/movx16.s, testsuite/gas/i386/movx16.l,
+ testsuite/gas/i386/movx32.s, testsuite/gas/i386/movx32.l,
+ testsuite/gas/i386/movx64.s, testsuite/gas/i386/movx64.l: New.
+ * testsuite/gas/i386/i386.exp: Run new tests.
- * config/tc-ppc.h (ppc_nop_select): Declare.
- (NOP_OPCODE): Define.
- * config/tc-ppc.c (ppc_elf_end, ppc_xcoff_end): Zero ppc_cpu.
- (ppc_nop_encoding_for_rs_align_code): New enum.
- (ppc_nop_select): New function.
- (ppc_handle_align): Don't use ppc_cpu here. Get nop type from frag.
- * testsuite/gas/ppc/groupnop.d,
- * testsuite/gas/ppc/groupnop.s: New test.
- * testsuite/gas/ppc/ppc.exp: Run it.
+2020-02-14 Jan Beulich <jbeulich@suse.com>
-2019-06-19 H.J. Lu <hongjiu.lu@intel.com>
+ * config/tc-i386.c (process_operands): Also skip segment
+ override prefix emission if it matches an already present one.
+ * testsuite/gas/i386/prefix32.s: Add double segment override
+ cases.
+ * testsuite/gas/i386/prefix32.l: Adjust expectations.
- PR binutils/24700
- * testsuite/gas/i386/disassem.s: Add test for vbroadcasti32x8
- with invalid vector length.
- * testsuite/gas/i386/x86-64-disassem.s: Likewise.
- * testsuite/gas/i386/disassem.d: Updated.
- * testsuite/gas/i386/x86-64-disassem.d: Likewise.
+2020-02-14 Jan Beulich <jbeulich@suse.com>
-2019-06-17 H.J. Lu <hongjiu.lu@intel.com>
+ * config/tc-i386.c (process_operands): Drop ineffectual segment
+ overrides when optimizing.
+ * testsuite/gas/i386/lea-optimize.d: New.
+ * testsuite/gas/i386/i386.exp: Run new test.
- PR binutils/24691
- * testsuite/gas/i386/disassem.s: Add test for vshuff32x4 with
- invalid vector length.
- * testsuite/gas/i386/x86-64-disassem.s: Likewise.
- * testsuite/gas/i386/disassem.d: Updated.
- * testsuite/gas/i386/x86-64-disassem.d: Likewise.
+2020-02-14 Jan Beulich <jbeulich@suse.com>
-2019-06-14 Alan Modra <amodra@gmail.com>
+ * config/tc-i386.c (process_operands): Also check insn prefix
+ for ineffectual segment override warning. Don't cover possible
+ VEX/EVEX encoded insns there.
+ * testsuite/gas/i386/lea.s, testsuite/gas/i386/lea.d,
+ testsuite/gas/i386/lea.e: New.
+ * testsuite/gas/i386/i386.exp: Run new test.
- * Makefile.in: Regenerate.
- * configure: Regenerate.
- * doc/Makefile.in: Regenerate.
+2020-02-14 H.J. Lu <hongjiu.lu@intel.com>
-2019-06-12 Peter Bergner <bergner@linux.ibm.com>
+ PR gas/25438
+ * doc/c-i386.texi: Document movsx, movsxd and movzx for AT&T
+ syntax.
- * testsuite/gas/ppc/power9.d: Delete ldmx tests.
- * testsuite/gas/ppc/power9.s: Likewise.
+2020-02-13 Fangrui Song <maskray@google.com>
+ H.J. Lu <hongjiu.lu@intel.com>
-2019-06-06 Lili Cui <lili.cui@intel.com>
+ PR gas/25551
+ * config/tc-i386.c (tc_i386_fix_adjustable): Don't check
+ BFD_RELOC_386_PLT32 nor BFD_RELOC_X86_64_PLT32.
+ * testsuite/gas/i386/i386.exp: Run relax-5 and x86-64-relax-4.
+ * testsuite/gas/i386/relax-5.d: New file.
+ * testsuite/gas/i386/relax-5.s: Likewise.
+ * testsuite/gas/i386/x86-64-relax-4.d: Likewise.
+ * testsuite/gas/i386/x86-64-relax-4.s: Likewise.
- * config/tc-i386.c (cpu_arch): Add .enqcmd.
- (cpu_noarch): Add noenqcmd.
- * doc/c-i386.texi: Document noenqcmd.
+2020-02-13 Jan Beulich <jbeulich@suse.com>
-2019-06-05 H.J. Lu <hongjiu.lu@intel.com>
+ * config/tc-i386.c (cpu_noarch): Use CPU_ANY_SSE4_FLAGS in
+ "nosse4" entry.
- PR binutils/24633
- * testsuite/gas/i386/disassem.s: Add tests for invalid vector
- lengths for EVEX vextractfXX and vinsertfXX.
- * testsuite/gas/i386/x86-64-disassem.s: Likewise.
- * testsuite/gas/i386/disassem.d: Updated.
- * testsuite/gas/i386/x86-64-disassem.d: Likewise.
+2020-02-12 Jan Beulich <jbeulich@suse.com>
-2019-06-04 H.J. Lu <hongjiu.lu@intel.com>
+ * config/tc-i386.c (avx512): New (at file scope), moved from
+ (check_VecOperands): ... here.
+ (process_suffix): Add [XYZ]MMword operand size handling.
+ * testsuite/gas/i386/avx512dq-inval.s: Add VFPCLASS tests.
+ * testsuite/gas/i386/noavx512-2.s: Add Intel syntax VFPCLASS
+ tests.
+ * testsuite/gas/i386/avx512dq-inval.l,
+ testsuite/gas/i386/noavx512-2.l: Adjust expectations.
+
+2020-02-12 Jan Beulich <jbeulich@suse.com>
+
+ PR gas/24546
+ * config/tc-i386.c (match_template): Apply AMD64 check to 64-bit
+ code only.
+ * config/tc-i386-intel.c (i386_intel_operand): Also handle
+ CALL/JMP in O_tbyte_ptr case.
+ * doc/c-i386.texi: Mention far call and full pointer load ISA
+ differences.
+ * testsuite/gas/i386/x86-64-branch-3.s,
+ testsuite/gas/i386/x86-64-intel64.s: Add 64-bit far call cases.
+ * testsuite/gas/i386/x86-64-branch-3.d,
+ testsuite/gas/i386/x86-64-intel64.d: Adjust expectations.
+ * testsuite/gas/i386/x86-64-branch-5.l,
+ testsuite/gas/i386/x86-64-branch-5.s: New.
+ * testsuite/gas/i386/i386.exp: Run new test.
- PR binutils/24626
- * testsuite/gas/i386/disassem.s: Add tests for reserved VEX.vvvv
- and EVEX.vvvv.
- * testsuite/gas/i386/x86-64-disassem.s: Likewise.
- * testsuite/gas/i386/disassem.d: Updated.
- * testsuite/gas/i386/x86-64-disassem.d: Likewise.
+2020-02-12 Jan Beulich <jbeulich@suse.com>
-2019-06-04 Igor Tsimbalist <igor.v.tsimbalist@intel.com>
- Lili Cui <lili.cui@intel.com>
+ PR gas/25438
+ * config/tc-i386.c (REGISTER_WARNINGS): Delete.
+ (check_byte_reg): Skip only source operand of CRC32. Drop Non-
+ 64-bit-only warning.
+ (check_word_reg): Consistently error on mismatching register
+ size and suffix.
+ * testsuite/gas/i386/general.s: Replace dword GPR with word one
+ for movw. Replace suffix / GPR for orb.
+ * testsuite/gas/i386/inval.s: Add tests for movw with dword and
+ byte GPRs as well as ones for inb/outb with a word accumulator.
+ * testsuite/gas/i386/general.l, testsuite/gas/i386/intelbad.l,
+ testsuite/gas/i386/inval.l: Adjust expectations.
- * config/tc-i386.c (cpu_arch): Add .avx512_vp2intersect.
- (cpu_noarch): Likewise.
- * doc/c-i386.texi: Document avx512_vp2intersect.
- * testsuite/gas/i386/i386.exp: Run vp2intersect tests.
- * testsuite/gas/i386/vp2intersect-intel.d: New test.
- * testsuite/gas/i386/vp2intersect.d: Likewise.
- * testsuite/gas/i386/vp2intersect.s: Likewise.
- * testsuite/gas/i386/vp2intersect-inval-bcast.l: Likewise.
- * testsuite/gas/i386/vp2intersect-inval-bcast.s: Likewise.
- * testsuite/gas/i386/x86-64-vp2intersect-intel.d: Likewise.
- * testsuite/gas/i386/x86-64-vp2intersect.d: Likewise.
- * testsuite/gas/i386/x86-64-vp2intersect.s: Likewise.
- * testsuite/gas/i386/x86-64-vp2intersect-inval-bcast.l: Likewise.
- * testsuite/gas/i386/x86-64-vp2intersect-inval-bcast.s: Likewise.
-
-2019-06-04 Xuepeng Guo <xuepeng.guo@intel.com>
- Lili Cui <lili.cui@intel.com>
-
- * doc/c-i386.texi: Document enqcmd.
- * testsuite/gas/i386/enqcmd-intel.d: New file.
- * testsuite/gas/i386/enqcmd-inval.l: Likewise.
- * testsuite/gas/i386/enqcmd-inval.s: Likewise.
- * testsuite/gas/i386/enqcmd.d: Likewise.
- * testsuite/gas/i386/enqcmd.s: Likewise.
- * testsuite/gas/i386/x86-64-enqcmd-intel.d: Likewise.
- * testsuite/gas/i386/x86-64-enqcmd-inval.l: Likewise.
- * testsuite/gas/i386/x86-64-enqcmd-inval.s: Likewise.
- * testsuite/gas/i386/x86-64-enqcmd.d: Likewise.
- * testsuite/gas/i386/x86-64-enqcmd.s: Likewise.
- * testsuite/gas/i386/i386.exp: Run enqcmd-intel, enqcmd-inval,
- enqcmd, x86-64-enqcmd-intel, x86-64-enqcmd-inval,
- and x86-64-enqcmd.
-
-2019-05-30 Jim Wilson <jimw@sifive.com>
-
- * config/tc-riscv.c (riscv_ip) <'u'>: Move O_constant check inside if
- statement. Delete O_symbol and O_constant check after if statement.
- * testsuite/gas/riscv/auipc-parsing.s: Test lui with missing %hi.
- * testsuite/gas/riscv/auipc-parsing.l: Update.
-
-2019-05-28 H.J. Lu <hongjiu.lu@intel.com>
-
- PR gas/24625
- * testsuite/gas/i386/inval-avx512f.s: Add tests for AVX512_BF16
- instructions with invalid broadcast.
- * testsuite/gas/i386/x86-64-inval-avx512f.s: Likewise.
- * testsuite/gas/i386/inval-avx512f.l: Updated.
- * testsuite/gas/i386/x86-64-inval-avx512f.l: Likewise.
-
-2019-05-27 Alan Modra <amodra@gmail.com>
-
- * config/tc-ppc.c (is_ppc64_target): New function.
- (md_show_usage): Split up usage message. Don't show -a64 when
- unsupported.
- testsuite/gas/ppc/ppc.exp (supports_ppc64): New.
- (prefix-reloc): Only run for ppc64.
-
-2019-05-24 Szabolcs Nagy <szabolcs.nagy@arm.com>
-
- * config/tc-aarch64.c (aarch64_elf_copy_symbol_attributes): Define.
- * config/tc-aarch64.h (aarch64_elf_copy_symbol_attributes): Declare.
- (OBJ_COPY_SYMBOL_ATTRIBUTES): Define.
- * testsuite/gas/aarch64/symbol-variant_pcs-3.d: New test.
- * testsuite/gas/aarch64/symbol-variant_pcs-3.s: New test.
-
-2019-05-24 Szabolcs Nagy <szabolcs.nagy@arm.com>
-
- * config/tc-aarch64.c (s_variant_pcs): New function.
- * doc/c-aarch64.texi: Document .variant_pcs.
- * testsuite/gas/aarch64/symbol-variant_pcs-1.d: New test.
- * testsuite/gas/aarch64/symbol-variant_pcs-1.s: New test.
- * testsuite/gas/aarch64/symbol-variant_pcs-2.d: New test.
- * testsuite/gas/aarch64/symbol-variant_pcs-2.s: New test.
-
-2019-05-24 Alan Modra <amodra@gmail.com>
-
- * po/POTFILES.in: Regenerate.
-
-2019-05-24 Alan Modra <amodra@gmail.com>
-
- * config/tc-ppc.c (ppc_elf_suffix): Support @pcrel, @got@pcrel,
- @plt@pcrel, @higher34, @highera34, @highest34, and @highesta34.
- (fixup_size): Handle new powerxx relocs.
- (md_assemble): Warn for @pcrel on non-prefix insns.
- Accept @l, @h and @ha on prefix insns, and infer reloc without
- any @ suffix. Translate powerxx relocs to suit DQ and DS field
- instructions. Include operand tests as well as opcode test to
- translate BFD_RELOC_HI16_S to BFD_RELOC_PPC_16DX_HA.
- (ppc_fix_adjustable): Return false for pcrel GOT and PLT relocs.
- (md_apply_fix): Handle new powerxx relocs.
- * config/tc-ppc.h (TC_FORCE_RELOCATION_SUB_LOCAL): Accept
- BFD_RELOC_PPC64_ADDR16_HIGHER34, BFD_RELOC_PPC64_ADDR16_HIGHERA34,
- BFD_RELOC_PPC64_ADDR16_HIGHEST34, BFD_RELOC_PPC64_ADDR16_HIGHESTA34,
- BFD_RELOC_PPC64_D34, and BFD_RELOC_PPC64_D28.
- * testsuite/gas/ppc/prefix-reloc.d,
- * testsuite/gas/ppc/prefix-reloc.s: New test.
- * testsuite/gas/ppc/ppc.exp: Run it.
+2020-02-12 Jan Beulich <jbeulich@suse.com>
-2019-05-24 Peter Bergner <bergner@linux.ibm.com>
- Alan Modra <amodra@gmail.com>
+ * config/tc-i386.c (operand_type_register_match): Also fall
+ through initial two if()-s when the template allows for a GPR
+ operand. Adjust comment.
- * config/tc-ppc.c (ppc_insert_operand): Only sign extend fields that
- are 32-bits or smaller.
- * messages.c (as_internal_value_out_of_range): Do not truncate
- variables and use BFD_VMA_FMT to print them.
- * testsuite/gas/ppc/prefix-pcrel.s,
- * testsuite/gas/ppc/prefix-pcrel.d: New test.
- * testsuite/gas/ppc/ppc.exp: Run it.
+2020-02-11 Jan Beulich <jbeulich@suse.com>
-2019-05-24 Peter Bergner <bergner@linux.ibm.com>
- Alan Modra <amodra@gmail.com>
-
- * config/tc-ppc.c (ppc_setup_opcodes): Handle prefix_opcodes.
- (struct insn_label_list): New.
- (insn_labels, free_insn_labels): New variables.
- (ppc_record_label, ppc_clear_labels, ppc_start_line_hook): New funcs.
- (ppc_frob_label, ppc_new_dot_label): Move functions earlier in file
- and call ppc_record_label.
- (md_assemble): Handle 64-bit prefix instructions. Align labels
- that are on the same line as a prefix instruction.
- * config/tc-ppc.h (tc_frob_label, ppc_frob_label): Move to
- later in the file.
- (md_start_line_hook): Define.
- (ppc_start_line_hook): Declare.
- * testsuite/gas/ppc/prefix-align.d,
- * testsuite/gas/ppc/prefix-align.s: New test.
- * testsuite/gas/ppc/ppc.exp: Run new test.
-
-2019-05-23 Jose E. Marchesi <jose.marchesi@oracle.com>
-
- * configure.ac: Handle bpf-*-* targets.
- * configure.tgt (generic_target): Likewise.
- * configure: Regenerate.
- * Makefile.am (TARGET_CPU_CFILES): Add tc-bpf.c.
- (TARGET_CPU_HFILES): Add tc-bpf.h.
- * Makefile.in: Regenerated.
- * config/tc-bpf.c: New file.
- * config/tc-bpf.h: Likewise.
- * doc/Makefile.am (CPU_DOCS): Add c-bpf.texi.
- * doc/Makefile.in: Regenerated.
- * doc/all.texi: set BPF.
- * doc/as.texi: Add eBPF contents.
- * doc/c-bpf.texi: New file.
- * testsuite/gas/bpf/alu.d: New file.
- * testsuite/gas/bpf/mem-be.d: Likewise.
- * testsuite/gas/bpf/mem.s: Likewise.
- * testsuite/gas/bpf/mem.d: Likewise.
- * testsuite/gas/bpf/lddw-be.d: Likewise.
- * testsuite/gas/bpf/lddw.s: Likewise.
- * testsuite/gas/bpf/lddw.d: Likewise.
- * testsuite/gas/bpf/jump-be.d: Likewise.
- * testsuite/gas/bpf/jump.s: Likewise.
- * testsuite/gas/bpf/jump.d: Likewise.
- * testsuite/gas/bpf/exit-be.d: Likewise.
- * testsuite/gas/bpf/exit.s: Likewise.
- * testsuite/gas/bpf/exit.d: Likewise.
- * testsuite/gas/bpf/call-be.d: Likewise.
- * testsuite/gas/bpf/call.s: Likewise.
- * testsuite/gas/bpf/call.d: Likewise.
- * testsuite/gas/bpf/bpf.exp: Likewise.
- * testsuite/gas/bpf/atomic-be.d: Likewise.
- * testsuite/gas/bpf/atomic.s: Likewise.
- * testsuite/gas/bpf/atomic.d: Likewise.
- * testsuite/gas/bpf/alu-be.d: Likewise.
- * testsuite/gas/bpf/alu32-be.d: Likewise.
- * testsuite/gas/bpf/alu32.s: Likewise.
- * testsuite/gas/bpf/alu32.d: Likewise.
- * testsuite/gas/bpf/alu.s: Likewise.
- * testsuite/gas/all/gas.exp: Introduce a nop_type for eBPF.
- * testsuite/gas/all/org-1.s: Support nop_type 6.
- * testsuite/gas/all/org-1.l: Updated to reflect changes in
- org-1.s.
-
-2019-05-22 John Darrington <john@darrington.wattle.id.au>
-
- * config/tc-s12z.c (s12z_strtol): New function. (md_show_usage): Update.
- (md_parse_option): new case OPTION_DOLLAR_HEX. (s12z_init_after_args):
- (<global>): Use s12z_strtol instead of strtol.
- * doc/c-s12z.texi (S12Z Options): Document new option -mdollar-hex.
- * testsuite/gas/s12z/dollar-hex.d: New file.
- * testsuite/gas/s12z/dollar-hex.s: New file.
- * testsuite/gas/s12z/s12z.exp: Add them.
-
-2019-05-21 Sudakshina Das <sudi.das@arm.com>
-
- * config/tc-arm.c (parse_operands): Update case OP_RVC to
- parse p0 and P0.
- (do_vmrs): Add checks for valid operands with respect to
- cpu and fpu options.
- (do_vmsr): Likewise.
- (reg_names): New reg_names for FPSCR_nzcvqc, VPR, FPCXT_NS
- and FPCXT_S.
- * testsuite/gas/arm/armv8_1-m-spec-reg.d: New.
- * testsuite/gas/arm/armv8_1-m-spec-reg.s: New.
- * testsuite/gas/arm/armv8_1-m-spec-reg-bad1.d: New.
- * testsuite/gas/arm/armv8_1-m-spec-reg-bad2.d: New.
- * testsuite/gas/arm/armv8_1-m-spec-reg-bad3.d: New.
- * testsuite/gas/arm/armv8_1-m-spec-reg-bad1.l: New.
- * testsuite/gas/arm/armv8_1-m-spec-reg-bad2.l: New.
- * testsuite/gas/arm/armv8_1-m-spec-reg-bad3.l: New.
- * testsuite/gas/arm/vfp1xD.d: Updated to allow new valid values.
- * testsuite/gas/arm/vfp1xD_t2.d: Likewise.
-
-2019-05-21 Sudakshina Das <sudi.das@arm.com>
-
- * config/tc-arm.c (TOGGLE_BIT): New.
- (T16_32_TAB): New entries for cinc, cinv, cneg, csinc,
- csinv, csneg, cset, csetm and csel.
- (operand_parse_code): New OP_RR_ZR.
- (parse_operand): Handle case for OP_RR_ZR.
- (do_t_cond): New.
- (insns): New instructions for cinc, cinv, cneg, csinc,
- csinv, csneg, cset, csetm, csel.
- * testsuite/gas/arm/armv8_1-m-cond-bad.d: New test.
- * testsuite/gas/arm/armv8_1-m-cond-bad.l: New test.
- * testsuite/gas/arm/armv8_1-m-cond-bad.s: New test.
- * testsuite/gas/arm/armv8_1-m-cond.d: New test.
- * testsuite/gas/arm/armv8_1-m-cond.s: New test.
-
-2019-05-21 Sudakshina Das <sudi.das@arm.com>
-
- * config/tc-arm.c (operand_parse_code): New entries for
- OP_RRnpcsp_I32 (register or integer operands).
- (do_mve_scalar_shift): New.
- (insns): New instructions for asrl, lsll, lsrl, sqrshrl, sqrshr, sqshl
- sqshll, srshr, srshrl, uqrshll, uqrshl, uqshll, uqshl, urshrl and urshr.
- * testsuite/gas/arm/mve-shift.d: New.
- * testsuite/gas/arm/mve-shift.s: New.
- * testsuite/gas/arm/mve-shift-bad.d: New.
- * testsuite/gas/arm/mve-shift-bad.s: New.
- * testsuite/gas/arm/mve-shift-bad.l: New.
-
-2019-05-21 Faraz Shahbazker <fshahbazker@wavecomp.com>
-
- * testsuite/gas/mips/r6-branch-constraints.s: Rename to ...
- * testsuite/gas/mips/r6-reg-constraints.s: this and add test
- case for DAUI.
- * testsuite/gas/mips/r6-branch-constraints.l: Rename to ...
- * testsuite/gas/mips/r6-reg-constraints.l: this and add test
- for DAUI.
- * testsuite/gas/mips/mips.exp: Rename test from
- r6-branch-constraints to r6-reg-constraints.
-
-2019-05-21 Andre Vieira <andre.simoesdiasvieira@arm.com>
-
- PR 24559
- * config/tc-arm.c (move_or_literal_pool): Set size_req to 0 for MOVW
- replacement.
- * testsuite/gas/arm/load-pseudo.s: New test input.
- * testsuite/gas/arm/m0-load-pseudo.d: New test.
- * testsuite/gas/arm/m23-load-pseudo.d: New test.
- * testsuite/gas/arm/m33-load-pseudo.d: New test.
-
-2019-05-21 Andre Vieira <andre.simoesdiasvieira@arm.com>
-
- * testsuite/gas/arm/armv8_1-m-bf.d: Allow different branch target naming
- conventions.
- * testsuite/gas/arm/armv8_1-m-bfl.d: Likewise.
- * testsuite/gas/arm/armv8_1-m-bfcsel.d: Likewise.
- * testsuite/gas/arm/armv8_1-m-loloop.d: Likewise.
- * testsuite/gas/arm/armv8_1-m-bf-rel.d: Skip for vxworks.
- * testsuite/gas/arm/armv8_1-m-bf-rela.d: New test.
- * testsuite/gas/arm/armv8_1-m-bfl-rel.d: Skip for vxworks.
- * testsuite/gas/arm/armv8_1-m-bfl-rela.d: New test.
-
-2019-05-21 John Darrington <john@darrington.wattle.id.au>
-
- * expr.c (literal_prefix_dollar_hex): New variable.
- (operand)[case '$']: Use the new variable instead of the old macro.
- Also, move this instance of "case '$'" next to the other one, and
- enable it only in the complementary proprocessor case.
- * expr.h (literal_prefix_dollar_hex): Declare it.
- * config/tc-epiphany.c (md_begin): Assign literal_prefix_dollar_hex.
- * config/tc-ip2k.c: ditto
- * config/tc-mt.c: ditto
- * config/tc-epiphany.h (LITERAL_PREFIXDOLLAR_HEX): Remove macro definition.
- * config/tc-ip2k.h: ditto
- * config/tc-mt.h: ditto
-
-2019-05-20 Faraz Shahbazker <fshahbazker@wavecomp.com>
-
- PR 14798
- * config/tc-mips.c (s_mips_globl): Only treat symbols that are
- not explicitly labelled as BSF_OBJECTs for IRIX targets.
- * testsuite/gas/mips/pr14798.s: New test source.
- * testsuite/gas/mips/pr14798-irix.d: New test.
- * testsuite/gas/mips/pr14798.d: Likewise.
- * testsuite/gas/mips/mips.exp: Run the new tests.
-
-2019-05-17 John Darrington <john@darrington.wattle.id.au>
-
- * doc/c-arm.texi (ARM Options): Remove "(r)" and "(tm)"
- * doc/c-bfin.texi (Blackfin Syntax): Remove "(r)"
-
-2019-05-16 Andre Vieira <andre.simoesdiasvieira@arm.com>
-
- * config/tc-arm.c (check_simd_pred_availability): Refactor.
- (do_neon_dyadic_i_su): Refactor use of check_simd_pred_availability.
- (do_neon_dyadic_i64_su): Likewise.
- (do_neon_shl): Likewise.
- (do_neon_qshl): Likewise.
- (do_neon_rshl): Likewise.
- (do_neon_logic): Likewise.
- (do_neon_dyadic_if_su): Likewise.
- (do_neon_addsub_if_i): Likewise.
- (do_neon_mac_maybe_scalar): Likewise.
- (do_neon_fmac): Likewise.
- (do_neon_mul): Likewise.
- (do_neon_qdmulh): Likewise.
- (do_neon_qrdmlah): Likewise.
- (do_neon_abs_neg): Likewise.
- (do_neon_sli): Likewise.
- (do_neon_sri): Likewise.
- (do_neon_qshlu_imm): Likewise.
- (do_neon_cvt_1): Likewise.
- (do_neon_cvttb_1): Likewise.
- (do_neon_mvn): Likewise.
- (do_neon_rev): Likewise.
- (do_neon_dup): Likewise.
- (do_neon_mov): Likewise.
- (do_neon_rshift_round_imm): Likewise.
- (do_neon_sat_abs_neg): Likewise.
- (do_neon_cls): Likewise.
- (do_neon_clz): Likewise.
- (do_vmaxnm): Likewise.
- (do_vrint_1): Likewise.
- (do_vcmla): Likewise.
- (do_vcadd): Likewise.
-
-2019-05-16 Andre Vieira <andre.simoesdiasvieira@arm.com>
-
- * NEWS: Mention Armv8.1-M Mainline and MVE.
-
-2019-05-16 Andre Vieira <andre.simoesdiasvieira@arm.com>
-
- * testsuite/gas/arm/mve-tailpredloop.d: New test.
- * testsuite/gas/arm/mve-tailpredloop.s: New test.
- * testsuite/gas/arm/mve-vabav.d: New test.
- * testsuite/gas/arm/mve-vabav.s: New test.
- * testsuite/gas/arm/mve-vabd.d: New test.
- * testsuite/gas/arm/mve-vabd.s: New test.
- * testsuite/gas/arm/mve-vabsneg.d: New test.
- * testsuite/gas/arm/mve-vabsneg.s: New test.
- * testsuite/gas/arm/mve-vadc.d: New test.
- * testsuite/gas/arm/mve-vadc.s: New test.
- * testsuite/gas/arm/mve-vaddlv.d: New test.
- * testsuite/gas/arm/mve-vaddlv.s: New test.
- * testsuite/gas/arm/mve-vaddsub.d: New test.
- * testsuite/gas/arm/mve-vaddsub.s: New test.
- * testsuite/gas/arm/mve-vaddv.d: New test.
- * testsuite/gas/arm/mve-vaddv.s: New test.
- * testsuite/gas/arm/mve-vand.d: New test.
- * testsuite/gas/arm/mve-vand.s: New test.
- * testsuite/gas/arm/mve-vbic.d: New test.
- * testsuite/gas/arm/mve-vbic.s: New test.
- * testsuite/gas/arm/mve-vbrsr.d: New test.
- * testsuite/gas/arm/mve-vbrsr.s: New test.
- * testsuite/gas/arm/mve-vcadd.d: New test.
- * testsuite/gas/arm/mve-vcadd.s: New test.
- * testsuite/gas/arm/mve-vcls.d: New test.
- * testsuite/gas/arm/mve-vcls.s: New test.
- * testsuite/gas/arm/mve-vclz.d: New test.
- * testsuite/gas/arm/mve-vclz.s: New test.
- * testsuite/gas/arm/mve-vcmla.d: New test.
- * testsuite/gas/arm/mve-vcmla.s: New test.
- * testsuite/gas/arm/mve-vcmp.d: New test.
- * testsuite/gas/arm/mve-vcmp.s: New test.
- * testsuite/gas/arm/mve-vcmul.d: New test.
- * testsuite/gas/arm/mve-vcmul.s: New test.
- * testsuite/gas/arm/mve-vcvt-1.d: New test.
- * testsuite/gas/arm/mve-vcvt-1.s: New test.
- * testsuite/gas/arm/mve-vcvt-2.d: New test.
- * testsuite/gas/arm/mve-vcvt-2.s: New test.
- * testsuite/gas/arm/mve-vcvt-3.d: New test.
- * testsuite/gas/arm/mve-vcvt-3.s: New test.
- * testsuite/gas/arm/mve-vcvt-4.d: New test.
- * testsuite/gas/arm/mve-vcvt-4.s: New test.
- * testsuite/gas/arm/mve-vddup.d: New test.
- * testsuite/gas/arm/mve-vddup.s: New test.
- * testsuite/gas/arm/mve-vdup.d: New test.
- * testsuite/gas/arm/mve-vdup.s: New test.
- * testsuite/gas/arm/mve-veor.d: New test.
- * testsuite/gas/arm/mve-veor.s: New test.
- * testsuite/gas/arm/mve-vfma-vfms.d: New test.
- * testsuite/gas/arm/mve-vfma-vfms.s: New test.
- * testsuite/gas/arm/mve-vfmas.d: New test.
- * testsuite/gas/arm/mve-vfmas.s: New test.
- * testsuite/gas/arm/mve-vhadd-vhsub-vrhadd.d: New test.
- * testsuite/gas/arm/mve-vhadd-vhsub-vrhadd.s: New test.
- * testsuite/gas/arm/mve-vhcadd.d: New test.
- * testsuite/gas/arm/mve-vhcadd.s: New test.
- * testsuite/gas/arm/mve-vmax-vmin.d: New test.
- * testsuite/gas/arm/mve-vmax-vmin.s: New test.
- * testsuite/gas/arm/mve-vmaxa-vmina.d: New test.
- * testsuite/gas/arm/mve-vmaxa-vmina.s: New test.
- * testsuite/gas/arm/mve-vmaxnm-vminnm.d: New test.
- * testsuite/gas/arm/mve-vmaxnm-vminnm.s: New test.
- * testsuite/gas/arm/mve-vmaxnma-vminnma.s: New test.
- * testsuite/gas/arm/mve-vmaxnmv-vminnmv.d: New test.
- * testsuite/gas/arm/mve-vmaxnmv-vminnmv.s: New test.
- * testsuite/gas/arm/mve-vmaxv-vminv.d: New test.
- * testsuite/gas/arm/mve-vmaxv-vminv.s: New test.
- * testsuite/gas/arm/mve-vmla.d: New test.
- * testsuite/gas/arm/mve-vmla.s: New test.
- * testsuite/gas/arm/mve-vmladav.d: New test.
- * testsuite/gas/arm/mve-vmladav.s: New test.
- * testsuite/gas/arm/mve-vmlaldav.d: New test.
- * testsuite/gas/arm/mve-vmlaldav.s: New test.
- * testsuite/gas/arm/mve-vmlalv.d: New test.
- * testsuite/gas/arm/mve-vmlalv.s: New test.
- * testsuite/gas/arm/mve-vmlas.d: New test.
- * testsuite/gas/arm/mve-vmlas.s: New test.
- * testsuite/gas/arm/mve-vmlav.d: New test.
- * testsuite/gas/arm/mve-vmlav.s: New test.
- * testsuite/gas/arm/mve-vmlsdav.d: New test.
- * testsuite/gas/arm/mve-vmlsdav.s: New test.
- * testsuite/gas/arm/mve-vmlsldav.d: New test.
- * testsuite/gas/arm/mve-vmlsldav.s: New test.
- * testsuite/gas/arm/mve-vmov-1.d: New test.
- * testsuite/gas/arm/mve-vmov-1.s: New test.
- * testsuite/gas/arm/mve-vmov-2.d: New test.
- * testsuite/gas/arm/mve-vmov-2.s: New test.
- * testsuite/gas/arm/mve-vmul.d: New test.
- * testsuite/gas/arm/mve-vmul.s: New test.
- * testsuite/gas/arm/mve-vmulh.d: New test.
- * testsuite/gas/arm/mve-vmulh.s: New test.
- * testsuite/gas/arm/mve-vmullbt.d: New test.
- * testsuite/gas/arm/mve-vmullbt.s: New test.
- * testsuite/gas/arm/mve-vmvn.d: New test.
- * testsuite/gas/arm/mve-vmvn.s: New test.
- * testsuite/gas/arm/mve-vorn.d: New test.
- * testsuite/gas/arm/mve-vorn.s: New test.
- * testsuite/gas/arm/mve-vorr.d: New test.
- * testsuite/gas/arm/mve-vorr.s: New test.
- * testsuite/gas/arm/mve-vpnot.d: New test.
- * testsuite/gas/arm/mve-vpnot.s: New test.
- * testsuite/gas/arm/mve-vpsel.d: New test.
- * testsuite/gas/arm/mve-vpsel.s: New test.
- * testsuite/gas/arm/mve-vpt.d: New test.
- * testsuite/gas/arm/mve-vpt.s: New test.
- * testsuite/gas/arm/mve-vqabsneg.s: New test.
- * testsuite/gas/arm/mve-vqaddsub.d: New test.
- * testsuite/gas/arm/mve-vqaddsub.s: New test.
- * testsuite/gas/arm/mve-vqdmladh.d: New test.
- * testsuite/gas/arm/mve-vqdmladh.s: New test.
- * testsuite/gas/arm/mve-vqdmlah.d: New test.
- * testsuite/gas/arm/mve-vqdmlah.s: New test.
- * testsuite/gas/arm/mve-vqdmlash.d: New test.
- * testsuite/gas/arm/mve-vqdmlash.s: New test.
- * testsuite/gas/arm/mve-vqdmlsdh.d: New test.
- * testsuite/gas/arm/mve-vqdmlsdh.s: New test.
- * testsuite/gas/arm/mve-vqdmulh.d: New test.
- * testsuite/gas/arm/mve-vqdmulh.s: New test.
- * testsuite/gas/arm/mve-vqdmull.d: New test.
- * testsuite/gas/arm/mve-vqdmull.s: New test.
- * testsuite/gas/arm/mve-vqmovn.d: New test.
- * testsuite/gas/arm/mve-vqmovn.s: New test.
- * testsuite/gas/arm/mve-vqrshl.d: New test.
- * testsuite/gas/arm/mve-vqrshl.s: New test.
- * testsuite/gas/arm/mve-vqrshrn.d: New test.
- * testsuite/gas/arm/mve-vqrshrn.s: New test.
- * testsuite/gas/arm/mve-vqshl.d: New test.
- * testsuite/gas/arm/mve-vqshl.s: New test.
- * testsuite/gas/arm/mve-vrev.d: New test.
- * testsuite/gas/arm/mve-vrev.s: New test.
- * testsuite/gas/arm/mve-vrint.d: New test.
- * testsuite/gas/arm/mve-vrint.s: New test.
- * testsuite/gas/arm/mve-vrmlaldavh.d: New test.
- * testsuite/gas/arm/mve-vrmlaldavh.s: New test.
- * testsuite/gas/arm/mve-vrshl.d: New test.
- * testsuite/gas/arm/mve-vrshl.s: New test.
- * testsuite/gas/arm/mve-vsbc.d: New test.
- * testsuite/gas/arm/mve-vsbc.s: New test.
- * testsuite/gas/arm/mve-vshl.d: New test.
- * testsuite/gas/arm/mve-vshl.s: New test.
- * testsuite/gas/arm/mve-vshlc.d: New test.
- * testsuite/gas/arm/mve-vshlc.s: New test.
- * testsuite/gas/arm/mve-vshll.d: New test.
- * testsuite/gas/arm/mve-vshll.s: New test.
- * testsuite/gas/arm/mve-vshr.d: New test.
- * testsuite/gas/arm/mve-vshr.s: New test.
- * testsuite/gas/arm/mve-vshrn.d: New test.
- * testsuite/gas/arm/mve-vshrn.s: New test.
- * testsuite/gas/arm/mve-vsli.d: New test.
- * testsuite/gas/arm/mve-vsli.s: New test.
- * testsuite/gas/arm/mve-vsri.d: New test.
- * testsuite/gas/arm/mve-vsri.s: New test.
- * testsuite/gas/arm/mve-vstld.d: New test.
- * testsuite/gas/arm/mve-vstld.s: New test.
- * testsuite/gas/arm/mve-vstrldr-1.d: New test.
- * testsuite/gas/arm/mve-vstrldr-1.s: New test.
- * testsuite/gas/arm/mve-vstrldr-2.d: New test.
- * testsuite/gas/arm/mve-vstrldr-2.s: New test.
- * testsuite/gas/arm/mve-vstrldr-3.d: New test.
- * testsuite/gas/arm/mve-vstrldr-3.s: New test.
-
-2019-05-16 Andre Vieira <andre.simoesdiasvieira@arm.com>
-
- * config/tc-arm.c (T16_32_TAB): Add new instructions.
- (do_t_loloop): Changed to handle tail predication variants.
- (md_apply_fix): Likewise.
- (insns): Add entries for MVE mnemonics.
- * testsuite/gas/arm/mve-tailpredloop-bad.d: New test.
- * testsuite/gas/arm/mve-tailpredloop-bad.l: New test.
- * testsuite/gas/arm/mve-tailpredloop-bad.s: New test.
- * testsuite/gas/arm/mve-tailpredloop.d: New test.
-
-2019-05-16 Andre Vieira <andre.simoesdiasvieira@arm.com>
-
- * config/tc-arm.c (do_mve_vshll): New encoding function.
- (do_mve_vshlc): Likewise.
- (insns): Add entries for MVE mnemonics.
- * testsuite/gas/arm/mve-vshlc-bad.d: New test.
- * testsuite/gas/arm/mve-vshlc-bad.l: New test.
- * testsuite/gas/arm/mve-vshlc-bad.s: New test.
- * testsuite/gas/arm/mve-vshll-bad.d: New test.
- * testsuite/gas/arm/mve-vshll-bad.l: New test.
- * testsuite/gas/arm/mve-vshll-bad.s: New test.
-
-2019-05-16 Andre Vieira <andre.simoesdiasvieira@arm.com>
-
- * config/tc-arm.c (enum operand_parse_code): Add new operand.
- (parse_operands): Handle new operand.
- (do_neon_shl_imm): Accept MVE variants.
- (do_neon_shl): Likewise.
- (do_neon_qshl_imm): Likewise.
- (do_neon_qshl): Likewise.
- (do_neon_qshlu_imm): Likewise.
- (insns): Likewise.
- * testsuite/gas/arm/mve-vqshl-bad.d: New test.
- * testsuite/gas/arm/mve-vqshl-bad.l: New test.
- * testsuite/gas/arm/mve-vqshl-bad.s: New test.
- * testsuite/gas/arm/mve-vshl-bad.d: New test.
- * testsuite/gas/arm/mve-vshl-bad.l: New test.
- * testsuite/gas/arm/mve-vshl-bad.s: New test.
-
-2019-05-16 Andre Vieira <andre.simoesdiasvieira@arm.com>
-
- * config/tc-arm.c (do_neon_sli): Accept MVE variants.
- (do_neon_sri): Likewise.
- (do_neon_rev): Likewise.
- (do_neon_rshift_round_imm): Likewise.
- (insns): Likewise.
- * testsuite/gas/arm/mve-vrev-bad.d: New test.
- * testsuite/gas/arm/mve-vrev-bad.l: New test.
- * testsuite/gas/arm/mve-vrev-bad.s: New test.
- * testsuite/gas/arm/mve-vshr-bad.d: New test.
- * testsuite/gas/arm/mve-vshr-bad.l: New test.
- * testsuite/gas/arm/mve-vshr-bad.s: New test.
- * testsuite/gas/arm/mve-vsli-bad.d: New test.
- * testsuite/gas/arm/mve-vsli-bad.l: New test.
- * testsuite/gas/arm/mve-vsli-bad.s: New test.
- * testsuite/gas/arm/mve-vsri-bad.d: New test.
- * testsuite/gas/arm/mve-vsri-bad.l: New test.
- * testsuite/gas/arm/mve-vsri-bad.s: New test.
-
-2019-05-16 Andre Vieira <andre.simoesdiasvieira@arm.com>
-
- * config/tc-arm.c (do_vrint_1): Accept MVE variants.
- (insns): Change entries to accept MVE variants.
- * testsuite/gas/arm/mve-vrint-bad.d: New test.
- * testsuite/gas/arm/mve-vrint-bad.l: New test.
- * testsuite/gas/arm/mve-vrint-bad.s: New test.
-
-2019-05-16 Andre Vieira <andre.simoesdiasvieira@arm.com>
-
- * config/tc-arm.c (M_MNEM_vshrnt, M_MNEM_vshrnb, M_MNEM_vrshrnt,
- M_MNEM_vqshrnt, M_MNEM_vqshrnb, M_MNEM_vqshrunt, M_MNEM_vqshrunb,
- M_MNEM_vrshrnb, M_MNEM_vqrshrnt, M_MNEM_vqrshrnb, M_MNEM_vqrshrunt,
- M_MNEM_vqrshrunb): New instruction encodings.
- (do_mve_vshrn): New encoding function.
- (insns): Add entries for MVE mnemonics.
- * testsuite/gas/arm/mve-vqrshrn-bad.d: New test.
- * testsuite/gas/arm/mve-vqrshrn-bad.l: New test.
- * testsuite/gas/arm/mve-vqrshrn-bad.s: New test.
- * testsuite/gas/arm/mve-vshrn-bad.d: New test.
- * testsuite/gas/arm/mve-vshrn-bad.l: New test.
- * testsuite/gas/arm/mve-vshrn-bad.s: New test.
-
-2019-05-16 Andre Vieira <andre.simoesdiasvieira@arm.com>
-
- * config/tc-arm.c (M_MNEM_vqmovnt, M_MNEM_vqmovnb,
- M_MNEM_vqmovunt, M_MNEM_vqmovunb): New instruction encodings.
- (do_mve_vqmovn): New encoding function.
- (do_neon_rshl): Change to accepte MVE variants.
- (insns): Change entries and add new for MVE mnemonics.
- * testsuite/gas/arm/mve-vqmovn-bad.d: New test.
- * testsuite/gas/arm/mve-vqmovn-bad.l: New test.
- * testsuite/gas/arm/mve-vqmovn-bad.s: New test.
- * testsuite/gas/arm/mve-vqrshl-bad.d: New test.
- * testsuite/gas/arm/mve-vqrshl-bad.l: New test.
- * testsuite/gas/arm/mve-vqrshl-bad.s: New test.
- * testsuite/gas/arm/mve-vrshl-bad.d: New test.
- * testsuite/gas/arm/mve-vrshl-bad.l: New test.
- * testsuite/gas/arm/mve-vrshl-bad.s: New test.
-
-2019-05-16 Andre Vieira <andre.simoesdiasvieira@arm.com>
-
- * config/tc-arm.c (enum operand_parse_code): Add new operand.
- (parse_operands): Handle new operand.
- (do_mve_vqdmull): New encoding function.
- (insns): Add entry for MVE mnemonics.
- * testsuite/gas/arm/mve-vqdmull-bad.d: New test.
- * testsuite/gas/arm/mve-vqdmull-bad.l: New test.
- * testsuite/gas/arm/mve-vqdmull-bad.s: New test.
-
-2019-05-16 Andre Vieira <andre.simoesdiasvieira@arm.com>
-
- * config/tc-arm.c (enum operand_parse_code): Add new operand.
- (parse_operands): Handle new operand.
- (mve_encode_qqr): Handle new instructions.
- (do_neon_qdmulh): Add support for MVE variants.
- (do_neon_qrdmlah): Likewise.
- (do_mve_vqdmlah): New encoding function.
- (insns): Change entries and add new entries for MVE mnemonics.
- * testsuite/gas/arm/mve-vqdmulh-bad.d: New test.
- * testsuite/gas/arm/mve-vqdmulh-bad.l: New test.
- * testsuite/gas/arm/mve-vqdmulh-bad.s: New test.
-
-2019-05-16 Andre Vieira <andre.simoesdiasvieira@arm.com>
-
- * config/tc-arm.c (do_mve_vqdmladh): New encoding function.
- (insns): Add entries for MVE mnemonics.
- * testsuite/gas/arm/mve-vqdmladh-bad.d: New test.
- * testsuite/gas/arm/mve-vqdmladh-bad.l: New test.
- * testsuite/gas/arm/mve-vqdmladh-bad.s: New test.
- * testsuite/gas/arm/mve-vqdmlsdh-bad.d: New test.
- * testsuite/gas/arm/mve-vqdmlsdh-bad.l: New test.
- * testsuite/gas/arm/mve-vqdmlsdh-bad.s: New test.
-
-2019-05-16 Andre Vieira <andre.simoesdiasvieira@arm.com>
-
- * config/tc-arm.c (do_mve_vpsel): New encoding function.
- (do_mve_vpnot): Likewise.
- (insns): Add entries for MVE mnemonics.
- * testsuite/gas/arm/mve-vpnot-bad.d: New test.
- * testsuite/gas/arm/mve-vpnot-bad.l: New test.
- * testsuite/gas/arm/mve-vpnot-bad.s: New test.
- * testsuite/gas/arm/mve-vpsel-bad.d: New test.
- * testsuite/gas/arm/mve-vpsel-bad.l: New test.
- * testsuite/gas/arm/mve-vpsel-bad.s: New test.
-
-2019-05-16 Andre Vieira <andre.simoesdiasvieira@arm.com>
-
- * config/tc-arm.c (do_neon_mvn): Change to accept MVE variants.
- (do_neon_sat_abs_neg): Likewise.
- (insns): Likewise.
- * testsuite/gas/arm/mve-vmvn-bad.d: New test.
- * testsuite/gas/arm/mve-vmvn-bad.l: New test.
- * testsuite/gas/arm/mve-vmvn-bad.s: New test.
- * testsuite/gas/arm/mve-vqabsneg-bad.d: New test.
- * testsuite/gas/arm/mve-vqabsneg-bad.l: New test.
- * testsuite/gas/arm/mve-vqabsneg-bad.s: New test.
-
-2019-05-16 Andre Vieira <andre.simoesdiasvieira@arm.com>
-
- * config/tc-arm.c (do_mve_vmlas): New encoding function.
- (do_mve_vmulh): Likewise.
- (insns): Add entries for MVE mnemonics.
- * testsuite/gas/arm/mve-vmlas-bad.d: New test.
- * testsuite/gas/arm/mve-vmlas-bad.l: New test.
- * testsuite/gas/arm/mve-vmlas-bad.s: New test.
- * testsuite/gas/arm/mve-vmulh-bad.d: New test.
- * testsuite/gas/arm/mve-vmulh-bad.l: New test.
- * testsuite/gas/arm/mve-vmulh-bad.s: New test.
-
-2019-05-16 Andre Vieira <andre.simoesdiasvieira@arm.com>
-
- * config/tc-arm.c (enum operand_parse_code): New operand.
- (parse_operands): Handle new operand.
- (mve_encode_qqr): Handle new instructions.
- (do_neon_dyadic_i64_su): Accept MVE variants.
- (neon_dyadic_misc): Likewise.
- (do_neon_mac_maybe_scalar): Likewise.
- (do_neon_mul): Likewise.
- (insns): Change to accept MVE variants.
- * testsuite/gas/arm/mve-vmla-bad.d: New test.
- * testsuite/gas/arm/mve-vmla-bad.l: New test.
- * testsuite/gas/arm/mve-vmla-bad.s: New test.
- * testsuite/gas/arm/mve-vmul-bad-1.d: New test.
- * testsuite/gas/arm/mve-vmul-bad-1.l: New test.
- * testsuite/gas/arm/mve-vmul-bad-1.s: New test.
- * testsuite/gas/arm/mve-vmul-bad-2.d: New test.
- * testsuite/gas/arm/mve-vmul-bad-2.l: New test.
- * testsuite/gas/arm/mve-vmul-bad-2.s: New test.
- * testsuite/gas/arm/mve-vqaddsub-bad.d: New test.
- * testsuite/gas/arm/mve-vqaddsub-bad.l: New test.
- * testsuite/gas/arm/mve-vqaddsub-bad.s: New test.
-
-2019-05-16 Andre Vieira <andre.simoesdiasvieira@arm.com>
-
- * config/tc-arm.c (M_MNEM_vmlaldav, M_MNEM_vmlaldava,
- M_MNEM_vmlaldavx, M_MNEM_vmlaldavax, M_MNEM_vmlsldav,
- M_MNEM_vmlsldava, M_MNEM_vmlsldavx, M_MNEM_vmlsldavax,
- M_MNEM_vrmlaldavhx, M_MNEM_vrmlaldavhax, M_MNEM_vrmlsldavh,
- M_MNEM_vrmlsldavha, M_MNEM_vrmlsldavhx, M_MNEM_vrmlsldavhax): New
- instruction encodings.
- (NEON_SHAPE_DEF): New shape
- (mve_encode_rrqq): New encoding helper function.
- (do_mve_vmlaldav): New encoding function.
- (do_mve_vrmlaldavh): New encoding function.
- (insns): Add entries for MVE mnemonics.
- * testsuite/gas/arm/mve-vmlaldav-bad.d: New test.
- * testsuite/gas/arm/mve-vmlaldav-bad.l: New test.
- * testsuite/gas/arm/mve-vmlaldav-bad.s: New test.
- * testsuite/gas/arm/mve-vmlalv-bad.d: New test.
- * testsuite/gas/arm/mve-vmlalv-bad.l: New test.
- * testsuite/gas/arm/mve-vmlalv-bad.s: New test.
- * testsuite/gas/arm/mve-vmlsldav-bad.d: New test.
- * testsuite/gas/arm/mve-vmlsldav-bad.l: New test.
- * testsuite/gas/arm/mve-vmlsldav-bad.s: New test.
- * testsuite/gas/arm/mve-vrmlaldavh-bad.d: New test.
- * testsuite/gas/arm/mve-vrmlaldavh-bad.l: New test.
- * testsuite/gas/arm/mve-vrmlaldavh-bad.s: New test.
-
-2019-05-16 Andre Vieira <andre.simoesdiasvieira@arm.com>
-
- * config/tc-arm.c (M_MNEM_vmaxv, M_MNEM_vmaxav, M_MNEM_vminv,
- M_MNEM_vminav): New instruction encodings.
- (do_mve_vmaxv): New encoding function.
- (insns): Add entries for new MVE mnemonics.
- * testsuite/gas/arm/mve-vmaxv-vminv-bad.d: New test.
- * testsuite/gas/arm/mve-vmaxv-vminv-bad.l: New test.
- * testsuite/gas/arm/mve-vmaxv-vminv-bad.s: New test.
-
-2019-05-16 Andre Vieira <andre.simoesdiasvieira@arm.com>
-
- * config/tc-arm.c (do_mve_vmaxnmv): New encoding function.
- (insns): Add entries for new mnemonics.
- * testsuite/gas/arm/mve-vmaxnmv-vminnmv-bad.d: New test.
- * testsuite/gas/arm/mve-vmaxnmv-vminnmv-bad.l: New test.
- * testsuite/gas/arm/mve-vmaxnmv-vminnmv-bad.s: New test.
-
-2019-05-16 Andre Vieira <andre.simoesdiasvieira@arm.com>
-
- * config/tc-arm.c (do_mve_vmaxa_vmina): New encoding function.
- (do_mve_vmaxnma_vminnma): Likewise.
- (do_neon_dyadic_if_su): Change to support MVE variants.
- (do_vmaxnm): Likewise.
- (insns): Change to accept MVE variants and add new.
- * testsuite/gas/arm/mve-vmax-vmin-bad.d: New test.
- * testsuite/gas/arm/mve-vmax-vmin-bad.l: New test.
- * testsuite/gas/arm/mve-vmax-vmin-bad.s: New test.
- * testsuite/gas/arm/mve-vmaxa-vmina-bad.d: New test.
- * testsuite/gas/arm/mve-vmaxa-vmina-bad.l: New test.
- * testsuite/gas/arm/mve-vmaxa-vmina-bad.s: New test.
- * testsuite/gas/arm/mve-vmaxnm-vminnm-bad.d: New test.
- * testsuite/gas/arm/mve-vmaxnm-vminnm-bad.l: New test.
- * testsuite/gas/arm/mve-vmaxnm-vminnm-bad.s: New test.
- * testsuite/gas/arm/mve-vmaxnma-vminnma-bad.d: New test.
- * testsuite/gas/arm/mve-vmaxnma-vminnma-bad.l: New test.
- * testsuite/gas/arm/mve-vmaxnma-vminnma-bad.s: New test.
-
-2019-05-16 Andre Vieira <andre.simoesdiasvieira@arm.com>
-
- * config/tc-arm.c (enum operand_parse_code): New operand.
- (parse_operands): Handle new operand.
- (mve_encode_qqr): Change to support new instructions.
- (enum vfp_or_neon_is_neon_bits): Moved.
- (vfp_or_neon_is_neon): Moved.
- (check_simd_pred_availability): Moved.
- (do_neon_dyadic_i_su): Changed to support MVE variants.
- (neon_dyadic_misc): Changed mve_encode_qqr call.
- (do_mve_vbrsr): Likewise.
- (do_mve_vhcadd): New encoding function.
- (insns): Change existing to accept MVE variants and add new.
- * testsuite/gas/arm/mve-vhadd-vhsub-vrhadd-bad.d: New test.
- * testsuite/gas/arm/mve-vhadd-vhsub-vrhadd-bad.l: New test.
- * testsuite/gas/arm/mve-vhadd-vhsub-vrhadd-bad.s: New test.
- * testsuite/gas/arm/mve-vhcadd-bad.d: New test.
- * testsuite/gas/arm/mve-vhcadd-bad.l: New test.
- * testsuite/gas/arm/mve-vhcadd-bad.s: New test.
-
-2019-05-16 Andre Vieira <andre.simoesdiasvieira@arm.com>
-
- * config/tc-arm.c (do_neon_fmac): Change to support MVE variants.
- (insns): Change to accept MVE variants.
- * testsuite/gas/arm/mve-vfma-vfms-bad.d: New test.
- * testsuite/gas/arm/mve-vfma-vfms-bad.l: New test.
- * testsuite/gas/arm/mve-vfma-vfms-bad.s: New test.
-
-2019-05-16 Andre Vieira <andre.simoesdiasvieira@arm.com>
-
- * config/tc-arm.c (M_MNEM_vddup, M_MNEM_vdwdup, M_MNEM_vidup,
- M_MNEM_viwdup): New instruction encodings.
- (NEON_SHAPE_DEF): New shapes.
- (do_mve_viddup): New encoding function.
- (do_neon_dup): Change to support new MVE variants.
- (insns): Change existing to accept MVE variants and add new.
- * testsuite/gas/arm/mve-vddup-bad.d: New test.
- * testsuite/gas/arm/mve-vddup-bad.l: New test.
- * testsuite/gas/arm/mve-vddup-bad.s: New test.
- * testsuite/gas/arm/mve-vdup-bad.d: New test.
- * testsuite/gas/arm/mve-vdup-bad.l: New test.
- * testsuite/gas/arm/mve-vdup-bad.s: New test.
- * testsuite/gas/arm/mve-vidup-bad.d: New test.
- * testsuite/gas/arm/mve-vidup-bad.l: New test.
- * testsuite/gas/arm/mve-vidup-bad.s: New test.
-
-2019-05-16 Andre Vieira <andre.simoesdiasvieira@arm.com>
-
- * config/tc-arm.c (do_mve_vfmas): New encoding function.
- (do_neon_cls): Change to support MVE variants.
- (do_neon_clz): Change to support MVE variants.
- (insns): Change to support MVE variants and add new.
- * testsuite/gas/arm/mve-vcls-bad.d: New test.
- * testsuite/gas/arm/mve-vcls-bad.l: New test.
- * testsuite/gas/arm/mve-vcls-bad.s: New test.
- * testsuite/gas/arm/mve-vclz-bad.d: New test.
- * testsuite/gas/arm/mve-vclz-bad.l: New test.
- * testsuite/gas/arm/mve-vclz-bad.s: New test.
- * testsuite/gas/arm/mve-vfmas-bad.d: New test.
- * testsuite/gas/arm/mve-vfmas-bad.l: New test.
- * testsuite/gas/arm/mve-vfmas-bad.s: New test.
-
-2019-05-16 Andre Vieira <andre.simoesdiasvieira@arm.com>
-
- * config/tc-arm.c (enum operand_parse_code): New operands.
- (parse_operands): Handle new operands.
- (do_mve_vcmul): New encoding function.
- (do_vcmla): Change to support MVE variants.
- (do_vcadd): Change to support MVE variants.
- (insns): Change existing to support MVE variants and add new.
- * testsuite/gas/arm/mve-vcadd-bad-1.d: New test.
- * testsuite/gas/arm/mve-vcadd-bad-1.l: New test.
- * testsuite/gas/arm/mve-vcadd-bad-1.s: New test.
- * testsuite/gas/arm/mve-vcadd-bad-2.d: New test.
- * testsuite/gas/arm/mve-vcadd-bad-2.l: New test.
- * testsuite/gas/arm/mve-vcadd-bad-2.s: New test.
- * testsuite/gas/arm/mve-vcmla-bad-1.d: New test.
- * testsuite/gas/arm/mve-vcmla-bad-1.l: New test.
- * testsuite/gas/arm/mve-vcmla-bad-1.s: New test.
- * testsuite/gas/arm/mve-vcmla-bad-2.d: New test.
- * testsuite/gas/arm/mve-vcmla-bad-2.l: New test.
- * testsuite/gas/arm/mve-vcmla-bad-2.s: New test.
- * testsuite/gas/arm/mve-vcmul-bad-1.d: New test.
- * testsuite/gas/arm/mve-vcmul-bad-1.l: New test.
- * testsuite/gas/arm/mve-vcmul-bad-1.s: New test.
- * testsuite/gas/arm/mve-vcmul-bad-2.d: New test.
- * testsuite/gas/arm/mve-vcmul-bad-2.l: New test.
- * testsuite/gas/arm/mve-vcmul-bad-2.s: New test.
-
-2019-05-16 Andre Vieira <andre.simoesdiasvieira@arm.com>
-
- * config/tc-arm.c (enum operand_parse_code): New operands.
- (parse_operands): Handle new operands.
- (enum vfp_or_neon_is_neon_bits): Moved
- (vfp_or_neon_is_neon): Moved
- (check_simd_pred_availability): Moved.
- (do_neon_logic): Change to accept MVE variants.
- (insns): Changed to accept MVE variants.
- * testsuite/gas/arm/mve-vand-bad.d: New test.
- * testsuite/gas/arm/mve-vand-bad.l: New test.
- * testsuite/gas/arm/mve-vand-bad.s: New test.
- * testsuite/gas/arm/mve-vbic-bad.d: New test.
- * testsuite/gas/arm/mve-vbic-bad.l: New test.
- * testsuite/gas/arm/mve-vbic-bad.s: New test.
- * testsuite/gas/arm/mve-veor-bad.d: New test.
- * testsuite/gas/arm/mve-veor-bad.l: New test.
- * testsuite/gas/arm/mve-veor-bad.s: New test.
- * testsuite/gas/arm/mve-vorn-bad.d: New test.
- * testsuite/gas/arm/mve-vorn-bad.l: New test.
- * testsuite/gas/arm/mve-vorn-bad.s: New test.
- * testsuite/gas/arm/mve-vorr-bad.d: New test.
- * testsuite/gas/arm/mve-vorr-bad.l: New test.
- * testsuite/gas/arm/mve-vorr-bad.s: New test.
-
-2019-05-16 Andre Vieira <andre.simoesdiasvieira@arm.com>
-
- * config/tc-arm.c (M_MNEM_vaddlv, M_MNEM_vaddlva, M_MNEM_vaddv,
- M_MNEM_vaddva): New instruction encodings.
- (mve_encode_rq): New encoding helper function.
- (do_mve_vaddlv): New encoding function.
- (do_mve_vaddv): New encoding function.
- * testsuite/gas/arm/mve-vaddlv-bad.d: New test.
- * testsuite/gas/arm/mve-vaddlv-bad.l: New test.
- * testsuite/gas/arm/mve-vaddlv-bad.s: New test.
- * testsuite/gas/arm/mve-vaddv-bad.d: New test.
- * testsuite/gas/arm/mve-vaddv-bad.l: New test.
- * testsuite/gas/arm/mve-vaddv-bad.s: New test.
-
-2019-05-16 Andre Vieira <andre.simoesdiasvieira@arm.com>
-
- * config/tc-arm.c (M_MNEM_vadc, M_MNEM_vadci, M_MNEM_vbrsr):
- New instruction encodings.
- (do_mve_vadc): New encoding instruction.
- (do_mve_vbrsr): Likewise.
- (do_mve_vsbc): Likewise.
- * testsuite/gas/arm/mve-vadc-bad.d: New test.
- * testsuite/gas/arm/mve-vadc-bad.l: New test.
- * testsuite/gas/arm/mve-vadc-bad.s: New test.
- * testsuite/gas/arm/mve-vbrsr-bad.d: New test.
- * testsuite/gas/arm/mve-vbrsr-bad.l: New test.
- * testsuite/gas/arm/mve-vbrsr-bad.s: New test.
- * testsuite/gas/arm/mve-vsbc-bad.d: New test.
- * testsuite/gas/arm/mve-vsbc-bad.l: New test.
- * testsuite/gas/arm/mve-vsbc-bad.s: New test.
-
-2019-05-16 Andre Vieira <andre.simoesdiasvieira@arm.com>
-
- * config/tc-arm.c (MVE_BAD_QREG): New error message.
- (enum operand_parse_code): Define new operand.
- (parse_operands): Handle new operand.
- (do_mve_vpt): Change for VPT blocks.
- (NEON_SHAPE_DEF): New shape.
- (neon_logbits): Moved.
- (LOW4): Moved
- (HI1): Moved
- (mve_get_vcmp_vpt_cond): New function to translate vpt conditions.
- (do_mve_vcmp): New encoding function.
- (do_vfp_nsyn_cmp): Changed to support MVE variants.
- (insns): Change to support MVE variants of vcmp and add vpt.
- * testsuite/gas/arm/mve-vcmp-bad-1.d: New test.
- * testsuite/gas/arm/mve-vcmp-bad-1.l: New test.
- * testsuite/gas/arm/mve-vcmp-bad-1.s: New test.
- * testsuite/gas/arm/mve-vcmp-bad-2.d: New test.
- * testsuite/gas/arm/mve-vcmp-bad-2.l: New test.
- * testsuite/gas/arm/mve-vcmp-bad-2.s: New test.
- * testsuite/gas/arm/mve-vpt-bad-1.d: New test.
- * testsuite/gas/arm/mve-vpt-bad-1.l: New test.
- * testsuite/gas/arm/mve-vpt-bad-1.s: New test.
- * testsuite/gas/arm/mve-vpt-bad-2.d: New test.
- * testsuite/gas/arm/mve-vpt-bad-2.l: New test.
- * testsuite/gas/arm/mve-vpt-bad-2.s: New test.
-
-2019-05-16 Andre Vieira <andre.simoesdiasvieira@arm.com>
-
- * config/tc-arm.c (struct arm_it): Expand isscalar field to be able to
- distinguish between types of scalar.
- (parse_typed_reg_or_scalar): Change to accept MVE scalar variants.
- (parse_scalar): Likewise.
- (parse_neon_mov): Accept MVE variant.
- (po_scalar_or_goto): Make use reg_type.
- (parse_operands): Change uses of po_scalar_or_goto.
- (do_vfp_sp_monadic): Change to accept MVE variants.
- (do_vfp_reg_from_sp): Likewise.
- (do_vfp_sp_from_reg): Likewise.
- (do_vfp_dp_rd_rm): Likewise.
- (do_vfp_dp_rd_rn_rm): Likewise.
- (do_vfp_dp_rm_rd_rn): Likewise.
- (M_MNEM_vmovlt, M_MNEM_vmovlb, M_MNEM_vmovnt, M_MNEM_vmovnb): New
- instruction encodings.
- (NEON_SHAPE_DEF): New shape.
- (do_mve_mov): New encoding fuction.
- (do_mve_movn): Likewise.
- (do_mve_movl): Likewise.
- (do_neon_mov): Change to accept MVE variants.
- (mcCE): New MACRO.
- (insns): Accept new MVE variants and instructions.
- * testsuite/gas/arm/mve-vmov-bad-1.d: New test.
- * testsuite/gas/arm/mve-vmov-bad-1.l: New test.
- * testsuite/gas/arm/mve-vmov-bad-1.s: New test.
- * testsuite/gas/arm/mve-vmov-bad-2.d: New test.
- * testsuite/gas/arm/mve-vmov-bad-2.l: New test.
- * testsuite/gas/arm/mve-vmov-bad-2.s: New test.
-
-2019-05-16 Andre Vieira <andre.simoesdiasvieira@arm.com>
-
- * config/tc-arm.c (enum operand_parse_code): Add new operand.
- (parse_operands): Handle new operand.
- (do_neon_cvt_1): Handle MVE variants.
- (do_neon_cvttb_1): Likewise.
- (insns): Accept MVE variants.
- * testsuite/gas/arm/mve-vcvt-bad-1.d: New test.
- * testsuite/gas/arm/mve-vcvt-bad-1.l: New test.
- * testsuite/gas/arm/mve-vcvt-bad-1.s: New test.
- * testsuite/gas/arm/mve-vcvt-bad-2.d: New test.
- * testsuite/gas/arm/mve-vcvt-bad-2.l: New test.
- * testsuite/gas/arm/mve-vcvt-bad-2.s: New test.
- * testsuite/gas/arm/mve-vcvt-bad-3.d: New test.
- * testsuite/gas/arm/mve-vcvt-bad-3.l: New test.
- * testsuite/gas/arm/mve-vcvt-bad-3.s: New test.
- * testsuite/gas/arm/mve-vcvt-bad-4.d: New test.
- * testsuite/gas/arm/mve-vcvt-bad-4.l: New test.
- * testsuite/gas/arm/mve-vcvt-bad-4.s: New test.
- * testsuite/gas/arm/mve-vcvt-bad.d: New test.
- * testsuite/gas/arm/mve-vcvt-bad.l: New test.
- * testsuite/gas/arm/mve-vcvt-bad.s: New test.
-
-2019-05-16 Andre Vieira <andre.simoesdiasvieira@arm.com>
-
- * config/tc-arm.c (struct arm_it): Make immisreg field larger to hold
- type of register.
- (enum shift_kind): Add SHIFT_UXTW shift kind.
- (enum parse_shift_mode): Add SHIFT_UXTW_IMMEDIATE shift mode.
- (parse_shift): Handle new shift type.
- (parse_address_main): Accept new addressing modes.
- (M_MNEM_vstrb, M_MNEM_vstrh, M_MNEM_vstrw, M_MNEM_vstrd,
- M_MNEM_vldrb, M_MNEM_vldrh, M_MNEM_vldrw, M_MNEM_vldrd): New
- instruction encodings.
- (do_mve_vstr_vldr_QI): New encoding functions.
- (do_mve_vstr_vldr_RQ): Likewise.
- (do_mve_vstr_vldr_RI): Likewise.
- (do_mve_vstr_vldr): Likewise.
- * testsuite/gas/arm/mve-vldr-bad-1.d: New test.
- * testsuite/gas/arm/mve-vldr-bad-1.l: New test.
- * testsuite/gas/arm/mve-vldr-bad-1.s: New test.
- * testsuite/gas/arm/mve-vldr-bad-2.d: New test.
- * testsuite/gas/arm/mve-vldr-bad-2.l: New test.
- * testsuite/gas/arm/mve-vldr-bad-2.s: New test.
- * testsuite/gas/arm/mve-vldr-bad-3.d: New test.
- * testsuite/gas/arm/mve-vldr-bad-3.l: New test.
- * testsuite/gas/arm/mve-vldr-bad-3.s: New test.
- * testsuite/gas/arm/mve-vstr-bad-1.d: New test.
- * testsuite/gas/arm/mve-vstr-bad-1.l: New test.
- * testsuite/gas/arm/mve-vstr-bad-1.s: New test.
- * testsuite/gas/arm/mve-vstr-bad-2.d: New test.
- * testsuite/gas/arm/mve-vstr-bad-2.l: New test.
- * testsuite/gas/arm/mve-vstr-bad-2.s: New test.
- * testsuite/gas/arm/mve-vstr-bad-3.d: New test.
- * testsuite/gas/arm/mve-vstr-bad-3.l: New test.
- * testsuite/gas/arm/mve-vstr-bad-3.s: New test.
-
-2019-05-16 Andre Vieira <andre.simoesdiasvieira@arm.com>
-
- * config/tc-arm.c (enum it_instruction_type): Add MVE_UNPREDICABLE_INSN.
- (BAD_EL_TYPE): New error message.
- (parse_neon_el_struct_list): Adapt to be able to accept MVE variant.
- (parse_address_main): Likewise.
- (group_reloc_type): Add GROUP_MVE.
- (enum operand_parse_code): Add new operands.
- (parse_operands): Handle new operands.
- (M_MNEM_vst20, M_MNEM_vst21, M_MNEM_vst40, M_MNEM_vst41, M_MNEM_vst42,
- M_MNEM_vst43, M_MNEM_vld20, M_MNEM_vld21, M_MNEM_vld40, M_MNEM_vld41,
- M_MNEM_vld42, M_MNEM_vld43): New encodings.
- (do_mve_vst_vld): New encoding function.
- (do_neon_ld_st_interleave): Use BAD_EL_TYPE.
- (it_fsm_pre_encode): Handle new it_instruction_type
- (handle_pred_state): Likewise.
- * testsuite/gas/arm/mve-vstld-bad.d: New test.
- * testsuite/gas/arm/mve-vstld-bad.l: New test.
- * testsuite/gas/arm/mve-vstld-bad.s: New test.
-
-2019-05-16 Andre Vieira <andre.simoesdiasvieira@arm.com>
-
- * config/tc-arm.c (BAD_MVE_AUTO): New error message.
- (BAD_MVE_SRCDEST): Likewise.
- (mark_feature_used): Diagnose MVE only instructions when in
- auto-detection mode or -march=all.
- (enum operand_parse_code): Define new operand.
- (parse_operands): Handle new operand.
- (M_MNEM_vmullt, M_MNEM_vmullb): New encodings.
- (mve_encode_qqq): New encoding helper function.
- (do_mve_vmull): New encoding function.
- (insns): Handle new instructions.
- * testsuite/gas/arm/mve-vmullbt-bad.d: New test.
- * testsuite/gas/arm/mve-vmullbt-bad.l: New test.
- * testsuite/gas/arm/mve-vmullbt-bad.s: New test.
-
-2019-05-16 Andre Vieira <andre.simoesdiasvieira@arm.com>
-
- * config/tc-arm.c (struct asm_opcode): Make avalue a full int.
- (BAD_ODD, BAD_EVEN, BAD_SIMD_TYPE): New errors.
- (enum operand_parse_code): Handle new operands.
- (parse_operands): Likewise.
- (M_MNEM_vabav, M_MNEM_vmladav, M_MNEM_vmladava, M_MNEM_vmladavx,
- M_MNEM_vmladavax, M_MNEM_vmlsdav, M_MNEM_vmlsdava, M_MNEM_vmlsdavx,
- M_MNEM_vmlsdavax): Define new encodings.
- (NEON_SHAPE_DEF): Add new shape.
- (neon_check_type): Use BAD_SIMD_TYPE.
- (mve_encode_rqq): New encoding helper function.
- (do_mve_vabav, do_mve_vmladav): New encoding functions.
- (mCEF): New MACRO.
- * testsuite/gas/arm/mve-vabav-bad.d: New test.
- * testsuite/gas/arm/mve-vabav-bad.l: New test.
- * testsuite/gas/arm/mve-vabav-bad.s: New test.
- * testsuite/gas/arm/mve-vmladav-bad.d: New test.
- * testsuite/gas/arm/mve-vmladav-bad.l: New test.
- * testsuite/gas/arm/mve-vmladav-bad.s: New test.
- * testsuite/gas/arm/mve-vmlav-bad.d: New test.
- * testsuite/gas/arm/mve-vmlav-bad.l: New test.
- * testsuite/gas/arm/mve-vmlav-bad.s: New test.
- * testsuite/gas/arm/mve-vmlsdav-bad.d: New test.
- * testsuite/gas/arm/mve-vmlsdav-bad.l: New test.
- * testsuite/gas/arm/mve-vmlsdav-bad.s: New test.
-
-2019-05-16 Andre Vieira <andre.simoesdiasvieira@arm.com>
-
- * config/tc-arm.c (do_neon_abs_neg): Make it accept MVE variant.
- (insns): Change vabs and vneg entries to accept MVE variants.
- * testsuite/gas/arm/mve-vabsneg-bad-1.d: New test.
- * testsuite/gas/arm/mve-vabsneg-bad-1.l: New test.
- * testsuite/gas/arm/mve-vabsneg-bad-1.s: New test.
- * testsuite/gas/arm/mve-vabsneg-bad-2.d: New test.
- * testsuite/gas/arm/mve-vabsneg-bad-2.l: New test.
- * testsuite/gas/arm/mve-vabsneg-bad-2.s: New test.
-
-2019-05-16 Andre Vieira <andre.simoesdiasvieira@arm.com>
-
- * config/tc-arm.c (enum it_instruction_type): Rename to...
- (enum pred_instruction_type): ... this. Include VPT types.
- (it_insn_type): Rename to ...
- (pred_insn_type): .. this.
- (arm_it): Change comment.
- (enum arm_reg_type): Add new value.
- (reg_expected_msgs): New entry.
- (asm_opcode): Add mayBeVecPred member.
- (BAD_SYNTAX, BAD_NOT_VPT, BAD_OUT_VPT, BAD_VPT_COND, MVE_NOT_IT,
- MVE_NOT_VPT, MVE_BAD_PC, MVE_BAD_SP): New diagnostic MACROS.
- (arm_vcond_hsh): New table for vector condition codes.
- (now_it): Rename to ...
- (now_pred): ... this.
- (now_it_compatible): Rename to ...
- (now_pred_compatible): ... this.
- (in_it_block): Rename to ...
- (in_pred_block): ... this.
- (handle_it_state): Rename to ...
- (handle_pred_state): ... this. And change it to accept VPT blocks.
- (set_it_insn_type): Rename to ...
- (set_pred_insn_type): ... this.
- (set_it_insn_type_nonvoid): Rename to ...
- (set_pred_insn_type_nonvoid): ... this.
- (set_it_insn_type_last): Rename to ...
- (set_pred_insn_type_last): ... this.
- (record_feature_use): Moved.
- (mark_feature_used): Likewise.
- (parse_typed_reg_or_scalar): Add new case for REG_TYPE_MQ.
- (emit_insn): Use renamed functions and variables.
- (enum operand_parse_code): Add new operands.
- (parse_operands): Handle new operands.
- (do_scalar_fp16_v82_encode): Change predication detection.
- (do_it): Use renamed functions and variables.
- (do_t_add_sub): Likewise.
- (do_t_arit3): Likewise.
- (do_t_arit3c): Likewise.
- (do_t_blx): Likewise.
- (do_t_branch): Likewise.
- (do_t_bkpt_hlt1): Likewise.
- (do_t_branch23): Likewise.
- (do_t_bx): Likewise.
- (do_t_bxj): Likewise.
- (do_t_cond): Likewise.
- (do_t_csdb): Likewise.
- (do_t_cps): Likewise.
- (do_t_cpsi): Likewise.
- (do_t_cbz): Likewise.
- (do_t_it): Likewise.
- (do_mve_vpt): New function to handle VPT blocks.
- (encode_thumb2_multi): Use renamed functions and variables.
- (do_t_ldst): Use renamed functions and variables.
- (do_t_mov_cmp): Likewise.
- (do_t_mvn_tst): Likewise.
- (do_t_mul): Likewise.
- (do_t_nop): Likewise.
- (do_t_neg): Likewise.
- (do_t_rsb): Likewise.
- (do_t_setend): Likewise.
- (do_t_shift): Likewise.
- (do_t_smc): Likewise.
- (do_t_tb): Likewise.
- (do_t_udf): Likewise.
- (do_t_loloop): Likewise.
- (do_neon_cvt_1): Likewise.
- (do_vfp_nsyn_cvt_fpv8): Likewise.
- (do_vsel): Likewise.
- (do_vmaxnm): Likewise.
- (do_vrint_1): Likewise.
- (do_crypto_2op_1): Likewise.
- (do_crypto_3op_1): Likewise.
- (do_crc32_1): Likewise.
- (it_fsm_pre_encode): Likewise.
- (it_fsm_post_encode): Likewise.
- (force_automatic_it_block_close): Likewise.
- (check_it_blocks_finished): Likewise.
- (check_pred_blocks_finished): Likewise.
- (arm_cleanup): Likewise.
- (now_it_add_mask): Rename to ...
- (now_pred_add_mask): ... this. And use new variables and functions.
- (NEON_ENC_TAB): Add entries for vabdl, vaddl and vsubl.
- (N_I_MVE, N_F_MVE, N_SU_MVE): New MACROs.
- (neon_check_type): Generalize error message.
- (mve_encode_qqr): New MVE generic encoding function.
- (neon_dyadic_misc): Change to accept MVE variants.
- (do_neon_dyadic_if_su): Likewise.
- (do_neon_addsub_if_i): Likewise.
- (do_neon_dyadic_long): Likewise.
- (vfp_or_neon_is_neon): Add extra checks.
- (check_simd_pred_availability): Helper function to check SIMD
- instruction availability with respect to predication.
- (enum opcode_tag): New suffix value.
- (opcode_lookup): Change to handle VPT blocks.
- (new_automatic_it_block): Rename to ...
- (close_automatic_it_block): ...this.
- (TxCE, TxC3, TxC3w, TUE, TUEc, TUF, CE, C3, ToC, ToU,
- toC, toU, CL, cCE, cCL, C3E, xCM_, UE, UF, NUF, nUF,
- NCE_tag, NCE, NCEF, nCE_tag, nCE, nCEF): Add default value for new
- field.
- (mCEF, mnCEF, mnCE, MNUF, mnUF, mToC, MNCE, MNCEF): New MACROs.
- (insns): Redefine vadd, vsub, cabd, vabdl, vaddl, vsubl to accept MVE
- variants. Add entries for vscclrm, and vpst.
- (md_begin): Add arm_vcond_hsh initialization.
- * config/tc-arm.h (enum it_state): Rename to...
- (enum pred_state): ...this.
- (struct current_it): Rename to...
- (struct current_pred): ...this.
- (enum pred_type): New enum.
- (struct arm_segment_info_type): Use current_pred.
- * testsuite/gas/arm/armv8_3-a-fp-bad.l: Update error message.
- * testsuite/gas/arm/armv8_3-a-simd-bad.l: Update error message.
- * testsuite/gas/arm/dotprod-illegal.l: Update error message.
- * testsuite/gas/arm/mve-vaddsubabd-bad-1.d: New test.
- * testsuite/gas/arm/mve-vaddsubabd-bad-1.l: New test.
- * testsuite/gas/arm/mve-vaddsubabd-bad-1.s: New test.
- * testsuite/gas/arm/mve-vaddsubabd-bad-2.d: New test.
- * testsuite/gas/arm/mve-vaddsubabd-bad-2.l: New test.
- * testsuite/gas/arm/mve-vaddsubabd-bad-2.s: New test.
- * testsuite/gas/arm/mve-vpst-bad.d: New test.
- * testsuite/gas/arm/mve-vpst-bad.l: New test.
- * testsuite/gas/arm/mve-vpst-bad.s: New test.
- * testsuite/gas/arm/neon-ldst-es-bad.l: Updated error message.
-
-2019-05-16 Andre Vieira <andre.simoesdiasvieira@arm.com>
-
- * config/tc-arm.c (mve_ext, mve_fp_ext): New features.
- (armv8_1m_main_ext_table): Add new extensions.
- (aeabi_set_public_attributes): Translate new features to new build attributes.
- (arm_convert_symbolic_attribute): Add Tag_MVE_arch.
- * doc/c-arm.texi: Document new extensions and new build attribute.
-
-2019-05-15 John Darrington <john@darrington.wattle.id.au>
-
- * config/tc-s12z.c (register_prefix): New variable. (md_show_usage,
- md_parse_option): parse the new option.
- (lex_reg_name): Scan the prefix if one is set.
- * doc/c-s12z.texi (S12Z-Opts): Document the new option.
- * testsuite/gas/s12z/reg-prefix.d: New file.
- * testsuite/gas/s12z/reg-prefix.s: New file.
- * testsuite/gas/s12z/s12z.exp: Add them.
-
-2019-05-14 John Darrington <john@darrington.wattle.id.au>
-
- * doc/as.texi (Machine Dependencies): Fix misaligned menu entry.
-
-2019-05-15 Alan Modra <amodra@gmail.com>
-
- * config/tc-csky.c (md_convert_frag): Initialise trailing
- padding for COND_JUMP_PIC.
-
-2019-05-15 Alan Modra <amodra@gmail.com>
-
- * dwarf2dbg.c: Whitespace fixes.
- (get_filenum): Don't strdup "file". Adjust error message.
- (dwarf2_directive_filename): Use an unsigned type for "num".
- Catch truncation of file number and overflow of get_filenum
- XRESIZEVEC multiplication. Delete dead code.
-
-2019-05-15 Alan Modra <amodra@gmail.com>
-
- PR 24538
- * config/tc-tic54x.c (tic54x_start_line_hook): Do skip end of line
- chars in setting endp.
-
-2019-05-14 Nick Clifton <nickc@redhat.com>
-
- PR 24538
- * config/tc-i386-intel.c (i386_intel_simplify_register): Reject
- illegal register numbers.
-
-2019-05-10 Nick Clifton <nickc@redhat.com>
-
- PR 24538
- * macro.c (get_any_string): Increase size of buffer used to hold
- decimal value of expression result.
- * dw2gencfi.c (get_debugseg_name): Handle an empty name.
- * dwarf2dbg.c (get_filenum): Catch integer wraparound when
- extending allocate file array.
- (dwarf2_directive_filename): Add extra checks of the computed file
- number.
- * config/tc-arm.c (arm_tc_equal_in_insn): Insert copy of name into
- warning hash table.
- (s_arm_eabi_attribute): Check for obj_elf_vendor_attribute
- returning -1.
- * config/tc-i386.c (i386_output_nops): Catch an attempt to
- generate nops of negative lengths.
- * as.h (MAX_LITTLENUMS): Move definition to here from...
- * config/atof-ieee.c: ...here.
- * config/tc-aarch64.c: ...here.
- * config/tc-arc.c: ...here.
- * config/tc-arm.c: ...here.
- * config/tc-epiphany.c: ...here.
- * config/tc-i386.c: ...here.
- * config/tc-ia64.c: ...here. (And correct the value).
- * config/tc-m32c.c: ...here.
- * config/tc-m32r.c: ...here.
- * config/tc-metag.c: ...here.
- * config/tc-microblaze.c: ...here.
- * config/tc-nds32.c: ...here.
- * config/tc-or1k.c: ...here.
- * config/tc-score.c: ...here.
- * config/tc-score7.c: ...here.
- * config/tc-tic4x.c: ...here.
- * config/tc-tilegx.c: ...here.
- * config/tc-tilepro.c: ...here.
- * config/tc-visium.c: ...here.
- * config/tc-sh.c (md_assemble): Add check for an instruction with
- no opcodes.
- * config/tc-mips.c (mips_lookup_insn): Add check for very short
- instruction name.
- * config/tc-tic54x.c: Use unsigned chars to access is_end_of_line
- array.
- (tic54x_start_line_hook): Check for an empty line.
- (next_line_shows_parallel): Do not walk off the end of the string.
- (tic54x_macro_start): Check for too much macro nesting.
- (tic54x_start_label): Add label_start parameter. Use this
- parameter to check the first character of the label.
-
- * config/tc-tic54x.h (TC_START_LABEL_WITHOUT_COLON): Pass
- line_start variable to tic54x_start_label.
-
-2019-05-10 Faraz Shahbazker <fshahbazker@wavecomp.com>
-
- * config/tc-mips.c (macro) <M_ADD_I, M_SUB_I, M_DADD_I, M_DSUB_I>:
- Add expansions for MIPS r6.
- * testsuite/gas/mips/add.s: Enable tests for R6.
- * testsuite/gas/mips/daddi.s: Annotate to test DADD for R6.
- * testsuite/gas/mips/mipsr6@add.d: Likewise.
- * gas/testsuite/gas/mips/mipsr6@dadd.d: New test.
- * gas/testsuite/gas/mips/mips.exp: Run the new test.
-
-2019-05-09 Matthew Malcomson <matthew.malcomson@arm.com>
-
- * testsuite/gas/aarch64/sve2.d: Remove file format restriction.
-
-2019-05-09 Matthew Malcomson <matthew.malcomson@arm.com>
-
- * testsuite/gas/aarch64/illegal-sve2-aes.d: New test.
- * testsuite/gas/aarch64/illegal-sve2-bitperm.d: New test.
- * testsuite/gas/aarch64/illegal-sve2-sha3.d: Test new instructions.
- * testsuite/gas/aarch64/illegal-sve2-sm4.d: Test new instructions.
- * testsuite/gas/aarch64/illegal-sve2-sve1ext.d: Test new instructions.
- * testsuite/gas/aarch64/illegal-sve2-sve1ext.l: Test new instructions.
- * testsuite/gas/aarch64/illegal-sve2.d: Test new instructions.
- * testsuite/gas/aarch64/illegal-sve2.l: Test new instructions.
- * testsuite/gas/aarch64/illegal-sve2.s: Test new instructions.
- * testsuite/gas/aarch64/sve1-extended-sve2.s: New test.
- * testsuite/gas/aarch64/sve2.d: Test new instructions.
- * testsuite/gas/aarch64/sve2.s: Test new instructions.
-
-2019-05-09 Matthew Malcomson <matthew.malcomson@arm.com>
-
- * config/tc-aarch64.c (parse_operands): Handle new SVE_SHLIMM_UNPRED_22
- operand.
-
-2019-05-09 Matthew Malcomson <matthew.malcomson@arm.com>
-
- * config/tc-aarch64.c (parse_operands): Handle new SVE_Zm4_11_INDEX
- operand.
-
-2019-05-09 Matthew Malcomson <matthew.malcomson@arm.com>
-
- * config/tc-aarch64.c (parse_operands): Handle new SVE_SHRIMM_UNPRED_22
- operand.
-
-2019-05-09 Matthew Malcomson <matthew.malcomson@arm.com>
-
- * config/tc-aarch64.c (REG_ZR): Macro specifying zero register.
- (parse_address_main): Account for new addressing mode [Zn.S, Xm].
- (parse_operands): Handle new SVE_ADDR_ZX operand.
-
-2019-05-09 Matthew Malcomson <matthew.malcomson@arm.com>
-
- * config/tc-aarch64.c (parse_operands): Handle new SVE_Zm3_11_INDEX
- operand.
-
-2019-05-09 Matthew Malcomson <matthew.malcomson@arm.com>
-
- * config/tc-aarch64.c (parse_operands): Handle new SVE_IMM_ROT3 operand.
-
-2019-05-09 Matthew Malcomson <matthew.malcomson@arm.com>
-
- * config/tc-aarch64.c: Add command line architecture feature flags
- "sve2", "sve2-sm4", "sve2-aes", "sve2-sha3", "bitperm".
- * doc/c-aarch64.texi: Document new architecture feature flags.
-
-2019-05-08 Alan Modra <amodra@gmail.com>
-
- * testsuite/gas/elf/dwarf2-1.s,
- * testsuite/gas/elf/dwarf2-2.s,
- * testsuite/gas/elf/dwarf2-5.s,
- * testsuite/gas/elf/dwarf2-7.s,
- * testsuite/gas/elf/dwarf2-8.s,
- * testsuite/gas/elf/dwarf2-9.s,
- * testsuite/gas/elf/dwarf2-10.s,
- * testsuite/gas/elf/dwarf2-11.s,
- * testsuite/gas/elf/dwarf2-12.s,
- * testsuite/gas/elf/dwarf2-13.s,
- * testsuite/gas/elf/dwarf2-14.s,
- * testsuite/gas/elf/dwarf2-15.s,
- * testsuite/gas/elf/dwarf2-16.s,
- * testsuite/gas/elf/dwarf2-17.s,
- * testsuite/gas/elf/dwarf2-18.s,
- * testsuite/gas/elf/dwarf2-19.s: Double size of align and simulated
- instructions.
- * testsuite/gas/elf/dwarf2-1.d,
- * testsuite/gas/elf/dwarf2-2.d,
- * testsuite/gas/elf/dwarf2-5.d,
- * testsuite/gas/elf/dwarf2-7.d,
- * testsuite/gas/elf/dwarf2-8.d,
- * testsuite/gas/elf/dwarf2-9.d,
- * testsuite/gas/elf/dwarf2-10.d,
- * testsuite/gas/elf/dwarf2-11.d,
- * testsuite/gas/elf/dwarf2-12.d,
- * testsuite/gas/elf/dwarf2-13.d,
- * testsuite/gas/elf/dwarf2-14.d,
- * testsuite/gas/elf/dwarf2-15.d,
- * testsuite/gas/elf/dwarf2-16.d,
- * testsuite/gas/elf/dwarf2-17.d,
- * testsuite/gas/elf/dwarf2-18.d,
- * testsuite/gas/elf/dwarf2-19.d: Use xfail rather than notarget.
- Remove avr, pru, tile, xtensa from xfails. Update expected output.
- * testsuite/gas/elf/elf.exp: Sort targets.
- (dump_opts): Pass {as -mno-relax} for riscv, {as -mno-link-relax}
- for avr and pru, and {as --no-link-relax} for xtensa to dwarf tests.
- * testsuite/gas/elf/section2.e-miwmmxt: Delete unused file.
-
-2019-05-08 Alan Modra <amodra@gmail.com>
-
- * config/tc-xtensa.c (opt_linkrelax): New variable.
- (md_parse_option): Set it here.
- (md_begin): Copy opt_linkrelax to linkrelax.
-
-2019-05-07 Alexandre Oliva <aoliva@redhat.com>
-
- * testsuite/gas/elf/dwarf2-18.d: Xfail mep-*.
- * testsuite/gas/elf/dwarf2-19.d: Likewise.
-
-2019-05-07 Alan Modra <amodra@gmail.com>
-
- * symbols.c (use_complex_relocs_for): Formatting. Factor out
- X_add_symbol tests.
-
-2019-05-06 Andrew Bennett <andrew.bennett@imgtec.com>
- Faraz Shahbazker <fshahbazker@wavecomp.com>
-
- * config/tc-mips.c (mips_set_ase): Handle ASE_EVA_R6.
- (macro) <M_LLWPE_AB, M_SCWPE_AB>: New cases.
- (mips_after_parse_args): Translate EVA to EVA_R6.
- * testsuite/gas/mips/ase-errors-1.s: Add new instructions.
- * testsuite/gas/mips/eva.s: Likewise.
- * testsuite/gas/mips/ase-errors-1.l: Check errors for
- new instructions.
- * testsuite/gas/mips/mipsr6@eva.d: Check new test cases.
-
-2019-05-06 Alan Modra <amodra@gmail.com>
-
- * symbols.c (symbol_relc_make_sym): Do not access sym->sy_value
- directly.
-
-2019-05-06 Alan Modra <amodra@gmail.com>
-
- * config/tc-ppc.c (ppc_fix_adjustable): Exclude all GOT and PLT
- relocs, and VLE sdarel relocs.
- * testsuite/gas/ppc/power4.d: Adjust.
-
-2019-05-05 Alexandre Oliva <aoliva@redhat.com>
-
- * dwarf2dbg.c (set_or_check_view): Skip heads when assigning
- views of prior locs.
- (dwarf2_gen_line_info_1): Skip heads.
- (size_inc_line_addr, emit_inc_line_addr): Drop
- DW_LNS_advance_pc for zero addr delta.
- (dwarf2_finish): Assign views for heads of segments.
- * testsuite/gas/elf/dwarf2-19.d: New.
- * testsuite/gas/elf/dwarf2-19.s: New.
- * testsuite/gas/elf/elf.exp: Test it.
-
-2019-05-04 Alan Modra <amodra@gmail.com>
-
- * config/tc-m32c.c (insn_size): Delete static var.
- (md_begin): Don't set it.
- (m32c_md_end): Delete.
- (md_assemble): Add insn_size auto var.
- * config/tc-m32c.h (md_end): Don't define.
- (m32c_md_end): Delete.
- (NOP_OPCODE, HANDLE_ALIGN, MAX_MEM_FOR_RS_ALIGN_CODE): Define.
- * testsuite/gas/all/align.d: Remove m32c from notarget list.
- * testsuite/gas/all/incbin.d: Likewise.
- * testsuite/gas/elf/dwarf2-11.d: Likewise.
- * testsuite/gas/macros/semi.d: Likewise.
- * testsuite/gas/all/gas.exp (do_comment): Similarly.
-
-2019-05-02 H.J. Lu <hongjiu.lu@intel.com>
-
- PR gas/24485
- * config/tc-i386.c (process_suffix): Issue a warning to IRET
- without a suffix for .code16gcc.
- * testsuite/gas/i386/jump16.s: Add tests for iretX.
- * testsuite/gas/i386/jump16.d: Updated.
- * testsuite/gas/i386/jump16.e: New file.
-
-2019-05-01 Sudakshina Das <sudi.das@arm.com>
-
- * config/tc-aarch64.c (parse_operands): Add case for
- AARCH64_OPND_TME_UIMM16.
- (aarch64_features): Add "tme".
- * doc/c-aarch64.texi: Document the same.
- * testsuite/gas/aarch64/tme-invalid.d: New test.
- * testsuite/gas/aarch64/tme-invalid.l: New test.
- * testsuite/gas/aarch64/tme-invalid.s: New test.
- * testsuite/gas/aarch64/tme.d: New test.
- * testsuite/gas/aarch64/tme.s: New test.
-
-2019-04-29 John Darrington <john@darrington.wattle.id.au>
-
- * testsuite/gas/s12z/truncated.d: New file.
- * testsuite/gas/s12z/truncated.s: New file.
- * testsuite/gas/s12z/s12z.exp: Add new test.
-
-2019-04-26 Andrew Bennett <andrew.bennett@imgtec.com>
- Faraz Shahbazker <fshahbazker@wavecomp.com>
-
- * config/tc-mips.c (macro) <M_LLWP_AB, M_LLDP_AB, M_SCWP_AB,
- M_SCDP_AB>: New cases and expansions for paired instructions.
- * testsuite/gas/mips/llpscp-32.s: New test source.
- * testsuite/gas/mips/llpscp-64.s: Likewise.
- * testsuite/gas/mips/llpscp-32.d: New test.
- * testsuite/gas/mips/llpscp-64.d: Likewise.
- * testsuite/gas/mips/mips.exp: Run the new tests.
- * testsuite/gas/mips/r6.s: Add new instructions to test source.
- * testsuite/gas/mips/r6-64.s: Likewise.
- * testsuite/gas/mips/r6-64-n32.d: Check new instructions.
- * testsuite/gas/mips/r6-64-n64.d: Likewise.
- * testsuite/gas/mips/r6-n32.d: Likewise.
- * testsuite/gas/mips/r6-n64.d: Likwwise.
- * testsuite/gas/mips/r6.d: Likewise.
-
-2019-04-26 H.J. Lu <hongjiu.lu@intel.com>
-
- PR gas/24485
- * config/tc-i386.c (process_suffix): Don't add DATA_PREFIX_OPCODE
- to IRET for .code16gcc.
- * testsuite/gas/i386/jump16.s: Add IRET tests.
- * testsuite/gas/i386/jump16.d: Updated.
-
-2019-04-25 Alexandre Oliva <aoliva@redhat.com>
- Alan Modra <amodra@gmail.com>
-
- PR gas/24444
- * frags.c (frag_gtoffset_p): New.
- * frags.h (frag_gtoffset_p): Declare it.
- * expr.c (resolve_expression): Use it.
-
-2019-04-24 Alan Modra <amodra@gmail.com>
-
- PR 24444
- * symbols.c (resolve_symbol_value): When handling symbols
- marked as sy_flags.resolved, return correct value for the
- case of expression symbols left as an O_symbol expression.
- Merge O_symbol code handling undefined and common symbols with
- code handling special cases of expression symbols. Use
- seg_left to test for undefined and common symbols. Don't
- leave an O_symbol expression when X_add_symbol resolves to
- the absolute_section. Init final_val later.
- * testsuite/gas/mmix/basep-7.d: Adjust expected output.
-
-2019-04-24 John Darrington <john@darrington.wattle.id.au>
-
- * testsuite/gas/s12z/bit-manip-invalid.s: Extend test for BSET
- and BCLR instructions with an invalid mode.
- * testsuite/gas/s12z/bit-manip-invalid.d: ditto.
-
-2019-04-19 Nick Clifton <nickc@redhat.com>
-
- PR 24464
- * config/tc-rx.h (md_relax_frag): Pass the max_iterations variable
- to the relaxation function.
- * config/tc-rx.c (rx_relax_frag): Add new parameter - the maximum
- number of iterations. Make sure that our internal iteration limit
- does not exceed this external iteration limit.
-
-2019-04-18 Matthew Fortune <matthew.fortune@mips.com>
-
- * config/tc-mips.c (match_non_zero_reg_operand): Update
- warning message.
- * testsuite/gas/mips/r6-branch-constraints.l: Likewise.
-
-2019-04-18 Jozef Lawrynowicz <jozef.l@mittosystems.com>
-
- * config/tc-msp430.c (msp430_make_init_symbols): Define
- __crt0_run_{preinit,init,fini}_array symbols if
- .{preinit,init,fini}_array sections exist.
- * testsuite/gas/msp430/fini-array.d: New test.
- * testsuite/gas/msp430/init-array.d: New test.
- * testsuite/gas/msp430/preinit-array.d: New test.
- * testsuite/gas/msp430/fini-array.s: New test source.
- * testsuite/gas/msp430/init-array.s: New test source.
- * testsuite/gas/msp430/preinit-array.s: New test source.
- * testsuite/gas/msp430/msp430.exp: Add new tests to driver.
-
-2019-04-17 Jozef Lawrynowicz <jozef.l@mittosystems.com>
-
- * config/tc-msp430.c (msp430_make_init_symbols): Define __crt0_init_bss
- symbol when .lower.bss or .either.bss sections exist.
- Define __crt0_movedata when .lower.data or .either.data sections exist.
- * testsuite/gas/msp430/either-data-bss-sym.d: New test.
- * testsuite/gas/msp430/low-data-bss-sym.d: New test.
- * testsuite/gas/msp430/either-data-bss-sym.s: New test source.
- * testsuite/gas/msp430/low-data-bss-sym.s: New test source.
- * testsuite/gas/msp430/msp430.exp: Run new tests.
- Enable large code model when running -mdata-region={upper,either}
- tests.
+ (struct _i386_insn): New field "short_form".
+ (optimize_encoding): Drop setting of shortform field.
+ (process_suffix): Set i.short_form. Replace shortform use.
+ (process_operands): Replace shortform use.
-2019-04-17 Jozef Lawrynowicz <jozef.l@mittosystems.com>
-
- * config/tc-msp430.c (options): New OPTION_UNKNOWN_INTR_NOPS,
- OPTION_NO_UNKNOWN_INTR_NOPS and do_unknown_interrupt_nops.
- (md_parse_option): Handle OPTION_UNKNOWN_INTR_NOPS and
- OPTION_NO_UNKNOWN_INTR_NOPS by setting do_unknown_interrupt_nops
- accordingly.
- (md_show_usage): Likewise.
- (md_shortopts): Add "mu" for OPTION_UNKNOWN_INTR_NOPS and
- "mU" for OPTION_NO_UNKNOWN_INTR_NOPS.
- (md_longopts): Likewise.
- (warn_eint_nop): Update comment.
- (warn_unsure_interrupt): Don't warn if prev_insn_is_nop or
- prev_insn_is_dint or we are assembling for 430 ISA.
- (msp430_operands): Only call warn_unsure_interrupt if
- do_unknown_interrupt_nops == TRUE.
- * testsuite/gas/msp430/nop-unknown-intr.s: New test source file.
- * testsuite/gas/msp430/nop-unknown-intr-430.d: New test.
- * testsuite/gas/msp430/nop-unknown-intr-430x.d: New test.
- * testsuite/gas/msp430/nop-unknown-intr-430x-ignore.d: New test.
- * testsuite/gas/msp430/nop-unknown-intr-430.l: Warning output for new
- test.
- * testsuite/gas/msp430/nop-unknown-intr-430x.l: Likewise.
- * testsuite/gas/msp430/msp430.exp: Add new tests to driver.
-
-2019-04-16 Alan Modra <amodra@gmail.com>
-
- * testsuite/gas/all/weakref1.d: xfail nds32.
-
-2019-04-16 Alan Modra <amodra@gmail.com>
-
- * testsuite/gas/all/gas.exp: Remove ns32k xfails.
- * testsuite/gas/all/weakref1u.d: Don't run for ns32k-*-*.
-
-2019-04-16 Alan Modra <amodra@gmail.com>
-
- * write.h: Don't include bit_fix.h.
- (struct fix): Rearrange some fields. Delete fx_im_disp and
- fx_bit_fixP. Use bitfields for fx_size and fx_pcrel_adjust.
- * write.c (fix_new_internal): Don't init fx_im_disp and fx_bit_fixP.
- (fixup_segment): Don't exclude overflow checks on fx_bit_fixP.
- (print_fixup): Don't print im_disp.
- * config/tc-cris.c (md_apply_fix): Remove tests of fx_bit_fixP
- and fx_im_disp.
- * config/tc-dlx.c (md_apply_fix): Remove wrong debug code. Set
- fx_no_overflow when fx_bit_fixP.
- * config/tc-dlx.h: Include bit_fix.h.
- (TC_FIX_TYPE, tc_fix_data, TC_INIT_FIX_DATA): Define.
- * config/tc-ns32k.c (fix_new_ns32k, fix_new_ns32k_exp): Set
- fx_no_overflow when bit_fixP.
- * config/tc-ns32k.h (TC_FIX_TYPE): Add fx_bit_fixP and fx_im_disp.
- (fix_im_disp, fix_bit_fixP): Adjust to suit.
- (TC_INIT_FIX_DATA, TC_FIX_DATA_PRINT): Likewise.
-
-2019-04-16 Alan Modra <amodra@gmail.com>
-
- * write.h (struct fix <fx_where>): Make unsigned.
- (fix_new, fix_at_start, fix_new_exp): Adjust prototypes.
- * write.c (fix_new, fix_new_exp, fix_at_start): Make "where" and
- "size" parameters unsigned long.
- (fix_new_internal): Likewise. Adjust error format string to suit.
- * config/tc-mips.c (md_convert_frag): Remove cast of fx_where.
- * config/tc-sparc.c (md_apply_fix): Likewise.
- * config/tc-score.c (s3_convert_frag): Adjust for unsigned fx_where.
- * config/tc-score7.c (s7_convert_frag): Likewise.
-
-2019-04-16 Alan Modra <amodra@gmail.com>
-
- * frags.h (struct frag <fr_fix>): Use unsigned type.
- * frags.c (frag_new): Assert that current size exceeds
- old_frags_var_max_size.
- * ehopt.c (get_cie_info): Adjust for unsigned fr_fix.
- * listing.c (calc_hex): Likewise.
- * write.c (cvt_frag_to_fill, write_relocs): Likewise.
- * config/tc-arc.c (md_convert_frag): Likewise.
- * config/tc-avr.c (avr_patch_gccisr_frag): Likewise.
- * config/tc-mips.c (md_convert_frag): Likewise.
- * config/tc-rl78.c (md_convert_frag): Likewise.
- * config/tc-rx.c (md_convert_frag): Likewise.
- * config/tc-sparc.c (md_apply_fix): Likewise.
- * config/tc-xtensa.c (next_instrs_are_b_retw): Likewise.
- (unrelaxed_frag_min_insn_count, unrelaxed_frag_has_b_j): Likewise.
-
-2019-04-15 Thomas Preud'homme <thomas.preudhomme@arm.com>
-
- * config/tc-arm.c (parse_sys_vldr_vstr): New function.
- (OP_VLDR): New enum operand_parse_code enumerator.
- (parse_operands): Add logic for OP_VLDR.
- (do_t_vldr_vstr_sysreg): New function.
- (do_vldr_vstr): Likewise.
- (insns): Guard VLDR and VSTR by arm_ext_v4t for Thumb mode.
- (md_apply_fix): Add bound check for VLDR and VSTR co-processor offset.
- Add masking logic for BFD_RELOC_ARM_T32_VLDR_VSTR_OFF_IMM relocation.
- * testsuite/gas/arm/archv8m_1m-cmse-main-bad.s: Add examples of bad
- uses of VLDR and VSTR.
- * testsuite/gas/arm/archv8m_1m-cmse-main-bad.l: Add error messages for
- above bad uses.
- * testsuite/gas/arm/archv8m_1m-cmse-main.s: Add examples of VLDR and
- VSTR valid uses.
- * testsuite/gas/arm/archv8m_1m-cmse-main.d: Add disassembly for the
- above examples.
-
-2019-04-15 Thomas Preud'homme <thomas.preudhomme@arm.com>
-
- * config/tc-arm.c (arm_typed_reg_parse): Fix typo in comment.
- (enum reg_list_els): New REGLIST_VFP_S_VPR and REGLIST_VFP_D_VPR
- enumerators.
- (parse_vfp_reg_list): Add new partial_match parameter. Set
- *partial_match to TRUE if at least one element in the register list has
- matched. Add support for REGLIST_VFP_S_VPR and REGLIST_VFP_D_VPR
- register lists which expect VPR as last element in the list.
- (s_arm_unwind_save_vfp_armv6): Adapt call to parse_vfp_reg_list to new
- prototype.
- (s_arm_unwind_save_vfp): Likewise.
- (enum operand_parse_code): New OP_VRSDVLST enumerator.
- (parse_operands): Adapt call to parse_vfp_reg_list to new prototype.
- Handle new OP_VRSDVLST case.
- (do_t_vscclrm): New function.
- (insns): New entry for VSCCLRM instruction.
- * testsuite/gas/arm/archv8m_1m-cmse-main-bad.s: Add invalid VSCCLRM
- instructions.
- * testsuite/gas/arm/archv8m_1m-cmse-main-bad.l: Add error expectations
- for above instructions.
- * testsuite/gas/arm/archv8m_1m-cmse-main.s: Add tests for VSCCLRM
- instruction.
- * testsuite/gas/arm/archv8m_1m-cmse-main.d: Add expected disassembly
- for above instructions.
-
-2019-04-15 Thomas Preud'homme <thomas.preudhomme@arm.com>
-
- * config/tc-arm.c (enum reg_list_els): Define earlier and add
- REGLIST_RN and REGLIST_CLRM enumerators.
- (parse_reg_list): Add etype parameter to distinguish between regular
- core register list and CLRM register list. Add logic to
- recognize CLRM register list.
- (parse_vfp_reg_list): Assert type is not for core register list.
- (s_arm_unwind_save_core): Update call to parse_reg_list to new
- prototype.
- (enum operand_parse_code): Declare OP_CLRMLST enumerator.
- (parse_operands): Update call to parse_reg_list to new prototype. Add
- logic for OP_CLRMLST.
- (encode_thumb2_ldmstm): Rename into ...
- (encode_thumb2_multi): This. Add do_io parameter. Add logic to
- encode CLRM and guard LDM/STM only code by do_io.
- (do_t_ldmstm): Adapt to use encode_thumb2_multi.
- (do_t_push_pop): Likewise.
- (do_t_clrm): New function.
- (insns): Define CLRM.
- * testsuite/gas/arm/archv8m_1m-cmse-main-bad.d: New file.
- * testsuite/gas/arm/archv8m_1m-cmse-main-bad.l: Likewise.
- * testsuite/gas/arm/archv8m_1m-cmse-main-bad.s: Likewise.
- * testsuite/gas/arm/archv8m_1m-cmse-main.d: Likewise.
- * testsuite/gas/arm/archv8m_1m-cmse-main.s: Likewise.
-
-2019-04-15 Sudakshina Das <sudi.das@arm.com>
- Andre Vieira <andre.simoesdiasvieira@arm.com>
-
- * config/tc-arm.c (operand_parse_code): Add OP_LR and OP_oLR
- for the LR operand and optional LR operand.
- (parse_operands): Add switch cases for OP_LR and OP_oLR for
- both type checking and value checking.
- (encode_thumb32_addr_mode): New entries for DLS, WLS and LE.
- (v8_1_loop_reloc): New helper function for handling labels
- for the low overhead loop instructions.
- (do_t_loloop): New function to encode DLS, WLS and LE.
- (insns): New entries for WLS, DLS and LE.
- (md_pcrel_from_section): New switch case
- for BFD_RELOC_ARM_THUMB_LOOP12.
- (md_appdy_fix): Likewise.
- (tc_gen_reloc): Likewise.
- * testsuite/gas/arm/armv8_1-m-tloop.s: New.
- * testsuite/gas/arm/armv8_1-m-tloop.d: New.
- * testsuite/gas/arm/armv8_1-m-tloop-bad.s: New.
- * testsuite/gas/arm/armv8_1-m-tloop-bad.d: New.
- * testsuite/gas/arm/armv8_1-m-tloop-bad.l: New.
-
-2019-04-15 Sudakshina Das <sudi.das@arm.com>
- Andre Vieira <andre.simoesdiasvieira@arm.com>
-
- * config/tc-arm.c (T16_32_TAB): New entriy for bfcsel.
- (do_t_v8_1_branch): New switch case for bfcsel.
- (toU): Define.
- (insns): New instruction for bfcsel.
- (md_pcrel_from_section): New switch case
- for BFD_RELOC_THUMB_PCREL_BFCSEL.
- (md_appdy_fix): Likewise
- (tc_gen_reloc): Likewise.
- * testsuite/gas/arm/armv8_1-m-bfcsel.d: New.
- * testsuite/gas/arm/armv8_1-m-bfcsel.s: New.
-
-2019-04-15 Sudakshina Das <sudi.das@arm.com>
-
- * config/tc-arm.c (md_pcrel_from_section): New switch case for
- BFD_RELOC_ARM_THUMB_BF13.
- (md_appdy_fix): Likewise.
- (tc_gen_reloc): Likewise.
-
-2019-04-15 Sudakshina Das <sudi.das@arm.com>
- Andre Vieira <andre.simoesdiasvieira@arm.com>
-
- * config/tc-arm.c (T16_32_TAB): New entrie for bfl.
- (do_t_v8_1_branch): New switch case for bfl.
- (insns): New instruction for bfl.
- * testsuite/gas/arm/armv8_1-m-bfl.d: New.
- * testsuite/gas/arm/armv8_1-m-bfl.s: New.
- * testsuite/gas/arm/armv8_1-m-bfl-bad.s: New.
- * testsuite/gas/arm/armv8_1-m-bfl-bad.d: New.
- * testsuite/gas/arm/armv8_1-m-bfl-bad.l: New.
- * testsuite/gas/arm/armv8_1-m-bfl-rel.d: New.
- * testsuite/gas/arm/armv8_1-m-bfl-rel.s: New.
-
-2019-04-15 Sudakshina Das <sudi.das@arm.com>
-
- * config/tc-arm.c (md_pcrel_from_section): New switch case for
- BFD_RELOC_ARM_THUMB_BF19.
- (md_appdy_fix): Likewise.
- (tc_gen_reloc): Likewise.
-
-2019-04-15 Sudakshina Das <sudi.das@arm.com>
-
- * config/tc-arm.c (T16_32_TAB): New entries for bfx and bflx.
- (do_t_v8_1_branch): New switch cases for bfx and bflx.
- (insns): New instruction for bfx and bflx.
- * testsuite/gas/arm/armv8_1-m-bf-exchange.d: New.
- * testsuite/gas/arm/armv8_1-m-bf-exchange.s: New.
- * testsuite/gas/arm/armv8_1-m-bf-exchange-bad.s: New
- * testsuite/gas/arm/armv8_1-m-bf-exchange-bad.l: New
- * testsuite/gas/arm/armv8_1-m-bf-exchange-bad.d: New
-
-2019-04-15 Sudakshina Das <sudi.das@arm.com>
- Andre Vieira <andre.simoesdiasvieira@arm.com>
-
- * config/tc-arm.c (T16_32_TAB): New entries for bf.
- (do_t_branch_future): New.
- (insns): New instruction for bf.
- * testsuite/gas/arm/armv8_1-m-bf.d: New.
- * testsuite/gas/arm/armv8_1-m-bf.s: New.
- * testsuite/gas/arm/armv8_1-m-bf-bad.s: New.
- * testsuite/gas/arm/armv8_1-m-bf-bad.l: New.
- * testsuite/gas/arm/armv8_1-m-bf-bad.d: New.
- * testsuite/gas/arm/armv8_1-m-bf-rel.d: New.
- * testsuite/gas/arm/armv8_1-m-bf-rel.s: New.
-
-2019-04-15 Sudakshina Das <sudi.das@arm.com>
-
- * config/tc-arm.c (md_pcrel_from_section): New switch case for
- BFD_RELOC_ARM_THUMB_BF17.
- (md_appdy_fix): Likewise.
- (tc_gen_reloc): Likewise.
-
-2019-04-15 Sudakshina Das <sudi.das@arm.com>
-
- * config/tc-arm.c (ARM_IT_MAX_RELOCS): New macro.
- (arm_it): Member reloc renamed relocs and updated to an array.
- Rest: Replace all occurrences of reloc to relocs[0].
-
-2019-04-15 Sudakshina Das <sudi.das@arm.com>
-
- * config/tc-arm.c (md_pcrel_from_section): New switch case
- for BFD_RELOC_THUMB_PCREL_BRANCH5.
- (v8_1_branch_value_check): New function to check branch
- offsets.
- (md_appdy_fix): New switch case for
- BFD_RELOC_THUMB_PCREL_BRANCH5.
- (tc_gen_reloc): Likewise.
-
-2019-04-15 Andre Vieira <andre.simoesdiasvieira@arm.com>
-
- * config/tc-arm.c (do_neon_movhf): Remove fp-armv8 check.
- (armv8_1m_main_ext_table): New extension table.
- (arm_archs): Use the new extension table.
- * doc/c-arm.texi: Add missing arch and document new extensions.
- * testsuite/gas/arm/armv8.1-m.main-fp.d: New.
- * testsuite/gas/arm/armv8.1-m.main-fp-dp.d: New.
- * testsuite/gas/arm/armv8.1-m.main-hp.d: New.
-
-2019-04-15 Thomas Preud'homme <thomas.preudhomme@arm.com>
-
- * config/tc-arm.c (cpu_arch_ver): Add entry for Armv8.1-M Mainline
- Tag_CPU_arch build attribute value. Reindent.
- (get_aeabi_cpu_arch_from_fset): Update assert.
- (aeabi_set_public_attributes): Update assert for Tag_DIV_use logic.
- * testsuite/gas/arm/attr-march-armv8_1-m.main.d: New test.
-
-2019-04-09 Matthew Fortune <matthew.fortune@mips.com>
-
- * config/tc-mips.c (mips_cpu_info_table): Add i6500. Update
- default ASEs for i6400.
- * doc/c-mips.texi (-march): Document i6500.
- * testsuite/gas/mips/elf_mach_i6400.d: New test.
- * testsuite/gas/mips/elf_mach_i6500.d: New test.
- * testsuite/gas/mips/mips.exp: Run the new tests.
-
-2019-04-09 Matthew Fortune <matthew.fortune@mips.com>
-
- * config/tc-mips.c (mips_set_options) <init_ase>: New field.
- (file_mips_opts, mips_opts) <init_ase>: Initialize new field.
- (file_mips_check_options): Propagate initial ASE settings.
- (mips_after_parse_args, parse_code_option): Track the initial
- ASE settings for a CPU.
- (s_mipsset): Restore the initial ASE settings when reverting
- to the default arch.
- * testsuite/gas/mips/elf_mach_p6600.d: New test.
- * testsuite/gas/mips/mips.exp: Run the new test.
-
-2019-04-12 John Darrington <john@darrington.wattle.id.au>
-
- config/tc-s12z.h: Remove definition of macro TC_M68K
-
-2019-04-01 John Darrington <john@darrington.wattle.id.au>
-
- config/tc-s12z.c: Use bfd_boolean where appropriate.
-
-2019-04-11 Max Filippov <jcmvbkbc@gmail.com>
-
- * testsuite/gas/xtensa/loop-relax-2.d: New test definition.
- * testsuite/gas/xtensa/loop-relax.d: New test definition.
- * testsuite/gas/xtensa/loop-relax.s: New test source.
- * testsuite/gas/xtensa/text-section-literals-1a.d: New test
- definition.
- * testsuite/gas/xtensa/text-section-literals-2.d: New test
- definition.
- * testsuite/gas/xtensa/text-section-literals-2.s: New test
- source.
- * testsuite/gas/xtensa/text-section-literals-2a.d: New test
- definition.
- * testsuite/gas/xtensa/text-section-literals-3.d: New test
- definition.
- * testsuite/gas/xtensa/text-section-literals-3.s: New test
- source.
- * testsuite/gas/xtensa/text-section-literals-4.d: New test
- definition.
- * testsuite/gas/xtensa/text-section-literals-4.s: New test
- source.
- * testsuite/gas/xtensa/text-section-literals-4a.d: New test
- definition.
-
-2019-04-11 Max Filippov <jcmvbkbc@gmail.com>
-
- * testsuite/gas/xtensa/all.exp: Remove all expect-based
- tests and all explicit run_dump_test / run_list_test
- invocations. Add run_dump_tests for all .d files in the
- test subdirectory.
- * testsuite/gas/xtensa/entry_align.d: New test definition.
- * testsuite/gas/xtensa/entry_align.l: New test output.
- * testsuite/gas/xtensa/entry_misalign.d: New test definition.
- * testsuite/gas/xtensa/entry_misalign2.d: New test definition.
- * testsuite/gas/xtensa/j_too_far.d: New test definition.
- * testsuite/gas/xtensa/j_too_far.l: New test output.
- * testsuite/gas/xtensa/loop_align.d: New test definition.
- * testsuite/gas/xtensa/loop_misalign.d: New test definition.
- * testsuite/gas/xtensa/trampoline-2.d: New test definition.
- * testsuite/gas/xtensa/trampoline-2.l: Remove empty output.
- * testsuite/gas/xtensa/xtensa-err.exp: Use positive logic.
-
-2019-04-11 Max Filippov <jcmvbkbc@gmail.com>
-
- * config/tc-xtensa.c (xtensa_literal_pseudo): Drop code that has
- no effect.
- (get_literal_pool_location): Only search for the literal pool
- when auto litpools is used, otherwise take one recorded in the
- tc_segment_info_data.
- (xtensa_assign_litpool_addresses): New function.
- (xtensa_move_literals): Don't duplicate 'literal pool location
- required...' error message. Call xtensa_assign_litpool_addresses.
-
-2019-04-11 Max Filippov <jcmvbkbc@gmail.com>
-
- * config/tc-xtensa.c (xtensa_is_init_fini): Add declaration.
- (xtensa_mark_literal_pool_location): Don't add fill frag to literal
- section that records literal pool location.
- (md_begin): Call xtensa_mark_literal_pool_location when text
- section literals or auto litpools are used.
- (xtensa_elf_section_change_hook): Call
- xtensa_mark_literal_pool_location when text section literals or
- auto litpools are used, there's no literal pool location defined
- for the current section and it's not .init or .fini.
- * testsuite/gas/xtensa/auto-litpools-first1.d: Fix up addresses.
- * testsuite/gas/xtensa/auto-litpools-first2.d: Likewise.
- * testsuite/gas/xtensa/auto-litpools.d: Likewise.
-
-2019-04-11 Sudakshina Das <sudi.das@arm.com>
-
- * config/tc-aarch64.c (process_omitted_operand): Add case for
- AARCH64_OPND_Rt_SP.
- (parse_operands): Likewise.
- * testsuite/gas/aarch64/armv8_5-a-memtag.d: Update tests.
- * testsuite/gas/aarch64/armv8_5-a-memtag.s: Likewise.
- * testsuite/gas/aarch64/illegal-memtag.l: Likewise.
- * testsuite/gas/aarch64/illegal-memtag.s: Likewise.
-
-2019-04-11 Sudakshina Das <sudi.das@arm.com>
-
- * testsuite/gas/aarch64/armv8_5-a-memtag.d: New tests for ldgm and stgm.
- * testsuite/gas/aarch64/armv8_5-a-memtag.s: Likewise.
- * testsuite/gas/aarch64/illegal-memtag.l: Likewise.
- * testsuite/gas/aarch64/illegal-memtag.s: Likewise.
-
-2019-04-10 Rainer Orth <ro@CeBiTec.Uni-Bielefeld.DE>
-
- * config/tc-i386.c (need_plt32_p) [TE_SOLARIS]: Return FALSE.
- * testsuite/gas/i386/solaris/solaris.exp: New driver.
- * testsuite/gas/i386/solaris/reloc64.d,
- testsuite/gas/i386/solaris/x86-64-jump.d,
- testsuite/gas/i386/solaris/x86-64-mpx-branch-1.d,
- testsuite/gas/i386/solaris/x86-64-mpx-branch-2.d,
- testsuite/gas/i386/solaris/x86-64-nop-3.d,
- testsuite/gas/i386/solaris/x86-64-nop-4.d,
- testsuite/gas/i386/solaris/x86-64-nop-5.d,
- testsuite/gas/i386/solaris/x86-64-relax-2.d,
- testsuite/gas/i386/solaris/x86-64-relax-3.d: New tests.
- * testsuite/gas/i386/reloc64.d,
- testsuite/gas/i386/x86-64-jump.d,
- testsuite/gas/i386/x86-64-mpx-branch-1.d,
- testsuite/gas/i386/x86-64-mpx-branch-2.d,
- testsuite/gas/i386/x86-64-nop-3.d,
- testsuite/gas/i386/x86-64-nop-4.d,
- testsuite/gas/i386/x86-64-nop-5.d,
- testsuite/gas/i386/x86-64-relax-2.d,
- testsuite/gas/i386/x86-64-relax-3.d: Skip on *-*-solaris*.
-
-2019-04-10 Alan Modra <amodra@gmail.com>
-
- * config/te-cloudabi.h: New file.
- * config/tc-aarch64.c (aarch64_after_parse_args): Use TE_CLOUDABI
- rather than TARGET_OS to select cloudabi.
- * config/tc-i386.h (ELF_TARGET_FORMAT64): Define for TE_CLOUDABI.
- * configure.tgt (*-*-cloudabi*): Set em=cloudabi.
-
-2019-04-09 Robert Suchanek <robert.suchanek@mips.com>
-
- * testsuite/gas/mips/mips.exp: Run hwr-names test.
- * testsuite/gas/mips/hwr-names.s: Add test cases for RDHWR with
- the SEL field.
- * testsuite/gas/mips/mipsr6@hwr-names.d: New file.
-
-2019-04-08 H.J. Lu <hongjiu.lu@intel.com>
-
- * config/tc-i386.c (output_insn): Support
- GNU_PROPERTY_X86_ISA_1_AVX512_BF16.
- * testsuite/gas/i386/property-2.s: Add AVX512_BF16 test.
- * testsuite/gas/i386/property-2.d: Updated.
- * testsuite/gas/i386/x86-64-property-2.d: Likewise.
-
-2019-04-08 H.J. Lu <hongjiu.lu@intel.com>
-
- * configure.tgt: Remove i386-*-kaos* and i386-*-chaos targets.
- * testsuite/gas/i386/i386.exp: Remove *-*-caos* and "*-*-kaos*
- check.
-
-2019-04-05 H.J. Lu <hongjiu.lu@intel.com>
-
- * testsuite/gas/i386/i386.exp: Run -mx86-used-note=yes tests.
- * testsuite/gas/i386/property-2.d: New file.
- * testsuite/gas/i386/property-2.s: Likewise.
- * testsuite/gas/i386/x86-64-property-2.d: Likewise.
-
-2019-04-05 Xuepeng Guo <xuepeng.guo@intel.com>
-
- * config/tc-i386.c (cpu_arch): Add .avx512_bf16.
- (cpu_noarch): Add noavx512_bf16.
- * doc/c-i386.texi: Document avx512_bf16.
- * testsuite/gas/i386/avx512_bf16.d: New file.
- * testsuite/gas/i386/avx512_bf16.s: Likewise.
- * testsuite/gas/i386/avx512_bf16_vl-inval.l: Likewise.
- * testsuite/gas/i386/avx512_bf16_vl-inval.s: Likewise.
- * testsuite/gas/i386/avx512_bf16_vl.d: Likewise.
- * testsuite/gas/i386/avx512_bf16_vl.s: Likewise.
- * testsuite/gas/i386/x86-64-avx512_bf16.d: Likewise.
- * testsuite/gas/i386/x86-64-avx512_bf16.s: Likewise.
- * testsuite/gas/i386/x86-64-avx512_bf16_vl-inval.l: Likesie.
- * testsuite/gas/i386/x86-64-avx512_bf16_vl-inval.s: Likewise.
- * testsuite/gas/i386/x86-64-avx512_bf16_vl.d: Likewise.
- * testsuite/gas/i386/x86-64-avx512_bf16_vl.s: Likewise.
- * testsuite/gas/i386/i386.exp: Add BF16 related tests.
-
-2019-04-05 Alan Modra <amodra@gmail.com>
-
- * testsuite/gas/ppc/bc.s,
- * testsuite/gas/ppc/bcat.d,
- * testsuite/gas/ppc/bcaterr.d,
- * testsuite/gas/ppc/bcaterr.l,
- * testsuite/gas/ppc/bcy.d,
- * testsuite/gas/ppc/bcyerr.d,
- * testsuite/gas/ppc/bcyerr.l: New tests.
- * testsuite/gas/ppc/ppc.exp: Run them.
+2020-02-11 Matthew Malcomson <matthew.malcomson@arm.com>
-2019-04-05 Alan Modra <amodra@gmail.com>
-
- * testsuite/gas/ppc/476.d: Remove trailing spaces.
- * testsuite/gas/ppc/a2.d: Likewise.
- * testsuite/gas/ppc/booke.d: Likewise.
- * testsuite/gas/ppc/booke_xcoff.d: Likewise.
- * testsuite/gas/ppc/e500.d: Likewise.
- * testsuite/gas/ppc/e500mc.d: Likewise.
- * testsuite/gas/ppc/e6500.d: Likewise.
- * testsuite/gas/ppc/htm.d: Likewise.
- * testsuite/gas/ppc/power6.d: Likewise.
- * testsuite/gas/ppc/power8.d: Likewise.
- * testsuite/gas/ppc/power9.d: Likewise.
- * testsuite/gas/ppc/vle.d: Likewise.
-
-2019-04-04 Peter Bergner <bergner@linux.ibm.com>
-
- PR gas/24349
- * testsuite/gas/ppc/power8.s: (bdnztar, bdnztarl, bdztar, bdztarl,
- btar, btarl, bdnztar-, bdnztarl-, bdnztar+, bdnztarl+, bdztar-,
- bdztarl-, bdztar+, bdztarl+, bgetar, bnltar, bgetarl, bnltarl,
- bletar, bngtar, bletarl, bngtarl, bnetar, bnetarl, bnstar, bnutar,
- bnstarl, bnutarl, bgetar-, bnltar-, bgetarl-, bnltarl-, bletar-,
- bngtar-, bletarl-, bngtarl-, bnetar-, bnetarl-, bnstar-, bnutar-,
- bnstarl-, bnutarl-, bgetar+, bnltar+, bgetarl+, bnltarl+, bletar+,
- bngtar+, bletarl+, bngtarl+, bnetar+, bnetarl+, bnstar+, bnutar+,
- bnstarl+, bnutarl+, blttar, blttarl, bgttar, bgttarl, beqtar,
- beqtarl, bsotar, buntar, bsotarl, buntarl, blttar-, blttarl-,
- bgttar-, bgttarl-, beqtar-, beqtarl-, bsotar-, buntar-, bsotarl-,
- buntarl-, blttar+, blttarl+, bgttar+, bgttarl+, beqtar+, beqtarl+,
- bsotar+, buntar+, bsotarl+, buntarl+, bdnzftar, bdnzftarl, bdzftar,
- bdzftarl, bftar, bftarl, bftar-, bftarl-, bftar+, bftarl+, bdnzttar,
- bdnzttarl, bdzttar, bdzttarl, bttar, bttarl, bttar-, bttarl-, bttar+,
- bttarl+): Add tests of extended mnemonics.
- * testsuite/gas/ppc/power8.d: Likewise. Update previous bctar tests
- to expect new extended mnemonics.
- * testsuite/gas/ppc/a2.s: <bc, bc-, bc+, bcl, bcl-, bcl+>: Update test
- to not use illegal BO value. Use a more convenient BI value.
- * testsuite/gas/ppc/a2.d: Update tests for new expect output.
-
-2019-04-03 Max Filippov <jcmvbkbc@gmail.com>
-
- * config/tc-xtensa.c (convert_frag_immed): Drop
- convert_frag_immed_finish_loop invocation.
- (convert_frag_immed_finish_loop): Drop declaration and
- definition.
- * config/xtensa-relax.c (widen_spec_list): Replace loop
- widening that uses addi/addmi with widening that uses l32r
- and const16.
-
-2019-04-01 Andre Vieira <andre.simoesdiasvieira@arm.com>
-
- * config/tc-arm.c (arm_ext_table): New struct type.
- (arm_arch_option_table): Add new 'arm_ext_table' field.
- (ARM_EXT,ARM_ADD,ARM_REMOVE, ALL_FP): New macros.
- (armv5te_ext_table, armv7ve_ext_table, armv7a_ext_table,
- armv7r_ext_table, armv7em_ext_table, armv8a_ext_table,
- armv81a_ext_table, armv82a_ext_table, armv84a_ext_table,
- armv85a_ext_table, armv8m_main_ext_table,
- armv8r_ext_table): New architecture extension tables.
- (ARM_ARCH_OPT): Add new default field.
- (ARM_ARCH_OPT2): New macro.
- (arm_archs): Extend some architectures with the new architecture
- extension tables mentioned above.
- (arm_extensions): Add DEPRECATED comment with instructions to
- use new table.
- (arm_parse_extension): Change to use new extension tables.
- (arm_parse_cpu): Don't change existing behavior.
- (arm_parse_arch): Change to use new extension tables.
- * doc/c-arm.texi: Document new architecture extensions.
- * testsuite/gas/arm/attr-mfpu-neon-fp16.d: Change test to use new
- extension option rather than -mfpu and change expected behaviour to
- sane outputs.
- * testsuite/gas/arm/armv8-2-fp16-scalar-bad-ext.d: New.
- * testsuite/gas/arm/armv8-2-fp16-scalar-ext.d: New.
- * testsuite/gas/arm/armv8-2-fp16-scalar-thumb-ext.d: New.
- * testsuite/gas/arm/armv8-2-fp16-simd-ext.d: New.
- * testsuite/gas/arm/armv8-2-fp16-simd-thumb-ext.d: New.
- * testsuite/gas/arm/armv8-2-fp16-simd-warning-ext.d: New.
- * testsuite/gas/arm/armv8-2-fp16-simd-warning-thumb-ext.d: New.
- * testsuite/gas/arm/armv8_2+rdma-ext.d: New.
- * testsuite/gas/arm/armv8_2-a-fp16-thumb2-ext.d: New.
- * testsuite/gas/arm/armv8_2-a-fp16_ext.d: New.
- * testsuite/gas/arm/armv8_3-a-fp-bad-ext.d: New.
- * testsuite/gas/arm/armv8_3-a-fp-ext.d: New.
- * testsuite/gas/arm/armv8_3-a-fp16-ext.d: New.
- * testsuite/gas/arm/armv8_3-a-simd-bad-ext.d: New.
- * testsuite/gas/arm/armv8_4-a-fp16-ext.d: New.
- * testsuite/gas/arm/armv8m.main+fp.d: New.
- * testsuite/gas/arm/armv8m.main+fp.dp.d: New.
- * testsuite/gas/arm/attr-ext-fpv5-d16.d: New.
- * testsuite/gas/arm/attr-ext-fpv5.d: New.
- * testsuite/gas/arm/attr-ext-idiv.d: New.
- * testsuite/gas/arm/attr-ext-mp.d: New.
- * testsuite/gas/arm/attr-ext-neon-fp16.d: New.
- * testsuite/gas/arm/attr-ext-neon-vfpv3.d: New.
- * testsuite/gas/arm/attr-ext-neon-vfpv4.d: New.
- * testsuite/gas/arm/attr-ext-sec.d: New.
- * testsuite/gas/arm/attr-ext-vfpv3-d16-fp16.d: New.
- * testsuite/gas/arm/attr-ext-vfpv3-d16.d: New.
- * testsuite/gas/arm/attr-ext-vfpv3-fp16.d: New.
- * testsuite/gas/arm/attr-ext-vfpv3.d: New.
- * testsuite/gas/arm/attr-ext-vfpv3xd-fp.d: New.
- * testsuite/gas/arm/attr-ext-vfpv3xd.d: New.
- * testsuite/gas/arm/attr-ext-vfpv4-d16.d: New.
- * testsuite/gas/arm/attr-ext-vfpv4-sp-d16.d: New.
- * testsuite/gas/arm/attr-ext-vfpv4.d: New.
- * testsuite/gas/arm/dotprod-mandatory-ext.d: New.
- * testsuite/gas/arm/fpv5-d16.s: New.
- * testsuite/gas/arm/fpv5-sp-d16.s: New.
-
-2019-03-28 Alan Modra <amodra@gmail.com>
-
- PR 24390
- * testsuite/gas/ppc/476.d: Update mtfsb*.
- * testsuite/gas/ppc/a2.d: Likewise.
-
-2019-03-21 Alan Modra <amodra@gmail.com>
-
- * emul.h (struct emulation): Delete strip_underscore.
- * emul-target.h (emul_strip_underscore): Don't define.
- (emul_struct_name): Update initialization.
-
-2019-03-21 Alan Modra <amodra@gmail.com>
-
- * config/tc-d10v.c (md_apply_fix): Apply BFD_RELOC_8.
- * config/tc-pdp11.c (md_apply_fix): Likewise.
- * config/tc-d30v.c (md_apply_fix): Don't emit errors for BFD_RELOC_8,
- BFD_RELOC_16, and BFD_RELOC_64.
- * testsuite/gas/all/gas.exp: Move target exclusions for forward
- test, but not cr16, to..
- * testsuite/gas/all/forward.d: ..here, with explanation. Remove
- d10v, d30v, and pdp11 xfails.
-
-2019-03-19 H.J. Lu <hongjiu.lu@intel.com>
-
- * config/tc-i386.c (optimize_encoding): Don't check AVX for
- EVEX vector load/store optimization. Check both operands for
- ZMM register. Update EVEX vector load/store opcode check.
- Choose EVEX Disp8 over VEX Disp32.
- * testsuite/gas/i386/optimize-1.d: Updated.
- * testsuite/gas/i386/optimize-1a.d: Likewise.
- * testsuite/gas/i386/optimize-2.d: Likewise.
- * testsuite/gas/i386/optimize-4.d: Likewise.
- * testsuite/gas/i386/optimize-5.d: Likewise.
- * testsuite/gas/i386/x86-64-optimize-2.d: Likewise.
- * testsuite/gas/i386/x86-64-optimize-2a.d: Likewise.
- * testsuite/gas/i386/x86-64-optimize-2b.d: Likewise.
- * testsuite/gas/i386/x86-64-optimize-3.d: Likewise.
- * testsuite/gas/i386/x86-64-optimize-5.d: Likewise.
- * testsuite/gas/i386/x86-64-optimize-6.d: Likewise.
- * testsuite/gas/i386/optimize-1.s: Add ZMM register load
- test.
- * testsuite/gas/i386/x86-64-optimize-2.s: Likewise.
-
-2019-03-19 H.J. Lu <hongjiu.lu@intel.com>
-
- PR gas/24352
- * config/tc-i386.c (optimize_encoding): Check only
- cpu_arch_flags.bitfield.cpuavx512vl.
- * testsuite/gas/i386/i386.exp: Run x86-64-optimize-2b.
- * testsuite/gas/i386/x86-64-optimize-2.d: Revert the last
- change.
- * testsuite/gas/i386/x86-64-optimize-2b.d: New file.
- * testsuite/gas/i386/x86-64-optimize-2b.s: Likewise.
-
-2019-03-19 H.J. Lu <hongjiu.lu@intel.com>
-
- PR gas/24359
- * testsuite/gas/i386/i386.exp: Change optimize-6a, optimize-7,
- x86-64-optimize-7a and x86-64-optimize-8 tests to run_list_test.
- Remove optimize-6c and x86-64-optimize-7c tests.
- * testsuite/gas/i386/noavx-3.l: Updated.
- * testsuite/gas/i386/noavx-4.d: Likewise.
- * testsuite/gas/i386/noavx-5.d: Likewise.
- * testsuite/gas/i386/noavx-3.s: Add AVX512F tests.
- * testsuite/gas/i386/noavx-4.s: Remove AVX512F tests.
- * testsuite/gas/i386/nosse-5.s: Likewise.
- * testsuite/gas/i386/optimize-6a.d: Removed.
- * testsuite/gas/i386/optimize-6c.d: Likewise.
- * testsuite/gas/i386/optimize-7.d: Likewise.
- * testsuite/gas/i386/x86-64-optimize-7a.d: Likewise.
- * testsuite/gas/i386/x86-64-optimize-7c.d: Likewise.
- * testsuite/gas/i386/x86-64-optimize-8.d: Likewise.
- * testsuite/gas/i386/optimize-6a.l: New file.
- * testsuite/gas/i386/optimize-6a.s: Likewise.
- * testsuite/gas/i386/optimize-7.l: Likewise.
- * testsuite/gas/i386/x86-64-optimize-7a.l: Likewise.
- * testsuite/gas/i386/x86-64-optimize-7a.s: Likewise.
- * testsuite/gas/i386/x86-64-optimize-8.l: Likewise.
-
-2019-03-18 Alan Modra <amodra@gmail.com>
-
- * config/m68k-parse.y (yylex): Use temp_ilp and restore_ilp.
- * as.c (macro_expr): Likewise.
- * macro.c (buffer_and_nest): Likewise.
- * read.c (temp_ilp): Remove FIXME.
-
-2019-03-18 H.J. Lu <hongjiu.lu@intel.com>
-
- * testsuite/gas/i386/att-regs.d: Pass -O0 to assembler.
- * testsuite/gas/i386/avx512bw-intel.d: Likewise.
- * testsuite/gas/i386/avx512bw.d: Likewise.
- * testsuite/gas/i386/avx512f-intel.d: Likewise.
- * testsuite/gas/i386/avx512f.d: Likewise.
- * testsuite/gas/i386/disp32.d: Likewise.
- * testsuite/gas/i386/intel-regs.d: Likewise.
- * testsuite/gas/i386/pseudos.d: Likewise.
- * testsuite/gas/i386/x86-64-disp32.d: Likewise.
- * testsuite/gas/i386/x86-64-pseudos.d: Likewise.
-
-2019-03-18 H.J. Lu <hongjiu.lu@intel.com>
-
- PR gas/24348
- * config/tc-i386.c (optimize_encoding): Encode 128-bit and
- 256-bit EVEX vector register load/store instructions as VEX
- vector register load/store instructions for -O1.
- * doc/c-i386.texi: Update -O1 documentation.
- * testsuite/gas/i386/i386.exp: Run PR gas/24348 tests.
- * testsuite/gas/i386/optimize-1.s: Add tests for EVEX vector
- load/store instructions.
- * testsuite/gas/i386/optimize-2.s: Likewise.
- * testsuite/gas/i386/optimize-3.s: Likewise.
- * testsuite/gas/i386/optimize-5.s: Likewise.
- * testsuite/gas/i386/x86-64-optimize-2.s: Likewise.
- * testsuite/gas/i386/x86-64-optimize-3.s: Likewise.
- * testsuite/gas/i386/x86-64-optimize-4.s: Likewise.
- * testsuite/gas/i386/x86-64-optimize-5.s: Likewise.
- * testsuite/gas/i386/x86-64-optimize-6.s: Likewise.
- * testsuite/gas/i386/optimize-1.d: Updated.
- * testsuite/gas/i386/optimize-2.d: Likewise.
- * testsuite/gas/i386/optimize-3.d: Likewise.
- * testsuite/gas/i386/optimize-4.d: Likewise.
- * testsuite/gas/i386/optimize-5.d: Likewise.
- * testsuite/gas/i386/x86-64-optimize-2.d: Likewise.
- * testsuite/gas/i386/x86-64-optimize-3.d: Likewise.
- * testsuite/gas/i386/x86-64-optimize-4.d: Likewise.
- * testsuite/gas/i386/x86-64-optimize-5.d: Likewise.
- * testsuite/gas/i386/x86-64-optimize-6.d: Likewise.
- * testsuite/gas/i386/optimize-7.d: New file.
- * testsuite/gas/i386/optimize-7.s: Likewise.
- * testsuite/gas/i386/x86-64-optimize-8.d: Likewise.
- * testsuite/gas/i386/x86-64-optimize-8.s: Likewise.
-
-2019-03-18 H.J. Lu <hongjiu.lu@intel.com>
-
- * config/tc-i386.c (optimize_encoding): Encode 256-bit/512-bit
- VEX/EVEX vector register clearing instructions with 128-bit VEX
- vector register clearing instructions at -O1.
- * doc/c-i386.texi: Update -O1 and -O2 documentation.
- * testsuite/gas/i386/i386.exp: Run optimize-1a and
- x86-64-optimize-2a.
- * testsuite/gas/i386/optimize-1a.d: New file.
- * testsuite/gas/i386/x86-64-optimize-2a.d: Likewise.
-
-2019-03-17 H.J. Lu <hongjiu.lu@intel.com>
-
- PR gas/24353
- * config/tc-i386.c: Include <limits.h> if it exists and try
- including <sys/param.h> if we have it.
- (INT_MAX): Define if not defined.
- (md_parse_option): Set optimize to INT_MAX for -Os.
- * testsuite/gas/i386/optimize-2.s: Add a test.
- * testsuite/gas/i386/x86-64-optimize-3.s: Likewise.
- * testsuite/gas/i386/optimize-2.d: Updated.
- * testsuite/gas/i386/x86-64-optimize-3.d: Likewise.
-
-2019-03-17 H.J. Lu <hongjiu.lu@intel.com>
-
- PR gas/24352
- * config/tc-i386.c (optimize_encoding): Encode 512-bit EVEX
- with 128-bit VEX encoding only when AVX is enabled and with
- 128-bit EVEX encoding only when AVX512VL is enabled.
- * testsuite/gas/i386/i386.exp: Run PR gas/24352 tests.
- * testsuite/gas/i386/optimize-6.s: New file.
- * testsuite/gas/i386/optimize-6a.d: Likewise.
- * testsuite/gas/i386/optimize-6b.d: Likewise.
- * testsuite/gas/i386/optimize-6c.d: Likewise.
- * testsuite/gas/i386/x86-64-optimize-7.s: Likewise.
- * testsuite/gas/i386/x86-64-optimize-7a.d: Likewise.
- * testsuite/gas/i386/x86-64-optimize-7b.d: Likewise.
- * testsuite/gas/i386/x86-64-optimize-7c.d: Likewise.
- * testsuite/gas/i386/x86-64-optimize-2.d: Updated.
-
-2019-03-15 Li Hao <li.hao296@zte.com.cn>
-
- PR 24308
- * config/tc-i386.c (parse_insn): Check mnemp before using it to
- determine if a suffix can be trimmed.
-
-2019-03-13 Christian Eggers <ceggers@gmx.de>
-
- * dwarf2dbg.c (out_set_addr): Align relocation within .debug_line.
-
-2019-03-13 Christian Eggers <ceggers@gmx.de>
-
- * dwarf2dbg.c (out_debug_line): Pad size of .debug_line section.
-
-2019-03-13 Christian Eggers <ceggers@gmx.de>
-
- * dwarf2dbg.c (out_debug_str): Use octets for .debug_string pointers.
-
-2019-03-13 Christian Eggers <ceggers@gmx.de>
-
- * dwarf2dbg.c (out_debug_line): Use octets for .debug_line prologue.
-
-2019-03-13 Christian Eggers <ceggers@gmx.de>
-
- * dwarf2dbg.c (out_debug_line): Use octets for dwarf2 headers.
- (out_debug_aranges, out_debug_info): Likewise.
+ * config/tc-arm.c (vcx_handle_register_arguments): Remove `for`
+ loop initial declaration.
-2019-03-13 Christian Eggers <ceggers@gmx.de>
+2020-02-10 Matthew Malcomson <matthew.malcomson@arm.com>
- * symbols.h (symbol_temp_new_now_octets): Declare.
- (symbol_set_value_now_octets, symbol_octets_p): Declare.
- * symbols.c (struct symbol_flags): New member sy_octets.
- (symbol_temp_new_now_octets): New function.
- (resolve_symbol_value): Return octets instead of bytes if
- sy_octets is set.
- (symbol_set_value_now_octets): New function.
- (symbol_octets_p): New function.
+ * config/tc-arm.c (NEON_MAX_TYPE_ELS): Increment to account for
+ instructions that can have 5 arguments.
+ (enum operand_parse_code): Add new operands.
+ (parse_operands): Account for new operands.
+ (S5): New macro.
+ (enum neon_shape_el): Introduce P suffixes for coprocessor.
+ (neon_select_shape): Account for P suffix.
+ (LOW1): Move macro to global position.
+ (HI4): Move macro to global position.
+ (vcx_assign_vec_d): New.
+ (vcx_assign_vec_m): New.
+ (vcx_assign_vec_n): New.
+ (enum vcx_reg_type): New.
+ (vcx_get_reg_type): New.
+ (vcx_size_pos): New.
+ (vcx_vec_pos): New.
+ (vcx_handle_shape): New.
+ (vcx_ensure_register_in_range): New.
+ (vcx_handle_register_arguments): New.
+ (vcx_handle_insn_block): New.
+ (vcx_handle_common_checks): New.
+ (do_vcx1): New.
+ (do_vcx2): New.
+ (do_vcx3): New.
+ * testsuite/gas/arm/cde-missing-fp.d: New test.
+ * testsuite/gas/arm/cde-missing-fp.l: New test.
+ * testsuite/gas/arm/cde-missing-mve.d: New test.
+ * testsuite/gas/arm/cde-missing-mve.l: New test.
+ * testsuite/gas/arm/cde-mve-or-neon.d: New test.
+ * testsuite/gas/arm/cde-mve-or-neon.s: New test.
+ * testsuite/gas/arm/cde-mve.s: New test.
+ * testsuite/gas/arm/cde-warnings.l:
+ * testsuite/gas/arm/cde-warnings.s:
+ * testsuite/gas/arm/cde.d:
+ * testsuite/gas/arm/cde.s:
+
+2020-02-10 Stam Markianos-Wright <stam.markianos-wright@arm.com>
+ Matthew Malcomson <matthew.malcomson@arm.com>
+
+ * config/tc-arm.c (arm_ext_cde*): New feature sets for each
+ CDE coprocessor that can be enabled.
+ (enum pred_instruction_type): New pred type.
+ (BAD_NO_VPT): New error message.
+ (BAD_CDE): New error message.
+ (BAD_CDE_COPROC): New error message.
+ (enum operand_parse_code): Add new immediate operands.
+ (parse_operands): Account for new immediate operands.
+ (check_cde_operand): New.
+ (cde_coproc_enabled): New.
+ (cde_coproc_pos): New.
+ (cde_handle_coproc): New.
+ (cxn_handle_predication): New.
+ (do_custom_instruction_1): New.
+ (do_custom_instruction_2): New.
+ (do_custom_instruction_3): New.
+ (do_cx1): New.
+ (do_cx1a): New.
+ (do_cx1d): New.
+ (do_cx1da): New.
+ (do_cx2): New.
+ (do_cx2a): New.
+ (do_cx2d): New.
+ (do_cx2da): New.
+ (do_cx3): New.
+ (do_cx3a): New.
+ (do_cx3d): New.
+ (do_cx3da): New.
+ (handle_pred_state): Define new IT block behaviour.
+ (insns): Add newn CX*{,d}{,a} instructions.
+ (CDE_EXTENSIONS,armv8m_main_ext_table,armv8_1m_main_ext_table):
+ Define new cdecp extension strings.
+ * doc/c-arm.texi: Document new cdecp extension arguments.
+ * testsuite/gas/arm/cde-scalar.d: New test.
+ * testsuite/gas/arm/cde-scalar.s: New test.
+ * testsuite/gas/arm/cde-warnings.d: New test.
+ * testsuite/gas/arm/cde-warnings.l: New test.
+ * testsuite/gas/arm/cde-warnings.s: New test.
+ * testsuite/gas/arm/cde.d: New test.
+ * testsuite/gas/arm/cde.s: New test.
+
+2020-02-10 H.J. Lu <hongjiu.lu@intel.com>
+
+ PR gas/25516
+ * config/tc-i386.c (intel64): Renamed to ...
+ (isa64): This.
+ (match_template): Accept Intel64 only instruction by default.
+ (i386_displacement): Updated.
+ (md_parse_option): Updated.
+ * c-i386.texi: Update -mamd64/-mintel64 documentation.
+ * testsuite/gas/i386/i386.exp: Run x86-64-sysenter. Pass
+ -mamd64 to x86-64-sysenter-amd.
+ * testsuite/gas/i386/x86-64-sysenter.d: New file.
+
+2020-02-10 Alan Modra <amodra@gmail.com>
+
+ * config/obj-elf.c (obj_elf_change_section): Error for section
+ type, attr or entsize changes in assembly.
+ * testsuite/gas/elf/elf.exp: Pass -Z to gas for section5 test.
+ * testsuite/gas/elf/section5.l: Update.
+
+2020-02-10 Alan Modra <amodra@gmail.com>
+
+ * output-file.c (output_file_close): Do a normal close when
+ flag_always_generate_output.
+ * write.c (write_object_file): Don't stop output when
+ flag_always_generate_output.
+
+2020-02-07 Sergey Belyashov <sergey.belyashov@gmail.com>
+
+ PR 25469
+ * config/tc-z80.c: Add -gbz80 command line option to generate code
+ for the GameBoy Z80. Add support for generating DWARF.
+ * config/tc-z80.h: Add support for DWARF debug information
+ generation.
+ * doc/c-z80.texi: Document new command line option.
+ * testsuite/gas/z80/gbz80_all.d: New file.
+ * testsuite/gas/z80/gbz80_all.s: New file.
+ * testsuite/gas/z80/z80.exp: Run the new tests.
+ * testsuite/gas/z80/z80n_all.d: New file.
+ * testsuite/gas/z80/z80n_all.s: New file.
+ * testsuite/gas/z80/z80n_reloc.d: New file.
+
+2020-02-06 H.J. Lu <hongjiu.lu@intel.com>
+
+ PR gas/25381
+ * config/obj-elf.c (get_section): Also check
+ linked_to_symbol_name.
+ (obj_elf_change_section): Also set map_head.linked_to_symbol_name.
+ (obj_elf_parse_section_letters): Handle the 'o' flag.
+ (build_group_lists): Renamed to ...
+ (build_additional_section_info): This. Set elf_linked_to_section
+ from map_head.linked_to_symbol_name.
+ (elf_adjust_symtab): Updated.
+ * config/obj-elf.h (elf_section_match): Add linked_to_symbol_name.
+ * doc/as.texi: Document the 'o' flag.
+ * testsuite/gas/elf/elf.exp: Run PR gas/25381 tests.
+ * testsuite/gas/elf/section18.d: New file.
+ * testsuite/gas/elf/section18.s: Likewise.
+ * testsuite/gas/elf/section19.d: Likewise.
+ * testsuite/gas/elf/section19.s: Likewise.
+ * testsuite/gas/elf/section20.d: Likewise.
+ * testsuite/gas/elf/section20.s: Likewise.
+ * testsuite/gas/elf/section21.d: Likewise.
+ * testsuite/gas/elf/section21.l: Likewise.
+ * testsuite/gas/elf/section21.s: Likewise.
+
+2020-02-06 H.J. Lu <hongjiu.lu@intel.com>
+
+ * NEWS: Mention x86 assembler options to align branches for
+ binutils 2.34.
+
+2020-02-06 H.J. Lu <hongjiu.lu@intel.com>
+
+ * testsuite/gas/i386/i386.exp: Run unique and x86-64-unique
+ only for ELF targets.
+ * testsuite/gas/i386/unique.d: Don't xfail.
+ * testsuite/gas/i386/x86-64-unique.d: Likewise.
+
+2020-02-06 Alan Modra <amodra@gmail.com>
+
+ * testsuite/gas/i386/unique.d: xfail for non-elf targets.
+ * testsuite/gas/i386/x86-64-unique.d: Likewise.
+
+2020-02-06 Alan Modra <amodra@gmail.com>
+
+ * testsuite/gas/elf/section12a.d: Use supports_gnu_osabi in
+ xfail, and rename test.
+ * testsuite/gas/elf/section12b.d: Likewise.
+ * testsuite/gas/elf/section16a.d: Likewise.
+ * testsuite/gas/elf/section16b.d: Likewise.
+
+2020-02-02 H.J. Lu <hongjiu.lu@intel.com>
+
+ PR gas/25380
+ * config/obj-elf.c (section_match): Removed.
+ (get_section): Also match SEC_ASSEMBLER_SECTION_ID and
+ section_id.
+ (obj_elf_change_section): Replace info and group_name arguments
+ with match_p. Also update the section ID and flags from match_p.
+ (obj_elf_section): Handle "unique,N". Update call to
+ obj_elf_change_section.
+ * config/obj-elf.h (elf_section_match): New.
+ (obj_elf_change_section): Updated.
+ * config/tc-arm.c (start_unwind_section): Update call to
+ obj_elf_change_section.
+ * config/tc-ia64.c (obj_elf_vms_common): Likewise.
+ * config/tc-microblaze.c (microblaze_s_data): Likewise.
+ (microblaze_s_sdata): Likewise.
+ (microblaze_s_rdata): Likewise.
+ (microblaze_s_bss): Likewise.
+ * config/tc-mips.c (s_change_section): Likewise.
+ * config/tc-msp430.c (msp430_profiler): Likewise.
+ * config/tc-rx.c (parse_rx_section): Likewise.
+ * config/tc-tic6x.c (tic6x_start_unwind_section): Likewise.
+ * doc/as.texi: Document "unique,N" in .section directive.
+ * testsuite/gas/elf/elf.exp: Run "unique,N" tests.
+ * testsuite/gas/elf/section15.d: New file.
+ * testsuite/gas/elf/section15.s: Likewise.
+ * testsuite/gas/elf/section16.s: Likewise.
+ * testsuite/gas/elf/section16a.d: Likewise.
+ * testsuite/gas/elf/section16b.d: Likewise.
+ * testsuite/gas/elf/section17.d: Likewise.
+ * testsuite/gas/elf/section17.l: Likewise.
+ * testsuite/gas/elf/section17.s: Likewise.
+ * testsuite/gas/i386/unique.d: Likewise.
+ * testsuite/gas/i386/unique.s: Likewise.
+ * testsuite/gas/i386/x86-64-unique.d: Likewise.
+ * testsuite/gas/i386/i386.exp: Run unique and x86-64-unique.
+
+2020-02-02 H.J. Lu <hongjiu.lu@intel.com>
+
+ * testsuite/gas/elf/section13.s: Replace @nobits with %nobits.
+
+2020-02-01 Anthony Green <green@moxielogic.com>
+
+ * config/tc-moxie.c (md_begin): Don't force big-endian mode.
+
+2020-01-31 Sandra Loosemore <sandra@codesourcery.com>
+
+ * config/tc-nios2.c (nios2_cons): Handle %gotoff as well as
+ %tls_ldo.
+
+2020-01-31 Andre Vieira <andre.simoesdiasvieira@arm.com>
+
+ PR gas/25472
+ * config/tc-arm.c (armv8m_main_ext_table): Refactored +dsp adding.
+ (armv8_1m_main_ext_table): Refactored +dsp adding and enabled dsp for
+ +mve.
+ * testsuite/gas/arm/mve_dsp.d: New test.
+
+2020-01-31 Nick Clifton <nickc@redhat.com>
+
+ * config/tc-s390.c (s390_elf_suffix): Return ELF_SUFFIX_NONE
+ rather than BFD_RELOC_NONE.
+
+2020-01-31 Srinath Parvathaneni <srinath.parvathaneni@arm.com>
+
+ * config/tc-arm.c (fldmias): Moved inside "THUMB_VARIANT & arm_ext_v6t2"
+ to support VLDMIA instruction for MVE.
+ (fldmdbs): Moved inside "THUMB_VARIANT & arm_ext_v6t2" to support VLDMDB
+ instruction for MVE.
+ (fstmias): Moved inside "THUMB_VARIANT & arm_ext_v6t2" to support VSTMIA
+ instruction for MVE.
+ (fstmdbs): Moved inside "THUMB_VARIANT & arm_ext_v6t2" to support VSTMDB
+ instruction for MVE.
+ * testsuite/gas/arm/mve-ldst.d: New test.
+ * testsuite/gas/arm/mve-ldst.s: Likewise.
+
+2020-01-31 Nick Clifton <nickc@redhat.com>
-2019-03-13 Christian Eggers <ceggers@gmx.de>
+ * po/fr.po: Updated French translation.
+ * po/ru.po: Updated Russian translation.
- * dwarf2dbg.c (dwarf2_emit_insn): Fix calculation of line info offset.
+2020-01-31 Richard Sandiford <richard.sandiford@arm.com>
-2019-03-12 Andreas Krebbel <krebbel@linux.ibm.com>
+ * testsuite/gas/aarch64/sve-bfloat-movprfx.s: Use .h rather than
+ .s for the movprfx.
+ * testsuite/gas/aarch64/sve-bfloat-movprfx.d: Update accordingly.
+ * testsuite/gas/aarch64/sve-movprfx_28.d,
+ * testsuite/gas/aarch64/sve-movprfx_28.l,
+ * testsuite/gas/aarch64/sve-movprfx_28.s: New test.
- * testsuite/gas/s390/zarch-arch13.s: Adjust testcase to optable changes.
- * testsuite/gas/s390/zarch-arch13.d: Likewise.
+2020-01-30 Jan Beulich <jbeulich@suse.com>
-2019-02-27 Matthew Malcomson <matthew.malcomson@arm.com>
+ * config/tc-i386.c (output_disp): Tighten base_opcode check.
+ * testsuite/gas/i386/got.s: Add LSL, MOVLPS, and BNDCN cases.
+ * testsuite/gas/i386/got-no-relax.d, testsuite/gas/i386/got.d:
+ Adjust expectations.
- * testsuite/gas/aarch64/dotproduct.d: Use multiple "as" lines.
- * testsuite/gas/aarch64/dotproduct_armv8_4.d: Remove.
- * testsuite/gas/aarch64/dotproduct_armv8_4.s: Remove.
- * testsuite/gas/aarch64/illegal-dotproduct.d: Use multiple "as"
- lines.
- * testsuite/gas/aarch64/ldst-rcpc-armv8_2.d: Remove.
- * testsuite/gas/aarch64/ldst-rcpc.d: Use multiple "as" lines.
+2020-01-30 Jose E. Marchesi <jose.marchesi@oracle.com>
-2019-02-24 Alan Modra <amodra@gmail.com>
+ * testsuite/gas/bpf/alu.d: Update expected opcode for `neg'.
+ * testsuite/gas/bpf/alu-be.d: Likewise.
+ * testsuite/gas/bpf/alu32.d: Likewise for `neg32'.
+ * testsuite/gas/bpf/alu32-be.d: Likewise.
- * config/tc-ppc.c (parse_tls_arg): Wrap in #ifdef OBJ_ELF.
+2020-01-30 Jan Beulich <jbeulich@suse.com>
+
+ * testsuite/gas/i386/x86-64-branch-2.s,
+ testsuite/gas/i386/x86-64-branch-4.s,
+ testsuite/gas/i386/x86-64-branch.s: Add RETW cases.
+ * testsuite/gas/i386/ilp32/x86-64-branch.d,
+ testsuite/gas/i386/x86-64-branch-2.d,
+ testsuite/gas/i386/x86-64-branch-4.l,
+ testsuite/gas/i386/x86-64-branch.d: Adjust expectations.
+
+2020-01-30 Jan Beulich <jbeulich@suse.com>
+
+ * config/tc-i386.c (process_suffix): .
+ testsuite/gas/i386/noreg64.s: Add IRET and LRET cases.
+ testsuite/gas/i386/x86-64-opcode.s: Add suffix to IRET and LRET.
+ Add LRETQ case.
+ testsuite/gas/i386/x86-64-suffix.s: Drop IRET case without
+ suffix.
+ testsuite/gas/i386/x86_64.s: Add RETF cases.
+ * testsuite/gas/i386/k1om.d, testsuite/gas/i386/l1om.d,
+ testsuite/gas/i386/noreg64.d, testsuite/gas/i386/noreg64.l,
+ testsuite/gas/i386/x86-64-opcode.d,
+ testsuite/gas/i386/x86-64-suffix-intel.d,
+ testsuite/gas/i386/x86-64-suffix.d,
+ testsuite/gas/i386/x86_64-intel.d
+ testsuite/gas/i386/x86_64.d: Adjust expectations.
+ * testsuite/gas/i386/x86-64-suffix.e,
+ testsuite/gas/i386/x86_64.e: New.
+
+2020-01-30 Jan Beulich <jbeulich@suse.com>
+
+ * config/tc-i386.c (process_suffix): Redo and move FLDENV et al
+ special case.
+
+2020-01-27 H.J. Lu <hongjiu.lu@intel.com>
+
+ PR binutils/25445
+ * config/tc-i386.c (check_long_reg): Also convert to QWORD for
+ movsxd.
+ * doc/c-i386.texi: Add a node for AMD64 vs. Intel64 ISA
+ differences. Document movslq and movsxd.
+ * testsuite/gas/i386/i386.exp: Run PR binutils/25445 tests.
+ * testsuite/gas/i386/x86-64-movsxd-intel.d: New file.
+ * testsuite/gas/i386/x86-64-movsxd-intel64-intel.d: Likewise.
+ * testsuite/gas/i386/x86-64-movsxd-intel64-inval.l: Likewise.
+ * testsuite/gas/i386/x86-64-movsxd-intel64-inval.s: Likewise.
+ * testsuite/gas/i386/x86-64-movsxd-intel64.d: Likewise.
+ * testsuite/gas/i386/x86-64-movsxd-intel64.s: Likewise.
+ * testsuite/gas/i386/x86-64-movsxd-inval.l: Likewise.
+ * testsuite/gas/i386/x86-64-movsxd-inval.s: Likewise.
+ * testsuite/gas/i386/x86-64-movsxd.d: Likewise.
+ * testsuite/gas/i386/x86-64-movsxd.s: Likewise.
+
+2020-01-27 Alan Modra <amodra@gmail.com>
+
+ * testsuite/gas/all/gas.exp: Replace case statements with switch
+ statements.
+ * testsuite/gas/elf/elf.exp: Likewise.
+ * testsuite/gas/macros/macros.exp: Likewise.
+ * testsuite/lib/gas-defs.exp: Likewise.
+
+2020-01-27 Tamar Christina <tamar.christina@arm.com>
+
+ PR 25403
+ * testsuite/gas/aarch64/armv8_4-a.d: Add cfinv.
+ * testsuite/gas/aarch64/armv8_4-a.s: Likewise.
+
+2020-01-22 Maxim Blinov <maxim.blinov@embecosm.com>
+
+ * testsuite/gas/riscv/march-ok-s.d: sx is no longer valid and
+ s exts must be known, so rename *ok* to *fail*.
+ * testsuite/gas/riscv/march-ok-sx.d: Likewise.
+ * testsuite/gas/riscv/march-ok-s-with-version: Likewise.
+ * testsuite/gas/riscv/march-fail-s.l: Expected error messages for
+ above change.
+ * testsuite/gas/riscv/march-fail-sx.l: Likewise.
+ * testsuite/gas/riscv/march-fail-sx-with-version.l: Likewise.
+
+2020-01-22 H.J. Lu <hongjiu.lu@intel.com>
+
+ PR gas/25438
+ * config/tc-i386.c (check_long_reg): Always disallow double word
+ suffix in mnemonic with word general register.
+ * testsuite/gas/i386/general.s: Replace word general register
+ with double word general register for movl.
+ * testsuite/gas/i386/inval.s: Add tests for movl with word general
+ register.
+ * testsuite/gas/i386/general.l: Updated.
+ * testsuite/gas/i386/inval.l: Likewise.
+
+2020-01-22 Alan Modra <amodra@gmail.com>
+
+ * config/tc-ppc.c (parse_tls_arg): Handle tls arg for
+ __tls_get_addr_desc and __tls_get_addr_opt.
+
+2020-01-21 Jan Beulich <jbeulich@suse.com>
+
+ * testsuite/gas/i386/inval-crc32.s,
+ testsuite/gas/i386/x86-64-inval-crc32.s: Add alignment directive.
+ * testsuite/gas/i386/inval-crc32.l,
+ testsuite/gas/i386/x86-64-inval-crc32.l: Adjust expectations.
+
+2020-01-21 Jan Beulich <jbeulich@suse.com>
+
+ * config/tc-i386.c (process_suffix): Merge CRC32 handling into
+ generic code path. Deal with No_lSuf being set in a template.
+ * testsuite/gas/i386/inval-crc32.l,
+ testsuite/gas/i386/x86-64-inval-crc32.l: Expect warning(s)
+ instead of error(s) when operand size is ambiguous.
+ * testsuite/gas/i386/noreg16.s, testsuite/gas/i386/noreg32.s,
+ testsuite/gas/i386/noreg64.s: Add CRC32 tests.
+ * testsuite/gas/i386/noreg16.d, testsuite/gas/i386/noreg16.l,
+ testsuite/gas/i386/noreg32.d, testsuite/gas/i386/noreg32.l,
+ testsuite/gas/i386/noreg64.d, testsuite/gas/i386/noreg64.l:
+ Adjust expectations.
+
+2020-01-21 Jan Beulich <jbeulich@suse.com>
+
+ * config/tc-i386.c (process_suffix): Drop SYSRET special case
+ and an intel_syntax check. Re-write lack-of-suffix processing
+ logic.
+ * doc/c-i386.texi: Document operand size defaults for suffix-
+ less AT&T syntax insns.
+ * testsuite/gas/i386/bundle.s, testsuite/gas/i386/lock-1.s,
+ testsuite/gas/i386/opcode.s, testsuite/gas/i386/sse3.s,
+ testsuite/gas/i386/x86-64-avx-scalar.s,
+ testsuite/gas/i386/x86-64-avx.s,
+ testsuite/gas/i386/x86-64-bundle.s,
+ testsuite/gas/i386/x86-64-intel64.s,
+ testsuite/gas/i386/x86-64-lock-1.s,
+ testsuite/gas/i386/x86-64-opcode.s,
+ testsuite/gas/i386/x86-64-sse2avx.s,
+ testsuite/gas/i386/x86-64-sse3.s: Add missing suffixes.
+ * testsuite/gas/i386/nops.s, testsuite/gas/i386/sse-noavx.s,
+ testsuite/gas/i386/x86-64-nops.s,
+ testsuite/gas/i386/x86-64-ptwrite.s,
+ testsuite/gas/i386/x86-64-simd.s,
+ testsuite/gas/i386/x86-64-sse-noavx.s,
+ testsuite/gas/i386/x86-64-suffix.s: Drop bogus suffix-less
+ insns.
+ * testsuite/gas/i386/noreg16.s, testsuite/gas/i386/noreg32.s,
+ testsuite/gas/i386/noreg64.s: Add further tests.
+ * testsuite/gas/i386/ilp32/x86-64-nops.d,
+ testsuite/gas/i386/nops.d, testsuite/gas/i386/noreg16.d,
+ testsuite/gas/i386/noreg32.d, testsuite/gas/i386/noreg64.d,
+ testsuite/gas/i386/sse-noavx.d,
+ testsuite/gas/i386/x86-64-intel64.d,
+ testsuite/gas/i386/x86-64-nops.d,
+ testsuite/gas/i386/x86-64-opcode.d,
+ testsuite/gas/i386/x86-64-ptwrite-intel.d,
+ testsuite/gas/i386/x86-64-ptwrite.d,
+ testsuite/gas/i386/x86-64-simd-intel.d,
+ testsuite/gas/i386/x86-64-simd-suffix.d,
+ testsuite/gas/i386/x86-64-simd.d,
+ testsuite/gas/i386/x86-64-sse-noavx.d
+ testsuite/gas/i386/x86-64-suffix.d,
+ testsuite/gas/i386/x86-64-suffix-intel.d: Adjust expectations.
+ * testsuite/gas/i386/noreg16.l, testsuite/gas/i386/noreg32.l,
+ testsuite/gas/i386/noreg64.l: New.
+ * testsuite/gas/i386/i386.exp: Run new tests.
-2019-02-24 Alan Modra <amodra@gmail.com>
+2020-01-21 Jan Beulich <jbeulich@suse.com>
- PR 24144
- * config/obj-aout.c (obj_aout_frob_file_before_fix): Write to end
- of section to ensure file contents cover aligned section size.
+ * testsuite/gas/i386/avx512_bf16_vl.s,
+ testsuite/gas/i386/x86-64-avx512_bf16_vl.s: Add broadcast forms
+ of VCVTNEPS2BF16{X,Y}. Add operand-size less Intel syntax
+ broadcast forms of VCVTNEPS2BF16.
+ * testsuite/gas/i386/avx512_bf16_vl.d,
+ testsuite/gas/i386/x86-64-avx512_bf16_vl.d: Adjust expectations.
-2019-02-22 Kyrylo Tkachov <kyrylo.tkachov@arm.com>
+2020-01-20 Nick Clifton <nickc@redhat.com>
- * config/tc-arm.c (arm_cpus): Add neoverse-n1.
- * doc/c-arm.texi (-mcpu): Document neoverse-n1 value.
+ * po/uk.po: Updated Ukranian translation.
-2019-02-22 Kyrylo Tkachov <kyrylo.tkachov@arm.com>
+2020-01-20 H.J. Lu <hongjiu.lu@intel.com>
- * config/tc-aarch64.c (aarch64_cpus): Add neoverse-e1.
- * doc/c-aarch64.texi (-mcpu): Document neoverse-e1 value.
+ PR ld/25416
+ * config/tc-i386.c (output_insn): Add a dummy REX_OPCODE prefix
+ for lea with R_X86_64_GOTPC32_TLSDESC relocation when generating
+ x32 object.
+ * testsuite/gas/i386/ilp32/x32-tls.d: Updated.
+ * testsuite/gas/i386/ilp32/x32-tls.s: Add tests for lea with
+ R_X86_64_GOTPC32_TLSDESC relocation.
-2019-02-22 Kyrylo Tkachov <kyrylo.tkachov@arm.com>
+2020-01-18 Nick Clifton <nickc@redhat.com>
- * config/tc-aarch64.c (aarch64_cpus): Add neoverse-n1.
- * doc/c-aarch64.texi (-mcpu): Document neoverse-n1 value.
+ * configure: Regenerate.
+ * po/gas.pot: Regenerate.
-2019-02-19 Paul Hua <paul.hua.gm@gmail.com>
+2020-01-18 Nick Clifton <nickc@redhat.com>
- * NEWS: Mention -m[no-]fix-loongson3-llsc.
- * configure.ac: Add --enable-mips-fix-loongson3-llsc.
- Define DEFAULT_MIPS_FIX_LOONGSON3_LLSC.
- * config.in: Regenerated.
- * configure: Likewise.
- * config/tc-mips.c (sync_insn, mips_fix_loongson3_llsc):
- New variables.
- (options): New OPTION_FIX_LOONGSON3_LLSC,
- OPTION_NO_FIX_LOONGSON3_LLSC.
- (md_longopts): Add -m[no-]fix-loongson3-llsc.
- (md_begin): Initialize sync insn.
- (fix_loongson3_llsc): New.
- (append_insn): Call fix_loongson3_llsc.
- (md_parse_option): Handle OPTION_FIX_LOONGSON3_LLSC,
- OPTION_NO_FIX_LOONGSON3_LLSC.
- (md_show_usage): Display -m[no-]fix-loongson3-llsc.
- * doc/c-mips.texi: Document -m[no-]fix-loongson3-llsc,
- --enable-mips-fix-loongson3-llsc=[yes|no].
-
-2019-02-10 H.J. Lu <hongjiu.lu@intel.com>
-
- PR gas/24165
- * frags.c (frag_var_init): Pass max_chars to TC_FRAG_INIT as
- max_bytes.
- * config/tc-aarch64.h (TC_FRAG_INIT): Add and pass max_bytes to
- aarch64_init_frag.
- * /config/tc-arm.h (TC_FRAG_INIT): And and pass max_bytes to
- arm_init_frag.
- * config/tc-avr.h (TC_FRAG_INIT): And and ignore max_bytes.
- * config/tc-ia64.h (TC_FRAG_INIT): Likewise.
- * config/tc-mmix.h (TC_FRAG_INIT): Likewise.
- * config/tc-nds32.h (TC_FRAG_INIT): Likewise.
- * config/tc-ns32k.h (TC_FRAG_INIT): Likewise.
- * config/tc-rl78.h (TC_FRAG_INIT): Likewise.
- * config/tc-rx.h (TC_FRAG_INIT): Likewise.
- * config/tc-score.h (TC_FRAG_INIT): Likewise.
- * config/tc-tic54x.h (TC_FRAG_INIT): Likewise.
- * config/tc-tic6x.h (TC_FRAG_INIT): Likewise.
- * config/tc-xtensa.h (TC_FRAG_INIT): Likewise.
- * config/tc-i386.h (MAX_MEM_FOR_RS_ALIGN_CODE): Set to
- (alignment ? ((1 << alignment) - 1) : 1)
- (i386_tc_frag_data): Add max_bytes.
- (TC_FRAG_INIT): Add and track max_bytes.
- (HANDLE_ALIGN): Replace MAX_MEM_FOR_RS_ALIGN_CODE with
- fragP->tc_frag_data.max_bytes.
- * doc/internals.texi: Update TC_FRAG_TYPE with max_bytes.
-
-2019-02-08 Jim Wilson <jimw@sifive.com>
-
- * config/tc-riscv.c (validate_riscv_insn) <'C'>: Add 'z' support.
- (riscv_ip) <'C'>: Add 'z' support.
-
-2019-02-07 Tamar Christina <tamar.christina@arm.com>
-
- * config/tc-arm.c (insns): Redefine THUMB_VARIANT and ARM_VARIANT for
- hlt to armv1.
- * testsuite/gas/arm/armv8a-automatic-hlt.d: Update TAGs
- * testsuite/gas/arm/hlt.d: New test.
- * testsuite/gas/arm/hlt.s: New test.
-
-2019-02-07 Tamar Christina <tamar.christina@arm.com>
-
- * testsuite/gas/aarch64/undefined_advsimd_armv8_3.d: New test.
- * testsuite/gas/aarch64/undefined_advsimd_armv8_3.s: New test.
-
-2019-02-07 Tamar Christina <tamar.christina@arm.com>
-
- PR binutils/23212
- * testsuite/gas/aarch64/undefined_by_elem_sz_l.s: New test.
- * testsuite/gas/aarch64/undefined_by_elem_sz_l.d: New test.
-
-2019-02-07 Eric Botcazou <ebotcazou@adacore.com>
-
- * config/tc-visium.c (md_assemble) <mode_cad>: Align instruction on
- 64-bit boundaries for the GR6.
- * testsuite/gas/visium/allinsn_gr6.s: Tweak.
- * testsuite/gas/visium/allinsn_gr6.d: Likewise.
- * testsuite/gas/visium/bra-1.d: New test.
- * testsuite/gas/visium/bra-1.s: Likewise.
- * testsuite/gas/visium/visium.exp: Run bra-1 test.
-
-2019-01-31 John Darrington <john@darrington.wattle.id.au>
-
- * config/tc-s12z.c (lex_imm): Add new argument exp_o.
- (emit_reloc): New function.
- (md_apply_fix): [BFD_RELOC_S12Z_OPR] Recognise that it
- can be either 2 bytes or 3 bytes long.
- * testsuite/gas/s12z/mov-imm-reloc.d: New file.
- * testsuite/gas/s12z/mov-imm-reloc.s: New file.
- * testsuite/gas/s12z/s12z.exp: Add them.
-
-2019-01-31 John Darrington <john@darrington.wattle.id.au>
-
- * config/tc-s12z.c (md_apply_fix): Fix incorrect limits.
- * testsuite/gas/s12z/pc-rel-bad.d: New file.
- * testsuite/gas/s12z/pc-rel-bad.l: New file.
- * testsuite/gas/s12z/pc-rel-bad.s: New file.
- * testsuite/gas/s12z/pc-rel-good.d: New file.
- * testsuite/gas/s12z/pc-rel-good.s: New file.
- * testsuite/gas/s12z/s12z.exp: Add them.
-
-2019-01-31 John Darrington <john@darrington.wattle.id.au>
-
- * config/tc-s12z.c (tfr): Emit warning if operands are the same.
- * testsuite/gas/s12z/exg.d: New test case.
- * testsuite/gas/s12z/exg.l: New file.
-
-2019-01-31 John Darrington <john@darrington.wattle.id.au>
-
- * config/tc-s12z.c (lex_opr): Add a parameter to indicate whether
- immediate mode operands should be permitted.
- * testsuite/s12z/imm-dest.d: New file.
- * testsuite/s12z/imm-dest.l: New file.
- * testsuite/s12z/imm-dest.s: New file.
- * testsuite/s12z/s12z.exp: Add them.
-
-2019-01-31 Andreas Krebbel <krebbel@linux.ibm.com>
-
- * config/tc-s390.c (s390_parse_cpu): New entry for arch13.
- * doc/c-s390.texi: Document arch13 march option.
- * testsuite/gas/s390/s390.exp: Run the arch13 related tests.
- * testsuite/gas/s390/zarch-arch13.d: New test.
- * testsuite/gas/s390/zarch-arch13.s: New test.
- * testsuite/gas/s390/zarch-z13.d: Expect the renamed mnemonics
- also for z13.
-
-2019-01-31 Alan Modra <amodra@gmail.com>
-
- * config/tc-alpha.c (md_apply_fix): Correct range checks for
- BFD_RELOC_ALPHA_NOP, BFD_RELOC_ALPHA_LDA, BFD_RELOC_ALPHA_BSR.
- * config/tc-arm.c (md_apply_fix): Use llabs rather than abs.
- * config/tc-csky.c (get_macro_reg_vals): Pass s to csky_show_error.
-
-2019-01-28 Max Filippov <jcmvbkbc@gmail.com>
+ Binutils 2.34 branch created.
- * config/tc-xtensa.c (md_apply_fix): Mark fixups for constant
- symbols as done in md_apply_fix.
- * testsuite/gas/all/forward.d: Don't XFAIL for xtensa.
+2020-01-17 H.J. Lu <hongjiu.lu@intel.com>
-2019-01-28 Nick Clifton <nickc@redhat.com>
+ * config/tc-i386.c (_i386_insn): Replace vex_encoding_vex2
+ with vex_encoding_vex.
+ (parse_insn): Likewise.
+ * doc/c-i386.texi: Replace {vex2} with {vex}. Update {vex}
+ and {vex3} documentation.
+ * testsuite/gas/i386/pseudos.s: Replace 3 {vex2} tests with
+ {vex}.
+ * testsuite/gas/i386/x86-64-pseudos.s: Likewise.
- * po/fr.po: Updated French translation.
- * po/ru.po: Updated Russian translation.
+2020-01-16 Andre Vieira <andre.simoesdiasvieira@arm.com>
-2019-01-28 Alan Modra <amodra@gmail.com>
+ PR 25376
+ * config/tc-arm.c (mve_ext, mve_fp_ext): Use CORE_HIGH.
+ (armv8_1m_main_ext_table): Use CORE_HIGH for mve.
+ * testsuite/arm/armv8_1-m-fpu-mve-1.s: New.
+ * testsuite/arm/armv8_1-m-fpu-mve-1.d: New.
+ * testsuite/arm/armv8_1-m-fpu-mve-2.s: New.
+ * testsuite/arm/armv8_1-m-fpu-mve-2.d: New.
- * configure.ac (ac_checking): Set from bfd/development.sh
- development variable.
- * configure: Regenerate.
+2020-01-16 Jan Beulich <jbeulich@suse.com>
-2019-01-25 Sudakshina Das <sudi.das@arm.com>
+ * config/tc-i386.c (match_template): Drop found_cpu_match local
+ variable.
- * config/tc-aarch64.c (warn_unpredictable_ldst): Exempt
- stg, st2g, stzg and stz2g from Xt == Xn with writeback warning.
- * testsuite/gas/aarch64/armv8_5-a-memtag.d: Change tests for
- stg, stzg, st2g and stz2g.
- * testsuite/gas/aarch64/armv8_5-a-memtag.s: Likewise.
- * testsuite/gas/aarch64/illegal-memtag.l: Likewise.
- * testsuite/gas/aarch64/illegal-memtag.s: Likewise.
+2020-01-16 Jan Beulich <jbeulich@suse.com>
-2019-01-25 Sudakshina Das <sudi.das@arm.com>
+ * testsuite/gas/i386/avx512dq-inval.l,
+ testsuite/gas/i386/avx512dq-inval.s: New.
+ * testsuite/gas/i386/i386.exp: Run new test.
- * testsuite/gas/aarch64/armv8_5-a-memtag.d: New tests for stzgm.
- * testsuite/gas/aarch64/armv8_5-a-memtag.s: Likewise.
- * testsuite/gas/aarch64/illegal-memtag.l: Likewise.
- * testsuite/gas/aarch64/illegal-memtag.s: Likewise.
+2020-01-15 Jozef Lawrynowicz <jozef.l@mittosystems.com>
+
+ * config/tc-msp430.c (CHECK_RELOC_MSP430): Always generate 430X
+ relocations when the target is 430X, except when extracting part of an
+ expression.
+ (msp430_srcoperand): Adjust comment.
+ Initialize the expp member of the msp430_operand_s struct as
+ appropriate.
+ (msp430_dstoperand): Likewise.
+ * testsuite/gas/msp430/msp430.exp: Run new test.
+ * testsuite/gas/msp430/reloc-lo-430x.d: New test.
+ * testsuite/gas/msp430/reloc-lo-430x.s: New test.
-2019-01-25 Sudakshina Das <sudi.das@arm.com>
- Ramana Radhakrishnan <ramana.radhakrishnan@arm.com>
+2020-01-15 Alan Modra <amodra@gmail.com>
+
+ * configure.tgt: Add sparc-*-freebsd case.
+
+2020-01-14 Lili Cui <lili.cui@intel.com>
+
+ * testsuite/gas/i386/align-branch-1a.d: Updated for Darwin.
+ * testsuite/gas/i386/align-branch-1b.d: Likewise.
+ * testsuite/gas/i386/align-branch-1c.d: Likewise.
+ * testsuite/gas/i386/align-branch-1d.d: Likewise.
+ * testsuite/gas/i386/align-branch-1e.d: Likewise.
+ * testsuite/gas/i386/align-branch-1f.d: Likewise.
+ * testsuite/gas/i386/align-branch-1g.d: Likewise.
+ * testsuite/gas/i386/align-branch-1h.d: Likewise.
+ * testsuite/gas/i386/align-branch-1i.d: Likewise.
+ * testsuite/gas/i386/align-branch-5.d: Likewise.
+ * testsuite/gas/i386/x86-64-align-branch-1a.d: Likewise.
+ * testsuite/gas/i386/x86-64-align-branch-1b.d: Likewise.
+ * testsuite/gas/i386/x86-64-align-branch-1c.d: Likewise.
+ * testsuite/gas/i386/x86-64-align-branch-1d.d: Likewise.
+ * testsuite/gas/i386/x86-64-align-branch-1e.d: Likewise.
+ * testsuite/gas/i386/x86-64-align-branch-1f.d: Likewise.
+ * testsuite/gas/i386/x86-64-align-branch-1g.d: Likewise.
+ * testsuite/gas/i386/x86-64-align-branch-1h.d: Likewise.
+ * testsuite/gas/i386/x86-64-align-branch-1i.d: Likewise.
+ * testsuite/gas/i386/x86-64-align-branch-5.d: Likewise.
+ * testsuite/gas/i386/i386.exp: Skip x86-64-align-branch-2a,
+ x86-64-align-branch-2b and x86-64-align-branch-2c on Darwin.
+
+2020-01-14 Sergey Belyashov <sergey.belyashov@gmail.com>
+
+ PR 25377
+ * config/tc-z80.c: Add support for half precision, single
+ precision and double precision floating point values.
+ * config/tc-z80.h b/gas/config/tc-z80.h: Disable string escapes.
+ * doc/as.texi: Add new z80 command line options.
+ * doc/c-z80.texi: Document new z80 command line options.
+ * testsuite/gas/z80/ez80_pref_dis.s: New test.
+ * testsuite/gas/z80/ez80_pref_dis.d: New test driver.
+ * testsuite/gas/z80/z80.exp: Run the new test.
+ * testsuite/gas/z80/fp_math48.d: Use correct command line option.
+ * testsuite/gas/z80/fp_zeda32.d: Likewise.
+ * testsuite/gas/z80/strings.d: Update expected output.
+
+2020-01-13 Matthew Malcomson <matthew.malcomson@arm.com>
+
+ * config/tc-aarch64.c (f64mm, f32mm): Add sve as a feature
+ dependency.
+
+2020-01-13 Claudiu Zissulescu <claziss@gmail.com>
+
+ * config/tc-arc.c (arc_select_cpu): Re-init the bfd if we change
+ the CPU.
+ * config/tc-arc.h: Add header if/defs.
+ * testsuite/gas/arc/pseudos.d: Improve matching pattern.
+
+2020-01-13 Alan Modra <amodra@gmail.com>
+
+ * testsuite/gas/wasm32/allinsn.d: Update expected output.
+
+2020-01-13 Alan Modra <amodra@gmail.com>
+
+ * config/tc-tic4x.c (tic4x_operands_match): Correct tic3x trap
+ insertion.
+
+2020-01-10 Alan Modra <amodra@gmail.com>
+
+ * testsuite/gas/elf/pr14891.s: Don't start directives in first column.
+ * testsuite/gas/elf/pr21661.d: Don't run on hpux.
+
+2020-01-03 Sergey Belyashov <sergey.belyashov@gmail.com>
+
+ PR 25224
+ * config/tc-z80.c (emit_ld_m_rr): Use integer types when checking
+ opcode byte values.
+ (emit_ld_r_r): Likewise.
+ (emit_ld_rr_m): Likewise.
+ (emit_ld_rr_nn): Likewise.
+
+2020-01-09 Jan Beulich <jbeulich@suse.com>
+
+ * config/tc-i386.c (optimize_encoding): Add
+ is_any_vex_encoding() invocations. Drop respective
+ i.tm.extension_opcode == None checks.
+
+2020-01-09 Jan Beulich <jbeulich@suse.com>
+
+ * config/tc-i386.c (md_assemble): Check RegRex is clear during
+ REX transformations. Correct comment indentation.
+
+2020-01-09 Jan Beulich <jbeulich@suse.com>
+
+ * config/tc-i386.c (optimize_encoding): Generalize register
+ transformation for TEST optimization.
+
+2020-01-09 Jan Beulich <jbeulich@suse.com>
- * config/tc-aarch64.c (parse_address_main): Remove support for
- [base]! address expression.
- (parse_operands): Remove support for AARCH64_OPND_ADDR_SIMPLE_2.
- (warn_unpredictable_ldst): Remove support for ldstgv_indexed.
- * testsuite/gas/aarch64/armv8_5-a-memtag.d: Remove tests for ldgv
- and stgv.
- * testsuite/gas/aarch64/armv8_5-a-memtag.s: Likewise.
- * testsuite/gas/aarch64/illegal-memtag.l: Likewise.
- * testsuite/gas/aarch64/illegal-memtag.s: Likewise.
+ * testsuite/gas/i386/x86-64-sysenter-amd.s,
+ testsuite/gas/i386/x86-64-sysenter-amd.d,
+ testsuite/gas/i386/x86-64-sysenter-amd.l,
+ testsuite/gas/i386/x86-64-sysenter-intel.d,
+ testsuite/gas/i386/x86-64-sysenter-mixed.d: New.
+ * testsuite/gas/i386/i386.exp: Run new tests.
-2019-01-25 Wu Heng <wu.heng@zte.com.cn>
+2020-01-08 Nick Clifton <nickc@redhat.com>
- PR gas/23940
- * macro.c (getstring): Check array bound before accessing.
+ PR 25284
+ * doc/as.texi (Align): Document the fact that all arguments can be
+ omitted.
+ (Balign): Likewise.
+ (P2align): Likewise.
-2019-01-25 Alan Modra <amodra@gmail.com>
+2020-01-08 Nick Clifton <nickc@redhat.com>
- PR 20902
- PR 24125
- * read.c (stringer): Delete assertion.
+ PR 14891
+ * config/obj-elf.c (obj_elf_section): Fail if the section name is
+ already defined as a different symbol type.
+ * testsuite/gas/elf/pr14891.s: New test source file.
+ * testsuite/gas/elf/pr14891.d: New test driver.
+ * testsuite/gas/elf/pr14891.s: New test expected error output.
+ * testsuite/gas/elf/elf.exp: Run the new test.
-2019-01-21 Nick Clifton <nickc@redhat.com>
+2020-01-08 Alan Modra <amodra@gmail.com>
- * po/uk.po: Updated Ukranian translation.
+ * config/tc-z8k.c (md_begin): Make idx unsigned.
+ (get_specific): Likewise for this_index.
-2019-01-19 Nick Clifton <nickc@redhat.com>
+2020-01-07 Claudiu Zissulescu <claziss@synopsys.com>
- * config.in: Regenerate.
- * configure: Regenerate.
- * po/gas.pot: Regenerate.
+ * onfig/tc-arc.c (parse_reloc_symbol): New function.
+ (tokenize_arguments): Clean up, use parse_reloc_symbol function.
+ (md_operand): Set X_md to absent.
+ (arc_parse_name): Check for X_md.
-2018-06-24 Nick Clifton <nickc@redhat.com>
-
- 2.32 branch created.
-
-2019-01-17 Tamar Christina <tamar.christina@arm.com>
-
- * testsuite/gas/arm/archv6t2-1-pe.d: New test.
- * testsuite/gas/arm/archv6t2-1.d: Skip pe.
- * testsuite/gas/arm/csdb.d: Skip pe.
- * testsuite/gas/arm/sb-thumb1-pe.d: New test.
- * testsuite/gas/arm/sb-thumb1.d: Skip pe.
- * testsuite/gas/arm/sb-thumb2-pe.d: New test.
- * testsuite/gas/arm/sb-thumb2.d: Skip pe.
- * testsuite/gas/arm/udf.d: Skip pe.
-
-2019-01-16 Kito Cheng <kito@andestech.com>
-
- * testsuite/gas/riscv/attribute-empty.d: New.
-
-2019-01-16 Kito Cheng <kito@andestech.com>
- Nelson Chu <nelson@andestech.com>
-
- * config/tc-riscv.c (DEFAULT_RISCV_ATTR): Define to 0 if not defined.
- (riscv_set_options): Add `arch_attr` field.
- (riscv_opts): Set default value for arch_attr.
- (riscv_write_out_arch_attr): New.
- (riscv_set_public_attributes): Likewise.
- (riscv_md_end): Likewise.
- (riscv_convert_symbolic_attribute): Likewise.
- (s_riscv_attribute): Likewise.
- (explicit_arch_attr): Likewise.
- (riscv_pseudo_table): Add .attribute to the table.
- (options): Add OPTION_ARCH_ATTR and OPTION_NO_ARCH_ATTR
- enumeration constants.
- (md_longopts): Add `march-attr' and `mno-arch-attr' options.
- (md_parse_option): Handle the new options.
- (md_show_usage): Document the `march-attr' option.
- * config/tc-riscv.h (md_end): Define as riscv_md_end
- (riscv_md_end): Declare.
- (CONVERT_SYMBOLIC_ATTRIBUTE): Define as
- riscv_convert_symbolic_attribute.
- (riscv_convert_symbolic_attribute): Declare.
- (start_assemble): Declare.
- * testsuite/gas/elf/elf.exp: Adjust test case for section2.e.
- * testsuite/gas/elf/section2.e-riscv: New.
- * testsuite/gas/riscv/attribute-01.d: New test
- * testsuite/gas/riscv/attribute-02.d: Likewise.
- * testsuite/gas/riscv/attribute-03.d: Likewise.
- * testsuite/gas/riscv/attribute-04.d: Likewise.
- * testsuite/gas/riscv/attribute-04.s: Likewise.
- * testsuite/gas/riscv/attribute-05.d: Likewise.
- * testsuite/gas/riscv/attribute-05.s: Likewise.
- * testsuite/gas/riscv/attribute-06.d: Likewise.
- * testsuite/gas/riscv/attribute-06.s: Likewise.
- * testsuite/gas/riscv/attribute-07.d: Likewise.
- * testsuite/gas/riscv/attribute-07.s: Likewise.
- * testsuite/gas/riscv/attribute-08.d: Likewise.
- * testsuite/gas/riscv/attribute-08.s: Likewise.
- * testsuite/gas/riscv/attribute-unknown.d: Likewise.
- * testsuite/gas/riscv/attribute-unknown.s: Likewise.
- * testsuite/gas/riscv/empty.l: Likewise.
- * doc/c-riscv.texi (.attribute): Add documentation.
- * configure.ac (--enable-default-riscv-attribute): New options.
- * configure: Re-generate.
- * config.in: Re-generate.
-
-2019-01-16 John Darrington <john@darrington.wattle.id.au>
-
- * config/tc-s12z.c (lex_reg_name): Compare the length of the strings
- before the contents.
- * testsuite/gas/s12z/labels.d: New file.
- * testsuite/gas/s12z/labels.s: New file.
- * testsuite/gas/s12z/s12z.exp: Add them.
- * config/tc-s12z.c (tfr): Change as_bad to as_warn.
- Also fix message typo and semantics.
- * config/tc-s12z.c (emit_opr): Emit BFD_RELOC_S12Z_OPR instead of
- BFD_RELOC_24.
- * testsuite/gas/s12z/opr-indirect-expr.d: Expect R_S12Z_OPR instead
- of R_S12Z_EXT24.
-
-2019-01-14 Srinath Parvathaneni <srinath.parvathaneni@arm.com>
-
- * config/tc-arm.c (arm_ext_v6k_v6t2): Define.
- (insns) [ARM_VARIANT]: Modified.
- (insns) [THUMB_VARIANT]: To implement few ARMv6K instructions
- in ARMv6T2 as well.
- * testsuite/gas/arm/archv6t2-1.d: New test.
- * testsuite/gas/arm/archv6t2-1.s: Likewise.
- * testsuite/gas/arm/archv6t2-2.d: Likewise.
-
-2019-01-11 Alan Modra <amodra@gmail.com>
-
- PR 23963
- * testsuite/gas/m68hc11/lbranch-dwarf2.d: Adjust for PR23963 change.
- * testsuite/gas/m68hc11/opers12-dwarf2.d: Likewise.
-
-2019-01-10 Nick Clifton <nickc@redhat.com>
-
- PR 23963
- * testsuite/gas/mips/mips16-branch-absolute-1.d: Adjust for the
- fact that control characters are now displayed as escape
- sequences.
- * testsuite/gas/mips/mips16-e.d: Likewise.
- * testsuite/gas/mips/mips16-pcrel-0.d: Likewise.
- * testsuite/gas/mips/mips16-pcrel-1.d: Likewise.
- * testsuite/gas/mips/mips16-pcrel-delay-0.d: Likewise.
- * testsuite/gas/mips/mips16-pcrel-delay-1.d: Likewise.
- * testsuite/gas/mips/mips16-pcrel-n32-0.d: Likewise.
- * testsuite/gas/mips/mips16-pcrel-n32-1.d: Likewise.
- * testsuite/gas/mips/mips16-pcrel-n64-sym32-0.d: Likewise.
- * testsuite/gas/mips/mips16-pcrel-n64-sym32-1.d: Likewise.
- * testsuite/gas/mips/mips16e2@mips16-pcrel-0.d: Likewise.
- * testsuite/gas/mips/mips16e2@mips16-pcrel-1.d: Likewise.
- * testsuite/gas/mips/mips16e2@mips16-pcrel-delay-0.d: Likewise.
- * testsuite/gas/mips/mips16e2@mips16-pcrel-delay-1.d: Likewise.
- * testsuite/gas/mips/mips16e2@mips16-pcrel-n32-0.d: Likewise.
- * testsuite/gas/mips/mips16e2@mips16-pcrel-n32-1.d: Likewise.
- * testsuite/gas/mips/mips16e2@mips16-pcrel-n64-sym32-0.d:
- Likewise.
- * testsuite/gas/mips/mips16e2@mips16-pcrel-n64-sym32-1.d:
- Likewise.
- * testsuite/gas/mips/mipsel16-e.d: Likewise.
- * testsuite/gas/mips/mipsr6@msa.d: Likewise.
- * testsuite/gas/mips/mipsr6@relax-swap3.d: Likewise.
- * testsuite/gas/mips/r6-64-n32.d: Likewise.
- * testsuite/gas/mips/r6-64-n64.d: Likewise.
- * testsuite/gas/mips/r6-n32.d: Likewise.
- * testsuite/gas/mips/r6-n64.d: Likewise.
- * testsuite/gas/mips/r6.d: Likewise.
- * testsuite/gas/mips/tmips16-e.d: Likewise.
- * testsuite/gas/mips/tmipsel16-e.d: Likewise.
- * testsuite/gas/mn10300/relax.d: Likewise.
-
-2019-01-09 John Darrington <john@darrington.wattle.id.au>
-
- * testsuite/gas/s12z/jsr.s: New case.
- * testsuite/gas/s12z/jsr.d: New case.
-
-2019-01-09 Andrew Paprocki <andrew@ishiboo.com>
+2020-01-03 Sergey Belyashov <sergey.belyashov@gmail.com>
- * configure: Regenerate.
+ PR 25311
+ * as.h (TC_STRING_ESCAPES): Provide a default definition.
+ * app.c (do_scrub_chars): Use TC_STRING_ESCAPES instead of
+ NO_STRING_ESCAPES.
+ * read.c (next_char_of_string): Likewise.
+ * config/tc-ppc.h (TC_STRING_ESCAPES): Define.
+ * config/tc-z80.h (TC_STRING_ESCAPES): Define.
+
+2020-01-03 Nick Clifton <nickc@redhat.com>
+
+ * po/sv.po: Updated Swedish translation.
-2019-01-08 Kyrylo Tkachov <kyrylo.tkachov@arm.com>
-
- * config/tc-aarch64.c (aarch64_cpus): Add ares.
- * doc/c-aarch64.texi (-mcpu): Document ares value.
-
-2019-01-08 Alan Modra <amodra@gmail.com>
-
- * testsuite/gas/rx/rx.exp: Create generated test source in
- current directory.
- * testsuite/gas/rx/Xtod.d, * testsuite/gas/rx/abs.d,
- * testsuite/gas/rx/adc.d, * testsuite/gas/rx/add.d,
- * testsuite/gas/rx/and.d, * testsuite/gas/rx/bclr.d,
- * testsuite/gas/rx/bcnd.d, * testsuite/gas/rx/bfmov.d,
- * testsuite/gas/rx/bmcnd.d, * testsuite/gas/rx/bnot.d,
- * testsuite/gas/rx/bra.d, * testsuite/gas/rx/brk.d,
- * testsuite/gas/rx/bset.d, * testsuite/gas/rx/bsr.d,
- * testsuite/gas/rx/btst.d, * testsuite/gas/rx/clrpsw.d,
- * testsuite/gas/rx/cmp.d, * testsuite/gas/rx/dabs.d,
- * testsuite/gas/rx/dadd.d, * testsuite/gas/rx/dbt.d,
- * testsuite/gas/rx/dcmp.d, * testsuite/gas/rx/ddiv.d,
- * testsuite/gas/rx/div.d, * testsuite/gas/rx/divu.d,
- * testsuite/gas/rx/dmov.d, * testsuite/gas/rx/dmul.d,
- * testsuite/gas/rx/dneg.d, * testsuite/gas/rx/dpopm.d,
- * testsuite/gas/rx/dpushm.d, * testsuite/gas/rx/dround.d,
- * testsuite/gas/rx/dsqrt.d, * testsuite/gas/rx/dsub.d,
- * testsuite/gas/rx/dtoX.d, * testsuite/gas/rx/emaca.d,
- * testsuite/gas/rx/emsba.d, * testsuite/gas/rx/emul.d,
- * testsuite/gas/rx/emula.d, * testsuite/gas/rx/emulu.d,
- * testsuite/gas/rx/fadd.d, * testsuite/gas/rx/fcmp.d,
- * testsuite/gas/rx/fdiv.d, * testsuite/gas/rx/fmul.d,
- * testsuite/gas/rx/fsqrt.d, * testsuite/gas/rx/fsub.d,
- * testsuite/gas/rx/ftoi.d, * testsuite/gas/rx/ftou.d,
- * testsuite/gas/rx/gprel.d, * testsuite/gas/rx/int.d,
- * testsuite/gas/rx/itof.d, * testsuite/gas/rx/jmp.d,
- * testsuite/gas/rx/jsr.d, * testsuite/gas/rx/machi.d,
- * testsuite/gas/rx/maclh.d, * testsuite/gas/rx/maclo.d,
- * testsuite/gas/rx/max.d, * testsuite/gas/rx/min.d,
- * testsuite/gas/rx/mov.d, * testsuite/gas/rx/movco.d,
- * testsuite/gas/rx/movli.d, * testsuite/gas/rx/movu.d,
- * testsuite/gas/rx/msbhi.d, * testsuite/gas/rx/msblh.d,
- * testsuite/gas/rx/msblo.d, * testsuite/gas/rx/mul.d,
- * testsuite/gas/rx/mulhi.d, * testsuite/gas/rx/mullh.d,
- * testsuite/gas/rx/mullo.d, * testsuite/gas/rx/mvfacgu.d,
- * testsuite/gas/rx/mvfachi.d, * testsuite/gas/rx/mvfaclo.d,
- * testsuite/gas/rx/mvfacmi.d, * testsuite/gas/rx/mvfc.d,
- * testsuite/gas/rx/mvfcp.d, * testsuite/gas/rx/mvfdc.d,
- * testsuite/gas/rx/mvfdr.d, * testsuite/gas/rx/mvtacgu.d,
- * testsuite/gas/rx/mvtachi.d, * testsuite/gas/rx/mvtaclo.d,
- * testsuite/gas/rx/mvtc.d, * testsuite/gas/rx/mvtcp.d,
- * testsuite/gas/rx/mvtdc.d, * testsuite/gas/rx/neg.d,
- * testsuite/gas/rx/nop.d, * testsuite/gas/rx/not.d,
- * testsuite/gas/rx/opecp.d, * testsuite/gas/rx/or.d,
- * testsuite/gas/rx/pop.d, * testsuite/gas/rx/popc.d,
- * testsuite/gas/rx/popm.d, * testsuite/gas/rx/push.d,
- * testsuite/gas/rx/pushc.d, * testsuite/gas/rx/pushm.d,
- * testsuite/gas/rx/r-bcc.d, * testsuite/gas/rx/r-bra.d,
- * testsuite/gas/rx/racl.d, * testsuite/gas/rx/racw.d,
- * testsuite/gas/rx/rdacl.d, * testsuite/gas/rx/rdacw.d,
- * testsuite/gas/rx/revl.d, * testsuite/gas/rx/revw.d,
- * testsuite/gas/rx/rmpa.d, * testsuite/gas/rx/rolc.d,
- * testsuite/gas/rx/rorc.d, * testsuite/gas/rx/rotl.d,
- * testsuite/gas/rx/rotr.d, * testsuite/gas/rx/round.d,
- * testsuite/gas/rx/rstr.d, * testsuite/gas/rx/rte.d,
- * testsuite/gas/rx/rtfi.d, * testsuite/gas/rx/rts.d,
- * testsuite/gas/rx/rtsd.d, * testsuite/gas/rx/sat.d,
- * testsuite/gas/rx/satr.d, * testsuite/gas/rx/save.d,
- * testsuite/gas/rx/sbb.d, * testsuite/gas/rx/sccnd.d,
- * testsuite/gas/rx/scmpu.d, * testsuite/gas/rx/setpsw.d,
- * testsuite/gas/rx/shar.d, * testsuite/gas/rx/shll.d,
- * testsuite/gas/rx/shlr.d, * testsuite/gas/rx/smovb.d,
- * testsuite/gas/rx/smovf.d, * testsuite/gas/rx/smovu.d,
- * testsuite/gas/rx/sstr.d, * testsuite/gas/rx/stnz.d,
- * testsuite/gas/rx/stz.d, * testsuite/gas/rx/sub.d,
- * testsuite/gas/rx/suntil.d, * testsuite/gas/rx/swhile.d,
- * testsuite/gas/rx/tst.d, * testsuite/gas/rx/utof.d,
- * testsuite/gas/rx/wait.d, * testsuite/gas/rx/xchg.d,
- * testsuite/gas/rx/xor.d: Add #source line.
-
-2019-01-07 Kyrylo Tkachov <kyrylo.tkachov@arm.com>
-
- * config/tc-arm.c (arm_cpus): Add ares.
- * doc/c-arm.texi (-mcpu): Document ares value.
-
-2019-01-05 Yoshinori Sato <ysato@users.sourceforge.jp>
-
- * config/rx-defs.h (rx_cpu_types): Add type RXV3 and RXV3FPU.
- (rx_bfield): Add prototype.
- (rx_post): Likewise.
- * config/rx-parse.y: Add v3 instructions and Double FPU registers.
- (DSIZE): Define.
- (POST): Define.
- (rx_check_v3): New. check v3 type.
- (rx_check_dfpu): New. check have double support.
- (double_condition_table): New. dcmp<cond> contiditon.
- (check_condition): Multiple condition support.
- (rx_lex): RXv3 instructions support.
- Add parse dcmp<cond> instruction and Double FPU registers.
- (immediate): Disable optimize in dmov #imm case.
- (displacement): Add double displacement in dmov instraction.
- * config/tc-rx.c (rx_use_conventional_section_names):
- Invert default value in rx-*-linux target.
- (cpu_type): Add additional ELF flags.
- (cpu_type_list): Add RXv3.
- (md_parse_option): Refer elf_flags from cpu_type_list.
- (md_show_usage): Add rxv3 and rxv3-dfpu.
- (rx_bytesT): Add post byte.
- (rx_bfield): New. generate bfmov / bfmovz "imm" field.
- (rx_post): New. Set instruction post byte.
- (md_assemble): Add post byte.
- doc/c-rx.texi: Add cpu types.
- * testsuite/gas/rx/Xtod.d: New.
- * testsuite/gas/rx/Xtod.sm: New.
- * testsuite/gas/rx/bfmov.d: New.
- * testsuite/gas/rx/bfmov.sm: New.
- * testsuite/gas/rx/dabs.d: New.
- * testsuite/gas/rx/dabs.sm: New.
- * testsuite/gas/rx/dadd.d: New.
- * testsuite/gas/rx/dadd.sm: New.
- * testsuite/gas/rx/dcmp.d: New.
- * testsuite/gas/rx/dcmp.sm: New.
- * testsuite/gas/rx/ddiv.d: New.
- * testsuite/gas/rx/ddiv.sm: New.
- * testsuite/gas/rx/dmov.d: New.
- * testsuite/gas/rx/dmov.sm: New.
- * testsuite/gas/rx/dmul.d: New.
- * testsuite/gas/rx/dmul.sm: New.
- * testsuite/gas/rx/dneg.d: New.
- * testsuite/gas/rx/dneg.sm: New.
- * testsuite/gas/rx/dpopm.d: New.
- * testsuite/gas/rx/dpopm.sm: New.
- * testsuite/gas/rx/dpushm.d: New.
- * testsuite/gas/rx/dpushm.sm: New.
- * testsuite/gas/rx/dround.d: New.
- * testsuite/gas/rx/dround.sm: New.
- * testsuite/gas/rx/dsqrt.d: New.
- * testsuite/gas/rx/dsqrt.sm: New.
- * testsuite/gas/rx/dsub.d: New.
- * testsuite/gas/rx/dsub.sm: New.
- * testsuite/gas/rx/dtoX.d: New.
- * testsuite/gas/rx/dtoX.sm: New.
- * testsuite/gas/rx/macros.inc: Add double FPU registers.
- * testsuite/gas/rx/mvfdc.d: New.
- * testsuite/gas/rx/mvfdc.sm: New.
- * testsuite/gas/rx/mvfdr.d: New.
- * testsuite/gas/rx/mvfdr.sm: New.
- * testsuite/gas/rx/mvtdc.d: New.
- * testsuite/gas/rx/mvtdc.sm: New.
- * testsuite/gas/rx/rstr.d: New.
- * testsuite/gas/rx/rstr.sm: New.
- * testsuite/gas/rx/rx.exp: Use rxv3-dfpu option.
- * testsuite/gas/rx/save.d: New.
- * testsuite/gas/rx/save.sm: New.
- * testsuite/gas/rx/xor.d: New.
- * testsuite/gas/rx/xor.sm: Add pattern.
-
-2019-01-04 Wu Heng <wu.heng@zte.com.cn>
-
- PR 24010
- * macro.c (get_any_string): Check for end of input whilst scanning
- for separators.
-
-2019-01-04 Wu Heng <wu.heng@zte.com.cn>
-
- PR 24009
- * read.c (stringer): Fix handling of missing '>' character at end
- of <...> sequence.
-
-2019-01-01 Alan Modra <amodra@gmail.com>
+2020-01-03 Jan Beulich <jbeulich@suse.com>
+
+ * testsuite/gas/aarch64/f64mm.s: Scale index of LD1RO{H,W,D}.
+ * testsuite/gas/aarch64/f64mm.d: Adjust expectations.
+
+2020-01-03 Jan Beulich <jbeulich@suse.com>
+
+ * testsuite/gas/aarch64/i8mm.s: Add 128-bit form tests for
+ by-element usdot. Add 64-bit form tests for by-element sudot.
+ * testsuite/gas/aarch64/i8mm.d: Adjust expectations.
+
+2020-01-03 Jan Beulich <jbeulich@suse.com>
+
+ * testsuite/gas/aarch64/f64mm.s: Drop 'i' from uzip<n>.
+ * testsuite/gas/aarch64/f64mm.d: Adjust expectations.
+
+2020-01-03 Jan Beulich <jbeulich@suse.com>
+
+ * testsuite/gas/aarch64/f64mm.d,
+ testsuite/gas/aarch64/sve-movprfx-mm.d: Adjust expectations.
+
+2020-01-02 Sergey Belyashov <sergey.belyashov@gmail.com>
+
+ * config/tc-z80.c: Add new architectures: Z180 and eZ80. Add
+ support for assembler code generated by SDCC. Add new relocation
+ types. Add z80-elf target support.
+ * config/tc-z80.h: Add z80-elf target support. Enable dollar local
+ labels. Local labels starts from ".L".
+ * NEWS: Mention the new support.
+ * testsuite/gas/all/fwdexp.d: Fix failure due to symbol conflict.
+ * testsuite/gas/all/fwdexp.s: Likewise.
+ * testsuite/gas/all/cond.l: Likewise.
+ * testsuite/gas/all/cond.s: Likewise.
+ * testsuite/gas/all/fwdexp.d: Likewise.
+ * testsuite/gas/all/fwdexp.s: Likewise.
+ * testsuite/gas/elf/section2.e-mips: Likewise.
+ * testsuite/gas/elf/section2.l: Likewise.
+ * testsuite/gas/elf/section2.s: Likewise.
+ * testsuite/gas/macros/app1.d: Likewise.
+ * testsuite/gas/macros/app1.s: Likewise.
+ * testsuite/gas/macros/app2.d: Likewise.
+ * testsuite/gas/macros/app2.s: Likewise.
+ * testsuite/gas/macros/app3.d: Likewise.
+ * testsuite/gas/macros/app3.s: Likewise.
+ * testsuite/gas/macros/app4.d: Likewise.
+ * testsuite/gas/macros/app4.s: Likewise.
+ * testsuite/gas/macros/app4b.s: Likewise.
+ * testsuite/gas/z80/suffix.d: Fix failure on ELF target.
+ * testsuite/gas/z80/z80.exp: Add new tests
+ * testsuite/gas/z80/dollar.d: New file.
+ * testsuite/gas/z80/dollar.s: New file.
+ * testsuite/gas/z80/ez80_adl_all.d: New file.
+ * testsuite/gas/z80/ez80_adl_all.s: New file.
+ * testsuite/gas/z80/ez80_adl_suf.d: New file.
+ * testsuite/gas/z80/ez80_isuf.s: New file.
+ * testsuite/gas/z80/ez80_z80_all.d: New file.
+ * testsuite/gas/z80/ez80_z80_all.s: New file.
+ * testsuite/gas/z80/ez80_z80_suf.d: New file.
+ * testsuite/gas/z80/r800_extra.d: New file.
+ * testsuite/gas/z80/r800_extra.s: New file.
+ * testsuite/gas/z80/r800_ii8.d: New file.
+ * testsuite/gas/z80/r800_z80_doc.d: New file.
+ * testsuite/gas/z80/z180.d: New file.
+ * testsuite/gas/z80/z180.s: New file.
+ * testsuite/gas/z80/z180_z80_doc.d: New file.
+ * testsuite/gas/z80/z80_doc.d: New file.
+ * testsuite/gas/z80/z80_doc.s: New file.
+ * testsuite/gas/z80/z80_ii8.d: New file.
+ * testsuite/gas/z80/z80_ii8.s: New file.
+ * testsuite/gas/z80/z80_in_f_c.d: New file.
+ * testsuite/gas/z80/z80_in_f_c.s: New file.
+ * testsuite/gas/z80/z80_op_ii_ld.d: New file.
+ * testsuite/gas/z80/z80_op_ii_ld.s: New file.
+ * testsuite/gas/z80/z80_out_c_0.d: New file.
+ * testsuite/gas/z80/z80_out_c_0.s: New file.
+ * testsuite/gas/z80/z80_reloc.d: New file.
+ * testsuite/gas/z80/z80_reloc.s: New file.
+ * testsuite/gas/z80/z80_sli.d: New file.
+ * testsuite/gas/z80/z80_sli.s: New file.
+
+2020-01-02 Szabolcs Nagy <szabolcs.nagy@arm.com>
+
+ * config/tc-arm.c (parse_reg_list): Use REG_TYPE_RN instead of
+ REGLIST_RN.
+
+2020-01-01 Alan Modra <amodra@gmail.com>
Update year range in copyright notice of all files.
-For older changes see ChangeLog-2018
+For older changes see ChangeLog-2019
\f
-Copyright (C) 2019 Free Software Foundation, Inc.
+Copyright (C) 2020 Free Software Foundation, Inc.
Copying and distribution of this file, with or without modification,
are permitted in any medium without royalty provided the copyright
projects / deliverable / binutils-gdb.git / blobdiff