+2013-02-28 Yufeng Zhang <yufeng.zhang@arm.com>
+
+ * config/tc-aarch64.c (parse_sys_reg): Allow the full range of CRn
+ for system registers.
+
+2013-02-27 DJ Delorie <dj@redhat.com>
+
+ * config/tc-rl78.c (reloc_function): Add %code -> BFD_RELOC_RL78_CODE.
+ (rl78_op): Handle %code().
+ (rl78_cons_fix_new): Likewise, but ignore for 20-bit operands.
+ (tc_gen_reloc): Likwise; convert to a computed reloc.
+ (md_apply_fix): Likewise.
+
+2013-02-25 Kaushik Phatak <Kaushik.Phatak@kpitcummins.com>
+
+ * config/rl78-parse.y: Fix encoding of DIVWU insn.
+
+2013-02-25 Terry Guo <terry.guo@arm.com>
+
+ * config/tc-arm.c (arm_cpus): Add cortex-r7 entry.
+ * doc/c-arm.texi: Add cortex-r7 and missing cortex-r5 to
+ list of accepted CPUs.
+
+2013-02-19 H.J. Lu <hongjiu.lu@intel.com>
+
+ PR gas/15159
+ * config/tc-i386.c (cpu_arch): Add ".smap".
+
+ * doc/c-i386.texi: Document smap.
+
+2013-02-18 Maciej W. Rozycki <macro@codesourcery.com>
+
+ * config/tc-mips.c (s_cpload): Call mips_mark_labels and set
+ mips_assembling_insn appropriately.
+ (s_cpsetup, s_cprestore, s_cpreturn, s_cpadd): Likewise.
+
+2013-02-18 Maciej W. Rozycki <macro@codesourcery.com>
+
+ * config/tc-mips.c (append_insn): Correct indentation, remove
+ extraneous braces.
+
2013-02-15 Kyrylo Tkachov <kyrylo.tkachov@arm.com>
- * config/tc-arm.c (do_neon_mov): Break on NS_NULL.
+ * config/tc-arm.c (do_neon_mov): Break on NS_NULL.
2013-02-15 Sebastian Huber <sebastian.huber@embedded-brains.de>
core.
2013-02-06 Sandra Loosemore <sandra@codesourcery.com>
- Andrew Jenner <andrew@codesourcery.com>
+ Andrew Jenner <andrew@codesourcery.com>
Based on patches from Altera Corporation.