+2020-10-01 Nick Clifton <nickc@redhat.com>
+
+ * config/obj-elf (elf_pseudo_table): Add attach_to_group.
+ (obj_elf_attach_to_group): New function.
+ * doc/as.texi: Document the new directive.
+ * NEWS: Mention the new feature.
+ * testsuite/gas/elf/attach-1.s: New test.
+ * testsuite/gas/elf/attach-1.d: New test driver.
+ * testsuite/gas/elf/attach-2.s: New test.
+ * testsuite/gas/elf/attach-2.d: New test driver.
+ * testsuite/gas/elf/attach-err.s: New test.
+ * testsuite/gas/elf/attach-err.d: New test driver.
+ * testsuite/gas/elf/attach-err.err: New test error output.
+ * testsuite/gas/elf/elf.exp: Run the new tests.
+
+2020-09-16 H.J. Lu <hongjiu.lu@intel.com>
+
+ PR gas/26685
+ * config/tc-i386.c (process_suffix): Check the register operand
+ for the address size prefix if the memory operand is symbol(%rip).
+ * testsuite/gas/i386/x86-64-enqcmd.s: Add tests with RIP-relative
+ addressing.
+ * testsuite/gas/i386/x86-64-movdir.s: Likewise.
+ * testsuite/gas/i386/x86-64-enqcmd-intel.d: Updated.
+ * testsuite/gas/i386/x86-64-enqcmd.d: Likewise.
+ * testsuite/gas/i386/x86-64-movdir-intel.d: Likewise.
+ * testsuite/gas/i386/x86-64-movdir.d: Likewise.
+
+2020-09-30 Przemyslaw Wirkus <przemyslaw.wirkus@arm.com>
+
+ * config/tc-aarch64.c: Add Cortex-A78 and Cortex-A78AE cores.
+ * doc/c-aarch64.texi: Update docs.
+ * NEWS: Update news.
+
+2020-09-30 Alex Coplan <alex.coplan@arm.com>
+
+ * NEWS: Mention recent Arm processor support.
+
+2020-09-30 Alex Coplan <alex.coplan@arm.com>
+
+ * config/tc-aarch64.c (aarch64_cpus): Add neoverse-n2.
+ * doc/c-aarch64.texi: Document support for Neoverse N2.
+
+2020-09-30 Alan Modra <amodra@gmail.com>
+
+ * config/obj-elf.c (obj_elf_change_section): Rename variable to
+ avoid shadowing warning.
+ * symbols.c (symbol_entry_find): Init all symbol_flags fields.
+
+2020-09-29 Przemyslaw Wirkus <przemyslaw.wirkus@arm.com>
+
+ * NEWS: TRBE, ETE, ETMv4 and Cortex-X1 news updates.
+
+2020-09-28 Przemyslaw Wirkus <przemyslaw.wirkus@arm.com>
+
+ * config/tc-arm.c: (arm_cpus): Add Cortex-X1.
+ * doc/c-arm.texi: Document -mcpu=cortex-x1.
+ * testsuite/gas/arm/cpu-cortex-x1.d: New test.
+
+2020-09-28 Przemyslaw Wirkus <przemyslaw.wirkus@arm.com>
+
+ * testsuite/gas/aarch64/etm-ro-invalid.d: New test.
+ * testsuite/gas/aarch64/etm-ro-invalid.l: New test.
+ * testsuite/gas/aarch64/etm-ro-invalid.s: New test.
+ * testsuite/gas/aarch64/etm-ro.s: New test.
+ * testsuite/gas/aarch64/etm-wo-invalid.d: New test.
+ * testsuite/gas/aarch64/etm-wo-invalid.l: New test.
+ * testsuite/gas/aarch64/etm-wo-invalid.s: New test.
+ * testsuite/gas/aarch64/etm-wo.s: New test.
+ * testsuite/gas/aarch64/etm.s: New test.
+ * testsuite/gas/aarch64/sysreg.d: system register s2_1_c0_c3_0
+ disassembled now to trcstatr.
+
+2020-09-28 Przemyslaw Wirkus <przemyslaw.wirkus@arm.com>
+
+ * config/tc-aarch64.c: (aarch64_cpus): Add Cortex-X1.
+ * doc/c-aarch64.texi: Document -mcpu=cortex-x1.
+
+2020-09-28 Przemyslaw Wirkus <przemyslaw.wirkus@arm.com>
+
+ * testsuite/gas/aarch64/ete.d: New test.
+ * testsuite/gas/aarch64/ete.s: New test.
+
+2020-09-28 Przemyslaw Wirkus <przemyslaw.wirkus@arm.com>
+
+ * testsuite/gas/aarch64/trbe-invalid.d: New test.
+ * testsuite/gas/aarch64/trbe-invalid.l: New test.
+ * testsuite/gas/aarch64/trbe-invalid.s: New test.
+ * testsuite/gas/aarch64/trbe.d: New test.
+ * testsuite/gas/aarch64/trbe.s: New test.
+
+2020-09-28 Alex Coplan <alex.coplan@arm.com>
+
+ * config/tc-arm.c (arm_cpus): Add FP16 to Neoverse V1.
+
+2020-09-28 Alex Coplan <alex.coplan@arm.com>
+
+ * config/tc-aarch64.c (aarch64_cpus): Group Neoverse cores together,
+ add missing F16 bit to Neoverse V1.
+
+2020-09-26 Alan Modra <amodra@gmail.com>
+
+ * config/tc-csky.c (parse_type_ctrlreg): Don't mask mach_flag
+ for csky_get_control_regno.
+ (csky_get_reg_val): Likewise when calling csky_get_general_regno.
+
+2020-09-24 Jim Wilson <jimw@sifive.com>
+
+ PR 26400
+ * config/tc-riscv.c (append_insn): If in absolute section, emit
+ error before add_relaxed_insn call.
+ * testsuite/gas/riscv/absolute-sec.d: New.
+ * testsuite/gas/riscv/absolute-sec.l: New.
+ * testsuite/gas/riscv/absolute-sec.s: New.
+
+2020-09-23 Mark Wielaard <mark@klomp.org>
+
+ * testsuite/gas/elf/dwarf-5-cu.d: Adjust expected output.
+
+2020-09-24 Alex Coplan <alex.coplan@arm.com>
+
+ * config/tc-arm.c (arm_cpus): Add Neoverse V1.
+ * doc/c-arm.texi: Document Neoverse V1 support.
+
+2020-09-24 Alex Coplan <alex.coplan@arm.com>
+
+ * config/tc-aarch64.c (aarch64_cpu_option_table): Add Neoverse V1.
+ * doc/c-aarch64.texi: Document Neoverse V1 support.
+
+2020-09-24 Alex Coplan <alex.coplan@arm.com>
+
+ * config/tc-arm.c (arm_cpus): Add Neoverse N2.
+ * doc/c-arm.texi: Document -mcpu=neoverse-n2.
+
+2020-09-24 Lili Cui <lili.cui@intel.com>
+
+ * NEWS: Add TDX.
+ * config/tc-i386.c (cpu_arch): Add .tdx.
+ (cpu_noarch): Likewise.
+ * doc/c-i386.texi: Document tdx.
+ * testsuite/gas/i386/i386.exp: Run tdx tests.
+ * testsuite/gas/i386/tdx.d: Likewise.
+ * testsuite/gas/i386/tdx.s: Likewise.
+ * testsuite/gas/i386/x86-64-tdx.d: Likewise.
+ * testsuite/gas/i386/x86-64-tdx.s: Likewise.
+
+2020-09-17 Cooper Qu <cooper.qu@linux.alibaba.com>
+
+ * config/tc-csky.c (parse_type_ctrlreg): Use function
+ csky_get_control_regno to operand.
+ (csky_get_reg_val): Likewise.
+ (is_reg_sp_with_bracket): Use function csky_get_reg_val
+ to parse operand.
+ (is_reg_sp): Refine.
+ (is_oimm_within_range): Fix, report error when operand
+ is not constant.
+ (parse_type_cpreg): Refine.
+ (parse_type_cpcreg): Refine.
+ (get_operand_value): Add handle of OPRND_TYPE_IMM5b_LS.
+ (md_assemble): Fix no error reporting somtimes when
+ operands number are not fit.
+ (csky_addc64): Refine.
+ (csky_subc64): Refine.
+ (csky_or64): Refine.
+ (v1_work_fpu_fo): Refine.
+ (v1_work_fpu_read): Refine.
+ (v1_work_fpu_writed): Refine.
+ (v1_work_fpu_readd): Refine.
+ (v2_work_addc): New function, strengthen the operands legality
+ check of addc.
+ * testsuite/gas/csky/all.d : Use register number format when
+ disassemble register name by default.
+ * testsuite/gas/csky/cskyv2_all.d : Likewise.
+ * testsuite/gas/csky/trust.d: Likewise.
+ * testsuite/gas/csky/cskyv2_ck860.d : Fix.
+ * testsuite/gas/csky/trust.s : Fix.
+
+2020-09-23 Lili Cui <lili.cui@intel.com>
+
+ * NEWS: Add Key Locker.
+ * config/tc-i386.c (cpu_arch): Add .kl and .wide_kl.
+ (cpu_noarch): Likewise.
+ * doc/c-i386.texi: Document kl and wide_kl.
+ * testsuite/gas/i386/i386.exp: Run keylocker tests.
+ * testsuite/gas/i386/keylocker-intel.d: New test.
+ * testsuite/gas/i386/keylocker.d: Likewise.
+ * testsuite/gas/i386/keylocker.s: Likewise.
+ * testsuite/gas/i386/x86-64-keylocker-intel.d: Likewise.
+ * testsuite/gas/i386/x86-64-keylocker.d: Likewise.
+ * testsuite/gas/i386/x86-64-keylocker.s: Likewise.
+ * testsuite/gas/i386/x86-64-property-10.d: Likewise.
+ * testsuite/gas/i386/property-10.d: Likewise.
+ * testsuite/gas/i386/property-10.s: Likewise.
+
+2020-09-21 Alan Modra <amodra@gmail.com>
+
+ PR 26569
+ * config/tc-riscv.c (append_insn): Don't tie off frags at CALL
+ relocs.
+ (riscv_call): Tie them off after the jalr.
+ (md_apply_fix): Zero fx_size of RELAX fixup.
+
+2020-09-018 David Faust <david.faust@oracle.com>
+
+ * testsuite/gas/bpf/alu-xbpf.d: New file.
+ * testsuite/gas/bpf/alu-xbpf.s: Likewise.
+ * testsuite/gas/bpf/alu32-xbpf.d: Likewise.
+ * testsuite/gas/bpf/alu32-xbpf.d: Likewise.
+ * testuiste/gas/bpf/bpf.exp: Run new tests.
+
+2020-09-18 Tucker <tuckkern+sourceware@gmail.com>
+
+ PR 26556
+ * read.c (bss_alloc): Convert size parameter from octets to
+ bytes.
+
+2020-09-17 Alan Modra <amodra@gmail.com>
+
+ * testsuite/gas/i386/i386.exp: Return early if not x86.
+
+2020-09-16 Alan Modra <amodra@gmail.com>
+
+ * config/obj-elf.c (obj_elf_visibility, elf_frob_symbol): Adjust
+ elf_symbol_from invocation.
+ * config/tc-aarch64.c (s_variant_pcs): Likewise.
+ * config/tc-m68hc11.c (s_m68hc11_mark_symbol): Likewise.
+ * config/tc-ppc.c (ppc_elf_localentry, ppc_force_relocation),
+ (ppc_fix_adjustable): Likewise.
+ * config/tc-xgate.c (xgate_frob_symbol): Likewise.
+
+2020-09-15 H.J. Lu <hongjiu.lu@intel.com>
+
+ * testsuite/gas/cfi/reloc-pe-i386.d: Updated.
+ * testsuite/gas/i386/x86-64-w64-pcrel.d: Likewise.
+
+2020-09-15 Alan Modra <amodra@gmail.com>
+
+ PR 26610
+ * config/tc-arm.c (move_or_literal_pool): Correct extraction of
+ bignum. Use unsigned "v"
+ (is_double_a_single): Make "v" and "mantissa" unsigned. Formatting.
+ (double_to_single): Likewise.
+
2020-09-15 Nick Clifton <nickc@redhat.com>
* read.c (s_nop): Preserve the input_line_pointer around the call
add_line_strp and set symbol offset for DWARF2_LINE_VERSION 5.
(out_debug_line): Call out_dir_and_file_list with line_seg and
sizeof_offset.
- * gas/testsuite/gas/elf/dwarf-5-file0.d: Expect indirect line
+ * testsuite/gas/elf/dwarf-5-file0.d: Expect indirect line
strings.
2020-09-07 Mark Wielaard <mark@klomp.org>
* dwarf2dbg.c (dwarf2_directive_filename): Initialize with_md5 to
FALSE.
- * gas/testsuite/gas/elf/dwarf-5-file0.s: Add a random bignum.
+ * testsuite/gas/elf/dwarf-5-file0.s: Add a random bignum.
2020-09-01 Mark Wielaard <mark@klomp.org>
2020-08-28 Cooper Qu <cooper.qu@linux.alibaba.com>
- * gas/config/tc-csky.c (md_begin): Set attributes.
+ * config/tc-csky.c (md_begin): Set attributes.
(isa_flag): Change type to unsigned 64 bits.
(struct csky_cpu_info): Likewise.
(struct csky_macro_info): Likewise.
2020-08-25 Alan Modra <amodra@gmail.com>
PR 26501
- * gas/config/tc-tic54x.c (tic54x_undefined_symbol): Properly treat
+ * config/tc-tic54x.c (tic54x_undefined_symbol): Properly treat
misc_symbol_hash entries without values.
2020-08-25 Alan Modra <amodra@gmail.com>
PR 26500
- * tc-tic4x.c (tic4x_inst_make): Don't die on terminating insn
- with name = "".
+ * config/tc-tic4x.c (tic4x_inst_make): Don't die on terminating
+ insn with name = "".
2020-08-25 Alan Modra <amodra@gmail.com>
(csky_cpus): Add item for CK860.
(md_begin): Enable DSP for CK810 and CK807 by default.
(md_apply_fix): Fix CKCORE_TLS_IE32 relocation failure.
- * gas/testsuite/gas/csky/cskyv2_all.d: Change 'sync 0'
- to 'sync'.
- * gas/testsuite/gas/csky/cskyv2_all.s: Likewise.
- * gas/testsuite/gas/csky/cskyv2_ck860.d: New.
- * gas/testsuite/gas/csky/cskyv2_ck860.s: New.
- * gas/testsuite/gas/csky/enhance_dsp.d: Change plsli.u16
- to plsli.16.
- * gas/testsuite/gas/csky/enhance_dsp.s: Likewise.
+ * testsuite/gas/csky/cskyv2_all.d: Change 'sync 0' to 'sync'.
+ * testsuite/gas/csky/cskyv2_all.s: Likewise.
+ * testsuite/gas/csky/cskyv2_ck860.d: New.
+ * testsuite/gas/csky/cskyv2_ck860.s: New.
+ * testsuite/gas/csky/enhance_dsp.d: Change plsli.u16 to plsli.16.
+ * testsuite/gas/csky/enhance_dsp.s: Likewise.
2020-08-24 Alan Modra <amodra@gmail.com>
2020-08-04 Christian Groessler <chris@groessler.org>
- * gas/testsuite/gas/z8k/inout.d: Adapt to correct encoding of
+ * testsuite/gas/z8k/inout.d: Adapt to correct encoding of
"sout/soutb #imm,reg"
2020-08-04 H.J. Lu <hongjiu.lu@intel.com>
2020-08-02 Mark Wielaard <mark@klomp.org>
- * gas/dwarf2dbg.c (out_dir_and_file_list): For DWARF5 emit at
+ * dwarf2dbg.c (out_dir_and_file_list): For DWARF5 emit at
least one directory if there is at least one file. Use dirs[1]
if dirs[0] is not set, or if there is no dirs[1] the current
working directory. Use files[1] filename, when files[0] filename
* dwarf2dbg.c (out_debug_info): Emit unit type and abbrev offset
for DWARF5.
- * gas/testsuite/gas/elf/dwarf-4-cu.d: New file.
- * gas/testsuite/gas/elf/dwarf-4-cu.s: Likewise.
- * gas/testsuite/gas/elf/dwarf-5-cu.d: Likewise.
- * gas/testsuite/gas/elf/dwarf-5-cu.s: Likewise.
+ * testsuite/gas/elf/dwarf-4-cu.d: New file.
+ * testsuite/gas/elf/dwarf-4-cu.s: Likewise.
+ * testsuite/gas/elf/dwarf-5-cu.d: Likewise.
+ * testsuite/gas/elf/dwarf-5-cu.s: Likewise.
* testsuite/gas/elf/elf.exp: Run dwarf-4-cu and dwarf-5-cu.
2020-08-02 Mark Wielaard <mark@klomp.org>
2020-06-29 H.J. Lu <hongjiu.lu@intel.com>
- * tc-i386.c (build_vex_prefix): Support VEX base opcode length > 1.
+ * config/tc-i386.c (build_vex_prefix): Support VEX base opcode
+ length > 1.
(md_assemble): Don't process ImmExt without operands.
2020-06-29 Hans-Peter Nilsson <hp@bitrange.com>
2020-05-27 Simon Cook <simon.cook@embecosm.com>
- * config/tc-riscv.c (riscv_init_csr_hash): NULL initilize next
- pointer when creating struct riscv_csr_extra.
+ * config/tc-riscv.c (riscv_init_csr_hash): NULL initilize next
+ pointer when creating struct riscv_csr_extra.
2020-05-26 H.J. Lu <hongjiu.lu@intel.com>
-mpriv-spec=1.11.
* testsuite/gas/riscv/priv-reg-fail-fext.l: Likewise. There are some
version warnings for the test case.
- * gas/testsuite/gas/riscv/priv-reg-fail-read-only-01.d: Likewise.
- * gas/testsuite/gas/riscv/priv-reg-fail-read-only-01.l: Likewise.
- * gas/testsuite/gas/riscv/priv-reg-fail-read-only-02.d: Likewise.
- * gas/testsuite/gas/riscv/priv-reg-fail-rv32-only.d: Likewise.
- * gas/testsuite/gas/riscv/priv-reg-fail-rv32-only.l: Likewise.
- * gas/testsuite/gas/riscv/priv-reg-fail-version-1p9.d: New test case.
+ * testsuite/gas/riscv/priv-reg-fail-read-only-01.d: Likewise.
+ * testsuite/gas/riscv/priv-reg-fail-read-only-01.l: Likewise.
+ * testsuite/gas/riscv/priv-reg-fail-read-only-02.d: Likewise.
+ * testsuite/gas/riscv/priv-reg-fail-rv32-only.d: Likewise.
+ * testsuite/gas/riscv/priv-reg-fail-rv32-only.l: Likewise.
+ * testsuite/gas/riscv/priv-reg-fail-version-1p9.d: New test case.
Check whether the CSR is valid when privilege version 1.9 is choosed.
- * gas/testsuite/gas/riscv/priv-reg-fail-version-1p9.l: Likewise.
- * gas/testsuite/gas/riscv/priv-reg-fail-version-1p9p1.d: New test case.
+ * testsuite/gas/riscv/priv-reg-fail-version-1p9.l: Likewise.
+ * testsuite/gas/riscv/priv-reg-fail-version-1p9p1.d: New test case.
Check whether the CSR is valid when privilege version 1.9.1 is choosed.
- * gas/testsuite/gas/riscv/priv-reg-fail-version-1p9p1.l: Likewise.
- * gas/testsuite/gas/riscv/priv-reg-fail-version-1p10.d: New test case.
+ * testsuite/gas/riscv/priv-reg-fail-version-1p9p1.l: Likewise.
+ * testsuite/gas/riscv/priv-reg-fail-version-1p10.d: New test case.
Check whether the CSR is valid when privilege version 1.10 is choosed.
- * gas/testsuite/gas/riscv/priv-reg-fail-version-1p10.l: Likewise.
- * gas/testsuite/gas/riscv/priv-reg-fail-version-1p11.d: New test case.
+ * testsuite/gas/riscv/priv-reg-fail-version-1p10.l: Likewise.
+ * testsuite/gas/riscv/priv-reg-fail-version-1p11.d: New test case.
Check whether the CSR is valid when privilege version 1.11 is choosed.
- * gas/testsuite/gas/riscv/priv-reg-fail-version-1p11.l: Likewise.
+ * testsuite/gas/riscv/priv-reg-fail-version-1p11.l: Likewise.
* config/tc-riscv.c (DEFAULT_RISCV_ISA_SPEC): Default configure option
setting. You can set it by configure option --with-priv-spec.
(riscv_set_default_priv_spec): New function used to set the default
* testsuite/gas/i386/solaris/x86-64-branch-3.d: New file.
* testsuite/gas/i386/solaris/x86-64-jump.d: Incorporate changes to
testsuite/gas/i386/x86-64-jump.d.
- * gas/testsuite/gas/i386/solaris/x86-64-mpx-branch-1.d:
+ * testsuite/gas/i386/solaris/x86-64-mpx-branch-1.d:
Incorporate changes to
gas/testsuite/gas/i386/x86-64-mpx-branch-1.d.
* testsuite/gas/i386/solaris/x86-64-mpx-branch-2.d : Incorporate
2020-02-01 Anthony Green <green@moxielogic.com>
- * config/tc-moxie.c (md_begin): Don't force big-endian mode.
+ * config/tc-moxie.c (md_begin): Don't force big-endian mode.
2020-01-31 Sandra Loosemore <sandra@codesourcery.com>
projects / deliverable / binutils-gdb.git / blobdiff