PR gas/11032

[deliverable/binutils-gdb.git] / gas / ChangeLog

diff --git a/gas/ChangeLog b/gas/ChangeLog
index f61097cfcea90ba407fb0c707b9052e47b145da1..7f6432b737fc9590141054fa6ad4627bb8ebfe06 100644 (file)
--- a/gas/ChangeLog
+++ b/gas/ChangeLog
@@ -1,3 +1,62 @@
+2009-11-30  Nick Clifton  <nickc@redhat.com>
+
+       PR gas/11032
+       * config/tc-arm.c (relax_adr): Cope with a frag with no symbol.
+
+2009-11-19  Jan Beulich  <jbeulich@novell.com>
+
+       * read.c (pseudo_set): Also call copy_symbol_attributes() for
+       undefined target symbol.
+
+2009-11-18  Sebastian Pop  <sebastian.pop@amd.com>
+
+       * config/tc-i386.c (cpu_arch): Remove cvt16.
+       (md_show_usage): Same.
+       * doc/c-i386.texi: Same.
+
+2009-11-18  Paul Brook  <paul@codesourcery.com>
+
+       * config/tc-arm.c (arm_fpus): Add fpv4-sp-d16.
+       (aeabi_set_public_attributes): Correctly mark VFPv3xD.
+
+2009-11-18  Alan Modra  <amodra@bigpond.net.au>
+
+       * config/tc-ppc.c (md_assemble): Report error on invalid @tls operands
+       and opcode.
+
+2009-11-17  Sebastian Pop  <sebastian.pop@amd.com>
+           Quentin Neill  <quentin.neill@amd.com>
+
+       * config/tc-i386.c (cpu_arch): Added .xop and .cvt16.
+       (build_vex_prefix): Handle xop08.
+       (md_assemble): Don't special case the constant 3 for insns using MODRM.
+       (build_modrm_byte): Handle vex2sources.
+       (md_show_usage): Add xop and cvt16.
+       * doc/c-i386.texi: Document fma4, xop, and cvt16.
+
+2009-11-17  Paul Brook  <paul@codesourcery.com>
+       Daniel Jacobowitz  <dan@codesourcery.com>
+
+       * doc/c-arm.texi: Document .arch armv7e-m.
+       * config/tc-arm.c (arm_ext_v6_dsp, arm_ext_v7m): New.
+       (insns): Put Thumb versions of v5TExP instructions into
+       arm_ext_v5exp also.  Move some Thumb variants from
+       arm_ext_v6_notm to arm_ext_v6_dsp.
+       (arm_archs): Add armv7e-m architecture.
+       (aeabi_set_public_attributes): Handle -march=armv7e-m.
+
+2009-11-16  Viktor Kutuzov  <vkutuzov@accesssoftek.com>
+
+       * config/tc-arm.c (parse_operands): Encode APSR_nzcv as r15.
+       (do_vmrs): New function.
+       (do_vmsr): New function.
+       (insns): Add vmrs and vmsr.
+
+2009-11-13  H.J. Lu  <hongjiu.lu@intel.com>
+
+       * config/tc-i386.c (md_assemble): Check destination operand
+       for lockable instructions.
+
 2009-11-13  H.J. Lu  <hongjiu.lu@intel.com>
 
        * config/tc-i386.c (_i386_insn): Don't use bit field on