+2020-10-16 H.J. Lu <hongjiu.lu@intel.com>
+
+ PR gas/25878
+ PR gas/26740
+ * dwarf2dbg.c (file_entry): Remove auto_assigned.
+ (assign_file_to_slot): Remove the auto_assign argument.
+ (allocate_filenum): Updated.
+ (allocate_filename_to_slot): Reuse the input file entry in the
+ file table.
+ (dwarf2_where): Replace as_where with as_where_physical.
+ * testsuite/gas/i386/dwarf5-line-1.d: New file.
+ * testsuite/gas/i386/dwarf5-line-1.s: Likewise.
+ * testsuite/gas/i386/i386.exp: Run dwarf5-line-1.
+
+2020-10-16 Lili Cui <lili.cui@intel.com>
+
+ * config/tc-i386.c (cpu_flags_match): Move Pseudo Prefix check
+ to ...
+ (match_template): Here.
+ * testsuite/gas/i386/avx-vnni-inval.l: New file.
+ * testsuite/gas/i386/avx-vnni-inval.s: Likewise.
+ * testsuite/gas/i386/avx-vnni.d: Delete invalid {vex2} test.
+ * testsuite/gas/i386/avx-vnni.s: Likewise.
+ * testsuite/gas/i386/i386.exp: Add AVX VNNI invalid tests.
+ * testsuite/gas/i386/x86-64-avx-vnni-inval.l: New file.
+ * testsuite/gas/i386/x86-64-avx-vnni-inval.s: Likewise.
+ * testsuite/gas/i386/x86-64-avx-vnni.d: Delete invalid {vex2} test.
+ * testsuite/gas/i386/x86-64-avx-vnni.s: Likewise.
+
+2020-10-14 H.J. Lu <hongjiu.lu@intel.com>
+ Lili Cui <lili.cui@intel.com>
+
+ * NEWS: Add Intel AVX VNNI.
+ * config/tc-i386.c (cpu_arch): Add .avx_vnni and noavx_vnni.
+ (cpu_flags_match): Support CpuVEX_PREFIX.
+ * doc/c-i386.texi: Document .avx_vnni, noavx_vnni and how to
+ encode Intel VNNI instructions with VEX prefix.
+ * testsuite/gas/i386/avx-vnni.d: New file.
+ * testsuite/gas/i386/avx-vnni.s: Likewise.
+ * testsuite/gas/i386/x86-64-avx-vnni.d: Likewise.
+ * testsuite/gas/i386/x86-64-avx-vnni.s: Likewise.
+ * testsuite/gas/i386/i386.exp: Run AVX VNNI tests.
+
+2020-10-14 Lili Cui <lili.cui@intel.com>
+
+ * NEWS: Add Intel HRESET.
+ * config/tc-i386.c (cpu_arch): Add .hreset.
+ (cpu_noarch): Likewise.
+ * doc/c-i386.texi: Document .hreset, nohreset.
+ * testsuite/gas/i386/i386.exp: Run HRESET tests.
+ * testsuite/gas/i386/hreset.d: New file.
+ * testsuite/gas/i386/x86-64-hreset.d: Likewise.
+ * testsuite/gas/i386/hreset.s: Likewise.
+
+2020-10-14 Lili Cui <lili.cui@intel.com>
+
+ * NEWS: Add Intel UINTR.
+ * config/tc-i386.c (cpu_arch): Add .uintr.
+ (cpu_noarch): Likewise.
+ * doc/c-i386.texi: Document .uintr and nouintr.
+ * testsuite/gas/i386/i386.exp: Run UINTR tests.
+ * testsuite/gas/i386/x86-64-uintr.d: Likewise.
+ * testsuite/gas/i386/x86-64-uintr.s: Likewise.
+
+2020-10-14 H.J. Lu <hongjiu.lu@intel.com>
+
+ * config/tc-i386.c (load_insn_p): Check opcodeprefix == 0 for
+ base_opcode == 0xfc7.
+ (match_template): Likewise.
+ (process_suffix): Check opcodeprefix == PREFIX_0XF2 for CRC32.
+ (check_byte_reg): Likewise.
+ (output_insn): Don't add the 0xf3 prefix twice for PadLock
+ instructions. Don't add prefix from non-VEX/EVEX base_opcode.
+
+2020-10-13 H.J. Lu <hongjiu.lu@intel.com>
+
+ * config/tc-i386.c (build_vex_prefix): Replace vexopcode with
+ opcodeprefix.
+ (build_evex_prefix): Likewise.
+ (is_any_vex_encoding): Don't check vexopcode.
+ (output_insn): Handle opcodeprefix.
+
+2020-10-09 H.J. Lu <hongjiu.lu@intel.com>
+
+ PR gas/26703
+ * config/tc-i386.c (xstate): Add xstate_mask.
+ (md_assemble): Check i.types[j], instead of i.tm.operand_types[j],
+ for xstate. Set xstate_mask, instead of xstate_zmm, for RegMask.
+ (output_insn): Update for GNU_PROPERTY_X86_ISA_1_V[234]. Update
+ xstate for mask register and VSIB.
+ * testsuite/gas/i386/i386.exp: Run more GNU_PROPERTY tests.
+ * testsuite/gas/i386/property-1.s: Updated to the current
+ GNU_PROPERTY_X86_ISA_1_USED value.
+ * testsuite/gas/i386/property-2.s: Only keep cmove.
+ * testsuite/gas/i386/property-3.s: Changed to addsubpd.
+ * testsuite/gas/i386/property-1.d: Updated.
+ * testsuite/gas/i386/property-2.d: Likewise.
+ * testsuite/gas/i386/property-3.d: Likewise.
+ * testsuite/gas/i386/property-4.d: Likewise.
+ * testsuite/gas/i386/property-5.d: Likewise.
+ * testsuite/gas/i386/property-6.d: Likewise.
+ * testsuite/gas/i386/x86-64-property-1.d: Likewise.
+ * testsuite/gas/i386/x86-64-property-2.d: Likewise.
+ * testsuite/gas/i386/x86-64-property-3.d: Likewise.
+ * testsuite/gas/i386/x86-64-property-4.d: Likewise.
+ * testsuite/gas/i386/x86-64-property-5.d: Likewise.
+ * testsuite/gas/i386/x86-64-property-6.d: Likewise.
+ * testsuite/gas/i386/x86-64-property-7.d: Likewise.
+ * testsuite/gas/i386/x86-64-property-8.d: Likewise.
+ * testsuite/gas/i386/x86-64-property-9.d: Likewise.
+ * testsuite/gas/i386/property-11.d: New file.
+ * testsuite/gas/i386/property-11.s: Likewise.
+ * testsuite/gas/i386/property-12.d: Likewise.
+ * testsuite/gas/i386/property-12.s: Likewise.
+ * testsuite/gas/i386/property-13.d: Likewise.
+ * testsuite/gas/i386/property-13.s: Likewise.
+ * testsuite/gas/i386/x86-64-property-11.d: Likewise.
+ * testsuite/gas/i386/x86-64-property-12.d: Likewise.
+ * testsuite/gas/i386/x86-64-property-13.d: Likewise.
+ * testsuite/gas/i386/x86-64-property-14.d: Likewise.
+ * testsuite/gas/i386/x86-64-property-14.s: Likewise.
+
+2020-10-06 Alex Coplan <alex.coplan@arm.com>
+
+ PR 26699
+ * config/tc-aarch64.c (asm_barrier_opt): Delete.
+ (parse_barrier): Fix bogus type punning.
+ * testsuite/gas/aarch64/system.d: Update disassembly.
+ * testsuite/gas/aarch64/system.s: Add isb sy test.
+
+2020-10-06 Sergey Belyashav <sergey.belyashov@gmail.com>
+
+ PR 26692
+ * config/tc-z80.c (md_begin): Ensure that xpressions are empty
+ before using them.
+ (unify_indexed): Likewise.
+ (z80_start_line_hook): Improve hash sign handling when SDCC
+ compatibility mode enabled.
+ (md_parse_exp_not_indexed): Improve indirect addressing
+ detection.
+ (md_pseudo_table): Accept hd64 as an alias of z810.
+
+2020-10-06 Alan Modra <amodra@gmail.com>
+
+ * testsuite/gas/elf/sh-link-zero.s: Don't start directives in
+ first column. Don't use numeric labels.
+
+2020-10-05 Kamil Rytarowski <n54@gmx.com>
+
+ * configure.tgt (aarch64*-*-netbsd*): Add target.
+
+2020-10-05 Samanta Navarro <ferivoz@riseup.net>
+
+ * doc/as.texi: Fix spelling mistakes.
+ * doc/c-wasm32.texi: Likewise.
+
+2020-10-05 T.K. Chia <u1049321969@caramail.com>
+
+ PR gas/26694
+ * NEWS: Updated for i386 lcall and ljmp change.
+ * config/tc-i386.c (output_interseg_jump): Allow non-absolute
+ segment operand for immediate lcall and ljmp.
+ * testsuite/gas/i386/jump.d,
+ * testsuite/gas/i386/jump.s,
+ * testsuite/gas/i386/jump16.d,
+ * testsuite/gas/i386/jump16.e,
+ * testsuite/gas/i386/jump16.s: Add tests for non-absolute
+ segment operand for immediate ljmp.
+
+2020-10-05 H.J. Lu <hongjiu.lu@intel.com>
+
+ PR binutils/26704
+ * testsuite/gas/i386/noreg64-data16.d: Expect sysretl instead of
+ sysret.
+ * testsuite/gas/i386/noreg64.d: Likewise.
+ * testsuite/gas/i386/x86-64-intel64.d: Likewise.
+ * testsuite/gas/i386/x86-64-opcode.d: Likewise.
+
+2020-10-05 H.J. Lu <hongjiu.lu@intel.com>
+
+ PR binutils/26705
+ * testsuite/gas/i386/x86-64-suffix.s: Add "mov %rsp,%rbp" before
+ sysretq.
+ * testsuite/gas/i386/x86-64-suffix-intel.d: Updated.
+ * testsuite/gas/i386/x86-64-suffix.d: Likewise.
+
+2020-10-05 Nick Clifton <nickc@redhat.com>
+
+ PR 26253
+ * config/obj-elf.c (obj_elf_section): Accept a numeric value for
+ the "o" section flag. Interpret it as a section index. Allow an
+ index of zero.
+ * doc/as.texi: Document the new behaviour.
+ * NEWS: Mention the new feature. Tidy entries.
+ * testsuite/gas/elf/sh-link-zero.s: New test.
+ * testsuite/gas/elf/sh-link-zero.d: New test driver.
+ * testsuite/gas/elf/elf.exp: Run the new test.
+ * testsuite/gas/elf/section21.l: Updated expected assembler
+ output.
+
+2020-10-03 H.J. Lu <hongjiu.lu@intel.com>
+
+ PR gas/26685
+ * config/tc-i386.c (process_suffix): Also check the register
+ operand for the address size prefix if the memory operand has
+ no real registers.
+ * testsuite/gas/i386/enqcmd-16bit.d: New file.
+ * testsuite/gas/i386/enqcmd-16bit.s: Likewise.
+ * testsuite/gas/i386/movdir-16bit.d: Likewise.
+ * testsuite/gas/i386/movdir-16bit.s: Likewise.
+ * testsuite/gas/i386/enqcmd.s: Add tests with symbol and DISP.
+ * testsuite/gas/i386/x86-64-enqcmd.s: Likewise.
+ * testsuite/gas/i386/x86-64-movdir.s: Likewise.
+ * testsuite/gas/i386/movdir.s: Add tests with symbol and DISP.
+ Remove the .code16 test.
+ * testsuite/gas/i386/i386.exp: Run movdir-16bit and enqcmd-16bit.
+ * testsuite/gas/i386/x86-64-enqcmd-intel.d: Updated.
+ * testsuite/gas/i386/x86-64-enqcmd.d: Likewise.
+ * testsuite/gas/i386/x86-64-movdir-intel.d: Likewise.
+ * testsuite/gas/i386/x86-64-movdir.d: Likewise.
+ * testsuite/gas/i386/enqcmd-intel.d: Likewise.
+ * testsuite/gas/i386/enqcmd.d: Likewise.
+ * testsuite/gas/i386/movdir-intel.d: Likewise.
+ * testsuite/gas/i386/movdir.d: Likewise.
+ * testsuite/gas/i386/x86-64-enqcmd-intel.d: Likewise.
+ * testsuite/gas/i386/x86-64-enqcmd.d: Likewise.
+ * testsuite/gas/i386/x86-64-movdir-intel.d: Likewise.
+ * testsuite/gas/i386/x86-64-movdir.d: Likewise.
+
+2020-10-02 Nick Clifton <nickc@redhat.com>
+
+ * testsuite/gas/arm/mve-vcvtne-it.d: Allow for padding inserted by
+ PE based targets.
+
+2020-10-01 Nick Clifton <nickc@redhat.com>
+
+ * config/obj-elf (elf_pseudo_table): Add attach_to_group.
+ (obj_elf_attach_to_group): New function.
+ * doc/as.texi: Document the new directive.
+ * NEWS: Mention the new feature.
+ * testsuite/gas/elf/attach-1.s: New test.
+ * testsuite/gas/elf/attach-1.d: New test driver.
+ * testsuite/gas/elf/attach-2.s: New test.
+ * testsuite/gas/elf/attach-2.d: New test driver.
+ * testsuite/gas/elf/attach-err.s: New test.
+ * testsuite/gas/elf/attach-err.d: New test driver.
+ * testsuite/gas/elf/attach-err.err: New test error output.
+ * testsuite/gas/elf/elf.exp: Run the new tests.
+
+2020-09-16 H.J. Lu <hongjiu.lu@intel.com>
+
+ PR gas/26685
+ * config/tc-i386.c (process_suffix): Check the register operand
+ for the address size prefix if the memory operand is symbol(%rip).
+ * testsuite/gas/i386/x86-64-enqcmd.s: Add tests with RIP-relative
+ addressing.
+ * testsuite/gas/i386/x86-64-movdir.s: Likewise.
+ * testsuite/gas/i386/x86-64-enqcmd-intel.d: Updated.
+ * testsuite/gas/i386/x86-64-enqcmd.d: Likewise.
+ * testsuite/gas/i386/x86-64-movdir-intel.d: Likewise.
+ * testsuite/gas/i386/x86-64-movdir.d: Likewise.
+
+2020-09-30 Przemyslaw Wirkus <przemyslaw.wirkus@arm.com>
+
+ * config/tc-aarch64.c: Add Cortex-A78 and Cortex-A78AE cores.
+ * doc/c-aarch64.texi: Update docs.
+ * NEWS: Update news.
+
+2020-09-30 Alex Coplan <alex.coplan@arm.com>
+
+ * NEWS: Mention recent Arm processor support.
+
2020-09-30 Alex Coplan <alex.coplan@arm.com>
* config/tc-aarch64.c (aarch64_cpus): Add neoverse-n2.
projects / deliverable / binutils-gdb.git / blobdiff