2008-03-07 Paul Brook <paul@codesourcery.com>
[deliverable/binutils-gdb.git] / gas / ChangeLog
index 99c63faa68776e55ca4dc09616d5d88ca9298d2f..b360a4b00addd575159b685d2c8461f002a6833e 100644 (file)
@@ -1,3 +1,36 @@
+2008-03-07  Paul Brook  <paul@codesourcery.com>
+
+       * config/tc-arm.c (md_apply_fix): Use correct offset range.
+
+2008-03-07  Alan Modra  <amodra@bigpond.net.au>
+
+       * config/tc-ppc.c (ppc_setup_opcodes): Tidy.  Add code to test
+       for strict ordering of powerpc_opcodes, but disable for now.
+
+2008-03-04  Paul Brook  <paul@codesourcery.com>
+
+       * config/tc-arm.c (arm_ext_barrier, arm_ext_msr): New.
+       (arm_ext_v7m): Rename...
+       (arm_ext_m): ... to this.  Include v6-M.
+       (do_t_add_sub): Allow narrow low-reg non flag setting adds.
+       (do_t_mrs, do_t_msr, aeabi_set_public_attributes): Use arm_ext_m.
+       (md_assemble): Allow wide msr instructions.
+       (insns): Add classifications for v6-m instructions.
+       (arm_cpu_option_table): Add cortex-m1.
+       (arm_arch_option_table): Add armv6-m.
+       (cpu_arch): Add ARM_ARCH_V6M.  Fix numbering of other v6 variants.
+
+2008-03-03  Sterling Augustine  <sterling@tensilica.com>
+           Bob Wilson  <bob.wilson@acm.org>
+       
+       * config/tc-xtensa.c (xtensa_num_pipe_stages): New.
+       (md_begin): Initialize it.
+       (resources_conflict): Use it.
+       
+2008-03-03  Sterling Augustine  <sterling@tensilica.com>
+       
+       * config/tc-xtensa.h (RELAX_XTENSA_NONE): New.
+       
 2008-03-03  Denys Vlasenko <vda.linux@googlemail.com>
            H.J. Lu  <hongjiu.lu@intel.com>
 
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