+2016-09-15 Jose E. Marchesi <jose.marchesi@oracle.com>
+
+ * testsuite/gas/sparc/sparc.exp (gas_64_check): Run
+ dcti-couples-v9 only in ELF targets to avoid spurious failures in
+ sparc-aout and sparc-coff targets.
+
+2016-09-14 Peter Bergner <bergner@vnet.ibm.com>
+
+ * testsuite/gas/ppc/power9.d <slbiag, cpabort> New tests.
+ <addex., brd, brh, brw, lwzmx, nandxor, rldixor, setbool,
+ xor3, cp_abort, copy_first, paste, paste_last, sync>: Remove tests.
+ <copy, paste.>: Update tests.
+ * testsuite/gas/ppc/power9.s: Likewise.
+
+2016-09-14 Jose E. Marchesi <jose.marchesi@oracle.com>
+
+ * config/tc-sparc.c (sparc_ip): Print the instruction arguments
+ in "architecture mismatch" error messages.
+
+2016-09-14 Jose E. Marchesi <jose.marchesi@oracle.com>
+
+ * config/tc-sparc.c (md_assemble): Detect and warning on
+ unpredictable DCTI couples in certain arches.
+ (dcti_couples_detect): New global.
+ (md_longopts): Add command line option -dcti-couples-detect.
+ (md_show_usage): Document -dcti-couples-detect.
+ (md_parse_option): Handle OPTION_DCTI_COUPLES_DETECT.
+ * testsuite/gas/sparc/sparc.exp (gas_64_check): Run
+ dcti-couples-v8, dcti-couples-v9 and dcti-couples-v9c tests.
+ * testsuite/gas/sparc/dcti-couples.s: New file.
+ * testsuite/gas/sparc/dcti-couples-v9c.d: Likewise.
+ * testsuite/gas/sparc/dcti-couples-v8.d: Likewise.
+ * testsuite/gas/sparc/dcti-couples-v9.d: Likewise.
+ * testsuite/gas/sparc/dcti-couples-v9c.l: Likewise.
+ * testsuite/gas/sparc/dcti-couples-v8.l: Likewise.
+ * doc/as.texinfo (Overview): Document --dcti-couples-detect.
+ * doc/c-sparc.texi (Sparc-Opts): Likewise.
+
+2016-09-14 Claudiu Zissulescu <claziss@synopsys.com>
+
+ * testsuite/gas/arc/tls-relocs2.d: New file.
+ * testsuite/gas/arc/tls-relocs2.s: Likewise.
+ * config/tc-arc.c (tokenize_arguments): Accept offsets when base
+ is used.
+
+2016-09-12 Andreas Krebbel <krebbel@linux.vnet.ibm.com>
+
+ * config/tc-s390.c (s390_parse_cpu): Support alternate arch
+ strings.
+ * doc/as.texinfo: Document new arch strings.
+ * doc/c-s390.texi: Likewise.
+
+2016-09-12 Andreas Krebbel <krebbel@linux.vnet.ibm.com>
+
+ * config/tc-s390.c: Set all facitily bits by default
+
+2016-09-12 Patrick Steuer <steuer@linux.vnet.ibm.com>
+
+ * testsuite/gas/s390/zarch-z196.d: Adjust testcase.
+
+2016-09-08 H.J. Lu <hongjiu.lu@intel.com>
+
+ * config/tc-i386.c (i386_target_format): Allow PROCESSOR_IAMCU
+ for Intel MCU.
+
+2016-09-07 H.J. Lu <hongjiu.lu@intel.com>
+
+ * config/tc-i386.c (valid_iamcu_cpu_flags): Removed.
+ (set_cpu_arch): Updated.
+ (md_parse_option): Likewise.
+ * testsuite/gas/i386/i386.exp: Run iamcu-4 and iamcu-5. Remove
+ iamcu-inval-2 and iamcu-inval-3.
+ * testsuite/gas/i386/iamcu-4.d: New file.
+ * testsuite/gas/i386/iamcu-4.s: Likewise.
+ * testsuite/gas/i386/iamcu-5.d: Likewise.
+ * testsuite/gas/i386/iamcu-5.s: Likewise.
+ * testsuite/gas/i386/iamcu-inval-2.l: Removed.
+ * testsuite/gas/i386/iamcu-inval-2.s: Likewise.
+ * testsuite/gas/i386/iamcu-inval-3.l: Likewise.
+ * testsuite/gas/i386/iamcu-inval-3.s: Likewise.
+
+2016-09-07 Richard Earnshaw <rearnsha@arm.com>
+
+ * config/tc-arm.c ((arm_cpus): Use ARM_ARCH_V8A_CRC for all
+ ARMv8-A CPUs except xgene1.
+
+2016-08-31 Alan Modra <amodra@gmail.com>
+
+ * config/tc-ppc.c (md_assemble): Set sh_flags for VLE. Test
+ ppc_cpu rather than calling ppc_mach to determine VLE mode.
+ (ppc_frag_check, ppc_handle_align): Likewise use ppc_cpu.
+
+2016-08-26 Jose E. Marchesi <jose.marchesi@oracle.com>
+
+ * testsuite/gas/sparc/crypto.d: Rename invalid opcode camellia_fi
+ to camellia_fl.
+ * testsuite/gas/sparc/crypto.s: Likewise.
+
+2016-08-26 Thomas Preud'homme <thomas.preudhomme@arm.com>
+
+ * config/tc-arm.c (v7m_psrs): Add MSPLIM, PSPLIM, MSPLIM_NS,
+ PSPLIM_NS, PRIMASK_NS, BASEPRI_NS, FAULTMASK_NS, CONTROL_NS, SP_NS and
+ their lowecase counterpart special registers. Write register
+ identifier in hex.
+ * testsuite/gas/arm/archv8m-cmse-msr.s: Reorganize tests per
+ operation, special register and then case. Use different register for
+ each operation. Add tests for new special registers.
+ * testsuite/gas/arm/archv8m-cmse-msr-base.d: Adapt expected result
+ accordingly.
+ * testsuite/gas/arm/archv8m-cmse-msr-main.d: Likewise.
+ * testsuite/gas/arm/archv8m-main-dsp-4.d: Likewise.
+
+2016-08-25 Thomas Preud'homme <thomas.preudhomme@arm.com>
+
+ * config/tc-arm.c (v7m_psrs): Remove msp_s, MSP_S, psp_s and PSP_S
+ special registers.
+ * testsuite/gas/arm/archv8m-cmse-msr.s: Remove test for above special
+ registers.
+ * testsuite/gas/arm/archv8m-cmse-msr-base.d: Likewise.
+ * testsuite/gas/arm/archv8m-cmse-msr-main.d: Likewise.
+ * testsuite/gas/arm/archv8m-main-dsp-4.d: Likewise.
+
+2016-08-24 H.J. Lu <hongjiu.lu@intel.com>
+
+ * config/tc-i386.c (cpu_arch): Add .ptwrite.
+ * doc/c-i386.texi: Document ptwrite and .ptwrite.
+ * testsuite/gas/i386/i386.exp: Run ptwrite, ptwrite-intel,
+ x86-64-ptwrite and x86-64-ptwrite-intel.
+ * testsuite/gas/i386/ptwrite-intel.d: New file.
+ * testsuite/gas/i386/ptwrite.d: Likewise.
+ * testsuite/gas/i386/ptwrite.s: Likewise.
+ * testsuite/gas/i386/x86-64-ptwrite-intel.d: Likewise.
+ * testsuite/gas/i386/x86-64-ptwrite.d: Likewise.
+ * testsuite/gas/i386/x86-64-ptwrite.s: Likewise.
+
+2016-08-19 Tamar Christina <tamar.christina@arm.com>
+
+ * config/tc-arm.c (do_co_reg2c): Added constraint.
+ * testsuite/gas/arm/dest-unpredictable.s: New.
+ * testsuite/gas/arm/dest-unpredictable.l: New.
+ * testsuite/gas/arm/dest-unpredictable.d: New.
+
+2016-08-19 Nick Clifton <nickc@redhat.com>
+
+ * testsuite/gas/i386/ilp32/x86-64-unwind.d: Adjust expected
+ ordering of sections.
+ * testsuite/gas/i386/x86-64-unwind.d: Likewise.
+ * testsuite/gas/ia64/alias-ilp32.d: Likewise.
+ * testsuite/gas/ia64/alias.d: Likewise.
+ * testsuite/gas/ia64/group-1.d: Likewise.
+ * testsuite/gas/ia64/group-2.d: Likewise.
+ * testsuite/gas/ia64/secname-ilp32.d: Likewise.
+ * testsuite/gas/ia64/secname.d: Likewise.
+ * testsuite/gas/ia64/unwind-ilp32.d: Likewise.
+ * testsuite/gas/ia64/unwind.d: Likewise.
+ * testsuite/gas/ia64/xdata-ilp32.d: Likewise.
+ * testsuite/gas/ia64/xdata.d: Likewise.
+ * testsuite/gas/mmix/bspec-1.d: Likewise.
+ * testsuite/gas/mmix/bspec-2.d: Likewise.
+ * testsuite/gas/mmix/byte-1.d: Likewise.
+ * testsuite/gas/mmix/loc-1.d: Likewise.
+ * testsuite/gas/mmix/loc-2.d: Likewise.
+ * testsuite/gas/mmix/loc-3.d: Likewise.
+ * testsuite/gas/mmix/loc-4.d: Likewise.
+ * testsuite/gas/mmix/loc-5.d: Likewise.
+ * testsuite/gas/tic6x/scomm-directive-4.d: Likewise.
+
+2016-08-11 Richard Sandiford <richard.sandiford@arm.com>
+
+ * config/tc-aarch64.c (parse_aarch64_imm_float): Reject -0.0.
+ * testsuite/gas/aarch64/illegal.s, testsuite/gas/aarch64/illegal.l:
+ Add tests for -0.0. Add an end-of-file comment.
+
+2016-08-05 Nick Clifton <nickc@redhat.com>
+
+ PR gas/20429
+ * config/tc-arm.c (do_vfp_nsyn_push): Check that no more than 16
+ registers are pushed.
+ (do_vfp_nsyn_pop): Check that no more than 16 registers are
+ popped.
+ * testsuite/gas/arm/pr20429.s: New test.
+ * testsuite/gas/arm/pr20429.d: New test driver.
+ * testsuite/gas/arm/pr20429.1: Expected error output.
+
+ PR gas/20364
+ * config/tc-aarch64.c (s_ltorg): Change the mapping state after
+ aligning the frag.
+ (aarch64_init): Treat rs_align frags in code sections as
+ containing code, not data.
+ * testsuite/gas/aarch64/pr20364.s: New test.
+ * testsuite/gas/aarch64/pr20364.d: New test driver.
+
+2016-08-04 Stefan Trleman <stefan.teleman@oracle.com>
+
+ PR gas/20427
+ * config/tc-sparc.c (cons_fix_new_sparc): Prevent the generation
+ of 64-bit relocation types when assembling for a 32-bit Solaris
+ target.
+
2016-07-27 Jose E. Marchesi <jose.marchesi@oracle.com>
* testsuite/gas/sparc/sparc.exp: Use is_elf_format to discriminate
projects / deliverable / binutils-gdb.git / blobdiff