+2017-02-28 Jan Beulich <jbeulich@suse.com>
+
+ * testsuite/gas/i386/x86-64-avx.s: Add suffixed variants of
+ VPCMPESTR{I,M}.
+ * testsuite/gas/i386/x86-64-sse2avx.s: Likewise.
+ * testsuite/gas/i386/x86-64-sse4_2.s: Add suffixed variants
+ of PCMPESTR{I,M}.
+ * testsuite/gas/i386/ilp32/x86-64-avx-intel.d: Likewise.
+ * testsuite/gas/i386/ilp32/x86-64-avx.d: Likewise.
+ * testsuite/gas/i386/ilp32/x86-64-sse2avx.d: Likewise.
+ * testsuite/gas/i386/ilp32/x86-64-sse4_2-intel.d: Likewise.
+ * testsuite/gas/i386/ilp32/x86-64-sse4_2.d: Likewise.
+ * testsuite/gas/i386/x86-64-avx-intel.d: Likewise.
+ * testsuite/gas/i386/x86-64-avx.d: Likewise.
+ * testsuite/gas/i386/x86-64-sse2avx.d: Likewise.
+ * testsuite/gas/i386/x86-64-sse4_2-intel.d: Likewise.
+ * testsuite/gas/i386/x86-64-sse4_2.d: Likewise.
+
+2017-02-28 Alan Modra <amodra@gmail.com>
+
+ * config/tc-nios2.h (TC_FORCE_RELOCATION_SUB_LOCAL): Define.
+
+2017-02-28 Alan Modra <amodra@gmail.com>
+
+ * config/tc-ppc.c (md_assemble): Use BFD_RELOC_PPC_16DX_HA for addpcis.
+ (md_apply_fix): Remove fx_subsy check. Move code converting to
+ pcrel reloc earlier and handle BFD_RELOC_PPC_16DX_HA. Remove code
+ emiiting errors on seeing fx_pcrel set on unexpected relocs, as
+ that is done now by the generic code via..
+ * config/tc-ppc.h (TC_FORCE_RELOCATION_SUB_LOCAL): ..this. Define.
+ (TC_VALIDATE_FIX_SUB): Define.
+
+2017-02-28 Maciej W. Rozycki <macro@imgtec.com>
+
+ * testsuite/gas/mips/jalr4.s: Add `jalr $0, $25' instructions.
+ * testsuite/gas/mips/jalr4.d: Adjust accordingly. Remove MIPSr6
+ encoding patterns.
+ * testsuite/gas/mips/jalr4-n64.d: Likewise.
+ * testsuite/gas/mips/mipsr6@jalr4.d: New test.
+ * testsuite/gas/mips/mipsr6@jalr4-n32.d: New test.
+ * testsuite/gas/mips/mipsr6@jalr4-n64.d: New test.
+
+2017-02-25 Alan Modra <amodra@gmail.com>
+
+ * testsuite/gas/elf/strtab.s: Don't put directives on first
+ column or continuation with labels not in first column.
+
+2017-02-24 Richard Sandiford <richard.sandiford@arm.com>
+
+ * doc/c-aarch64.texi: Document that sve implies fp16, simd and compnum.
+ * config/tc-aarch64.c (parse_vector_type_for_operand): Allow .q
+ to be used with SVE registers.
+ (parse_operands): Handle new SVE operands.
+ (aarch64_features): Make "sve" require F16 rather than FP. Also
+ require COMPNUM.
+ * testsuite/gas/aarch64/sve.s: Add tests for new instructions.
+ Include compnum tests.
+ * testsuite/gas/aarch64/sve.d: Update accordingly.
+ * testsuite/gas/aarch64/sve-invalid.s: Add tests for new instructions.
+ * testsuite/gas/aarch64/sve-invalid.l: Update accordingly. Also
+ update expected output for new FMOV and MOV alternatives.
+
+2017-02-24 Richard Sandiford <richard.sandiford@arm.com>
+
+ * doc/c-aarch64.texi: Add a "compnum" entry.
+ * config/tc-aarch64.c (aarch64_features): Likewise,
+ * testsuite/gas/aarch64/advsimd-compnum.s: New test.
+ * testsuite/gas/aarch64/advsimd-compnum.d: Likewise.
+
+2017-02-24 Jan Beulich <jbeulich@suse.com>
+
+ * testsuite/gas/i386/opcode.s: Add alternative TEST forms.
+ * testsuite/gas/i386/x86-64-opcode.s: Likewise.
+ * testsuite/gas/i386/opcode.d: Adjust accordingly.
+ * testsuite/gas/i386/opcode-intel.d: Likewise.
+ * testsuite/gas/i386/x86-64-opcode.d: Likewise.
+ * testsuite/gas/i386/ilp32/x86-64-opcode.d: Likewise.
+
+2017-02-24 Sheldon Lobo <sheldon.lobo@oracle.com>
+
+ Test cases for the architecture level aware SPARC ASI work.
+ * gas/testsuite/gas/sparc/sparc.exp: 2 new tests
+ * gas/testsuite/gas/sparc/asi-bump-warn.s: New test
+ * gas/testsuite/gas/sparc/asi-bump-warn.l: Likewise
+ * gas/testsuite/gas/sparc/asi-arch-error.s: Likewise
+ * gas/testsuite/gas/sparc/asi-arch-error.l: Likewise
+
+2017-02-23 Maciej W. Rozycki <macro@imgtec.com>
+
+ * testsuite/gas/mips/jalr4.d: New test.
+ * testsuite/gas/mips/jalr4-n32.d: New test.
+ * testsuite/gas/mips/jalr4-n64.d: New test.
+ * testsuite/gas/mips/jalr4.s: New test source.
+ * testsuite/gas/mips/mips.exp: Run the new tests.
+
+2017-02-23 Sheldon Lobo <sheldon.lobo@oracle.com>
+
+ Add support for associating SPARC ASIs with an architecture level.
+ * config/tc-sparc.c (parse_sparc_asi): New encode SPARC ASIs.
+
+2017-02-23 Jan Beulich <jbeulich@suse.com>
+
+ * testsuite/gas/all/err-sizeof.s: Don't use sums or differences
+ of symbols as expression.
+
+2017-02-23 Jan Beulich <jbeulich@suse.com>
+
+ * gas/testsuite/gas/i386/x86-64-mpx-inval-2.d: Add 32- and 16-
+ bit GPR forms of BNDCL, BNDCU, and BNDCN. Add RSP-as-index
+ Intel syntax forms of BNDMK, BNDSTX, and BNDLDX.
+ * gas/testsuite/gas/i386/x86-64-mpx-inval-2.l: Adjust.
+
+2017-02-22 Maciej W. Rozycki <macro@imgtec.com>
+
+ * ecoff.c (ecoff_directive_end) [md_flush_pending_output]: Call
+ `md_flush_pending_output'.
+ * config/tc-mips.c (s_mips_end) [md_flush_pending_output]: Call
+ `md_flush_pending_output' unconditionally.
+ * testsuite/gas/mips/debug-label-end-1.d: New test.
+ * testsuite/gas/mips/debug-label-end-2.d: New test.
+ * testsuite/gas/mips/debug-label-end-3.d: New test.
+ * testsuite/gas/mips/debug-label-end.s: New test source.
+ * testsuite/gas/mips/mips.exp: Run the new tests.
+
+2017-02-22 Hans-Peter Nilsson <hp@axis.com>
+
+ * testsuite/gas/all/err-sizeof.s: Include cris*-*-* in the list of
+ targets yielding an error message matching "too complex".
+
+2017-02-22 Nick Clifton <nickc@redhat.com>
+
+ * testsuite/gas/arm/vcmp-noprefix-imm.d: Skip for non-ELF targets.
+
+2017-02-21 Jan Beulich <jbeulich@suse.com>
+
+ * expr.c (operand): Handle missing operand to .startof.() and
+ .sizeof.().
+ * testsuite/gas/all/err-sizeof.s: New.
+
+2017-02-20 Alan Modra <amodra@gmail.com>
+
+ PR 21118
+ * NEWS: Revise powerpc register check.
+ * config/tc-ppc.c (ppc_optimize_expr, md_assemble): Make "invalid
+ register expression" a warning.
+
+2017-02-17 Maciej W. Rozycki <macro@imgtec.com>
+
+ * ecoff.c (ecoff_directive_ent, add_procedure): Handle `.aent'.
+ * config/obj-ecoff.c (obj_pseudo_table): Add "aent" entry.
+ * config/obj-elf.c (ecoff_debug_pseudo_table): Likewise.
+ * testsuite/gas/mips/aent-2.d: New test.
+ * testsuite/gas/mips/aent-mdebug.d: New test.
+ * testsuite/gas/mips/aent-mdebug-2.d: New test.
+ * testsuite/gas/mips/mips.exp: Run the new tests.
+
+2017-02-15 Richard Sandiford <richard.sandiford@arm.com>
+
+ * testsuite/gas/aarch64/sve-sysreg.s,
+ testsuite/gas/aarch64/sve-sysreg.d,
+ testsuite/gas/aarch64/sve-sysreg-invalid.d,
+ testsuite/gas/aarch64/sve-sysreg-invalid.l: New tests.
+
+2017-02-15 Richard Sandiford <richard.sandiford@arm.com>
+
+ * doc/c-aarch64.texi: Fix sve entry.
+
+2017-02-15 Claudiu Zissulescu <claziss@synopsys.com>
+
+ * config/tc-arc.c (md_convert_frag): Remove @pcl relocation
+ information from input expression.
+ (assemble_insn): Make sure pcrel is correctly set.
+ (arc_pcrel_adjust): Compensate for PCL rounding.
+ * testsuite/gas/arc/relax-add01.d: New file.
+ * testsuite/gas/arc/relax-add01.s: Likewise.
+ * testsuite/gas/arc/relax-add02.d: Likewise.
+ * testsuite/gas/arc/relax-add02.s: Likewise.
+ * testsuite/gas/arc/relax-add03.d: Likewise.
+ * testsuite/gas/arc/relax-add03.s: Likewise.
+ * testsuite/gas/arc/relax-add04.d: Likewise.
+ * testsuite/gas/arc/relax-add04.s: Likewise.
+ * testsuite/gas/arc/relax-ld01.d: Likewise.
+ * testsuite/gas/arc/relax-ld01.s: Likewise.
+ * testsuite/gas/arc/relax-ld02.d: Likewise.
+ * testsuite/gas/arc/relax-ld02.s: Likewise.
+ * testsuite/gas/arc/relax-mov01.d: Likewise.
+ * testsuite/gas/arc/relax-mov01.s: Likewise.
+ * testsuite/gas/arc/relax-mov02.d: Likewise.
+ * testsuite/gas/arc/relax-mov02.s: Likewise.
+ * testsuite/gas/arc/relax-mpy01.d: Likewise.
+ * testsuite/gas/arc/relax-mpy01.s: Likewise.
+ * testsuite/gas/arc/relax-sub01.d: Likewise.
+ * testsuite/gas/arc/relax-sub01.s: Likewise.
+ * testsuite/gas/arc/relax-sub02.d: Likewise.
+ * testsuite/gas/arc/relax-sub02.s: Likewise.
+ * testsuite/gas/arc/relax-sub03.d: Likewise.
+ * testsuite/gas/arc/relax-sub03.s: Likewise.
+ * testsuite/gas/arc/relax-sub04.d: Likewise.
+ * testsuite/gas/arc/relax-sub04.s: Likewise.
+
+2017-02-09 Vineet Gupta <vgupta@synopsys.com>
+
+ * testsuite/gas/arc/st.d: Update for 0xe having a name now
+
+2017-02-14 Alan Modra <amodra@gmail.com>
+
+ PR 21118
+ * NEWS: Mention powerpc register checks.
+ * config/tc-ppc.c (struct pd_reg): Make value a short. Add flags.
+ (pre_defined_registers): Delete fpscr and pmr entries. Set
+ register type in flags.
+ (cr_names): Set type in flags.
+ (reg_name_search): Return pointer to struct pd_reg rather than value.
+ (register_name): Adjust to suit. Set X_md from flags.
+ (ppc_parse_name): Likewise.
+ (ppc_optimize_expr): New function.
+ (md_assemble): Verify expresion reg flags match operand.
+ * config/tc-ppc.h (md_optimize_expr): Define.
+ (ppc_optimize_expr): Declare.
+
+2017-02-14 Alan Modra <amodra@gmail.com>
+
+ * testsuite/gas/ppc/cell.s: Correct invalid registers.
+ * testsuite/gas/ppc/vle-simple-1.s: Likewise.
+ * testsuite/gas/ppc/vle-simple-2.s: Likewise.
+
+2017-02-13 Thomas Preud'homme <thomas.preudhomme@arm.com>
+
+ * config/tc-arm.c (parse_ifimm_zero): Make prefix optional in unified
+ syntax.
+ * testsuite/gas/arm/vcmp-noprefix-imm.d: New file.
+ * testsuite/gas/arm/vcmp-noprefix-imm.s: New file.
+
+2017-02-10 Nicholas Piggin <npiggin@gmail.com>
+
+ * testsuite/gas/ppc/power9.d <scv, rfscv>: New tests.
+
+2017-02-02 Maciej W. Rozycki <macro@imgtec.com>
+
+ * doc/as.texinfo (Overview): Select MIPS options for man page
+ inclusion.
+
+2017-01-30 Maciej W. Rozycki <macro@imgtec.com>
+
+ * config/tc-mips.c (mips_ignore_branch_isa): New variable.
+ (options): Add OPTION_IGNORE_BRANCH_ISA and
+ OPTION_NO_IGNORE_BRANCH_ISA enum values.
+ (md_longopts): Add "mignore-branch-isa" and
+ "mno-ignore-branch-isa" options.
+ (md_parse_option): Handle OPTION_IGNORE_BRANCH_ISA and
+ OPTION_NO_IGNORE_BRANCH_ISA.
+ (fix_bad_cross_mode_branch_p): Return FALSE if
+ `mips_ignore_branch_isa' has been set.
+ (md_show_usage): Add `-mignore-branch-isa' and
+ `-mno-ignore-branch-isa'.
+
+ * doc/as.texinfo (Target MIPS options): Add
+ `-mignore-branch-isa' and `-mno-ignore-branch-isa' options.
+ (-mignore-branch-isa, -mno-ignore-branch-isa): New options.
+ * doc/c-mips.texi (MIPS Options): Add `-mignore-branch-isa' and
+ `-mno-ignore-branch-isa' options.
+
+ * testsuite/gas/mips/branch-local-ignore-2.d: New test.
+ * testsuite/gas/mips/branch-local-ignore-3.d: New test.
+ * testsuite/gas/mips/branch-local-ignore-n32-2.d: New test.
+ * testsuite/gas/mips/branch-local-ignore-n32-3.d: New test.
+ * testsuite/gas/mips/branch-local-ignore-n64-2.d: New test.
+ * testsuite/gas/mips/branch-local-ignore-n64-3.d: New test.
+ * testsuite/gas/mips/mips.exp: Run the new tests.
+
+2017-01-30 Maciej W. Rozycki <macro@imgtec.com>
+
+ * testsuite/gas/mips/branch-local-2.d: New test.
+ * testsuite/gas/mips/branch-local-3.d: New test.
+ * testsuite/gas/mips/branch-local-n32-2.d: New test.
+ * testsuite/gas/mips/branch-local-n32-3.d: New test.
+ * testsuite/gas/mips/branch-local-n64-2.d: New test.
+ * testsuite/gas/mips/branch-local-n64-3.d: New test.
+ * testsuite/gas/mips/mips.exp: Fold corresponding list tests
+ into the new tests.
+
+2017-01-27 Alexis Deruell <alexis.deruelle@gmail.com>
+
+ PR 21056
+ * testsuite/gas/tic6x/insns16-parallel.s: New test case.
+ * testsuite/gas/tic6x/insns16-parallel.d: New test driver.
+
2017-01-25 Sebastian Huber <sebastian.huber@embedded-brains.de>
* configure.tgt (aarch64*-*-rtems*): Remove.