+2008-04-23 David S. Miller <davem@davemloft.net>
+
+ * config/tc-sparc.c (v9a_asr_table): Add missing
+ 'stick' and 'stick_cmpr', and document ordering rules
+ of table.
+ (tc_gen_reloc): Accept BFD_RELOC_SPARC_PC22 and
+ BFD_RELOC_SPARC_PC10.
+ * doc/c-sparc.texi: New section on Sparc constants.
+ Add documentation for %stick and %stick_cmpr.
+
+2008-04-22 H.J. Lu <hongjiu.lu@intel.com>
+
+ * config/tc-i386.c (md_assemble): Don't check SSE instructions
+ if noavx is 0.
+
+2008-04-18 David S. Miller <davem@davemloft.net>
+
+ * doc/c-sparc.texi: Add syntax section.
+
+2008-04-18 H.J. Lu <hongjiu.lu@intel.com>
+
+ * config/tc-i386.c (build_modrm_byte): Don't check FMA to swap
+ REG and NDS for instructions with immediate operand.
+
+2008-04-18 H.J. Lu <hongjiu.lu@intel.com>
+
+ * config/tc-i386.c (build_modrm_byte): Swap REG and NDS for
+ FMA.
+
+2008-04-16 David S. Miller <davem@davemloft.net>
+
+ * config/tc-sparc.c (sparc_ip): Add support for gotdata mnemonics
+ and relocation generation.
+ (tc_gen_reloc): Likewise.
+
+2008-04-15 Andrew Stubbs <andrew.stubbs@st.com>
+
+ * config/tc-sh.c (md_apply_fix): Make sure BFD_RELOC_SH_PCRELIMM8BY4
+ relocations are properly aligned, and not negative.
+
+2008-04-15 Khem Raj <kraj@mvista.com>
+
+ * doc/tc-arm.texi: Fix fnstart and fnend directive names.
+
+2008-04-14 Edmar Wienskoski <edmar@freescale.com>
+
+ * config/tc-ppc.c (parse_cpu): Handle "e500mc". Extend "e500" to
+ accept e500mc instructions.
+ (md_show_usage): Document -me500mc.
+
+2008-04-11 Nick Clifton <nickc@redhat.com>
+
+ * listing.c (print_timestamp): Use localtime rather than
+ localtime_r since not all build environments provide the latter.
+
+2008-04-10 H.J. Lu <hongjiu.lu@intel.com>
+
+ * NEWS: Mention -msse-check=[none|error|warning].
+
+ * config/tc-i386.c (sse_check): New.
+ (OPTION_MSSE_CHECK): Likewise.
+ (md_assemble): Check SSE instructions if needed.
+ (md_longopts): Add -msse-check.
+ (md_parse_option): Handle OPTION_MSSE_CHECK.
+ (md_show_usage): Show -msse-check=[none|error|warning].
+
+ * doc/c-i386.texi: Document -msse-check=[none|error|warning].
+
+2008-04-10 Santiago Urueña <suruena@gmail.com>
+
+ * listing.c: Add -ag listing flag to show general information in
+ listings such as gas version, passed options, and time stamp.
+ (listing_general_info): New function.
+ (print_options): New function.
+ (print_single_option): New function.
+ (print_timestamp): New function.
+ (MAX_DATELEN): Define.
+ (listing_print): Add call to listing_general_info.
+ * listing.h (LISTING_GENERAL): Define.
+ (listing_print): Add new parameter.
+ * as.c (show_usage): Print new switch.
+ (parse_args): Parse new switch.
+ (main): Pass command line on to listing_print.
+ * NEWS: Mention this new feature.
+ * doc/as.texinfo: Document the new sub-option.
+
+2008-04-08 Alan Modra <amodra@bigpond.net.au>
+
+ * dwarf2dbg.c (dwarf2_emit_insn): Simplify test before dwarf2_where
+ call. Delete out of date comment.
+ (dwarf2_consume_line_info): Always clear dwarf2_loc_directive_seen.
+ (dwarf2_emit_label): Don't emit unless there has been a previous
+ .file or we are outputting assembler generated debug.
+ dwarf2_consume_line_info after emitting line info, not before.
+ (out_debug_info): Simplify files_in_use test.
+
+2008-04-07 H.J. Lu <hongjiu.lu@intel.com>
+
+ * config/tc-i386.c (parse_real_register): Return AVX register
+ only if AVX is enabled.
+
+2008-04-07 Kaz Kojima <kkojima@rr.iij4u.or.jp>
+
+ PR gas/6043
+ * config/tc-sh64.c (shmedia_md_pcrel_from_section): Use
+ md_pcrel_from_section for BFD_RELOC_64 and BFD_RELOC_64_PCREL.
+
+2008-04-04 Adrian Bunk <bunk@stusta.de>
+ Bob Wilson <bob.wilson@acm.org>
+
+ * config/tc-xtensa.c (xg_apply_fix_value): Check return code from
+ call to decode_reloc.
+
+2008-04-04 H.J. Lu <hongjiu.lu@intel.com>
+
+ * NEWS: Mention XSAVE. Change CLMUL to PCLMUL.
+
+ * config/tc-i386.c (cpu_arch): Add .pclmul.
+ (md_show_usage): Replace clmul with pclmul.
+ * doc/c-i386.texi: Likewise.
+
+2008-04-03 H.J. Lu <hongjiu.lu@intel.com>
+
+ * NEWS: Mention AES, CLMUL, AVX/FMA and -msse2avx.
+
+ * doc/c-i386.texi: Add avx, aes, clmul and fma to -march=.
+ Document -msse2avx, .avx, .aes, .clmul and .fma.
+
+ * config/tc-i386.c (YMMWORD_MNEM_SUFFIX): New.
+ (vex_prefix): Likewise.
+ (sse2avx): Likewise.
+ (CPU_FLAGS_ARCH_MATCH): Likewise.
+ (CPU_FLAGS_64BIT_MATCH): Likewise.
+ (CPU_FLAGS_32BIT_MATCH): Likewise.
+ (CPU_FLAGS_PERFECT_MATCH): Likewise.
+ (regymm): Likewise.
+ (vex_imm4): Likewise.
+ (fits_in_imm4): Likewise.
+ (build_vex_prefix): Likewise.
+ (VEX_check_operands): Likewise.
+ (bad_implicit_operand): Likewise.
+ (OPTION_MSSE2AVX): Likewise.
+ (T_YMMWORD): Likewise.
+ (_i386_insn): Add vex.
+ (cpu_arch): Add .avx, .aes, .clmul and .fma.
+ (cpu_flags_match): Changed to take a pointer to const template.
+ Enable encoding SSE instructions with VEX prefix for -msse2avx.
+ (match_mem_size): Also check ymmword.
+ (operand_type_match): Clear ymmword.
+ (md_begin): Allow '_' in mnemonic.
+ (type_names): Add OPERAND_TYPE_VEX_IMM4.
+ (process_immext): Update assert.
+ (md_assemble): Don't call process_immext if sse2avx and immext
+ are true. Call build_vex_prefix if vex is true.
+ (parse_insn): Updated for cpu_flags_match.
+ (swap_operands): Handle 5 operands.
+ (match_template): Handle 5 operands. Updated for cpu_flags_match.
+ Check regymm. Call VEX_check_operands. Handle YMMWORD_MNEM_SUFFIX.
+ (process_suffix): Handle YMMWORD_MNEM_SUFFIX.
+ (check_byte_reg): Check regymm.
+ (process_operands): Duplicate the destination register for
+ -msse2avx if needed.
+ (build_modrm_byte): Updated for instructions with VEX encoding.
+ (output_insn): Output VEX prefix if needed.
+ (md_longopts): Add msse2avx.
+ (md_parse_option): Handle OPTION_MSSE2AVX.
+ (md_show_usage): Add avx, aes, clmul, fma and -msse2avx.
+ (intel_e09): Support YMMWORD.
+ (intel_e11): Likewise.
+ (intel_get_token): Likewise.
+
+2008-03-28 Eric B. Weddington <eric.weddington@atmel.com>
+
+ * config/tc-avr.c (mcu_types): Add attiny167.
+ * doc/c-avr.texi: Likewise.
+
+2008-03-28 Eric B. Weddington <eric.weddington@atmel.com>
+
+ * config/tc-avr.c (mcu_types): Add atmega32u4.
+ * doc/c-avr.texi: Likewise.
+
+2008-03-28 Eric B. Weddington <eric.weddington@atmel.com>
+
+ * config/tc-avr.c (mcu_types): Add atmega32c1.
+ * doc/c-avr.texi: Likewise.
+
+2008-03-28 Paul Brook <paul@codesourcery.com>
+
+ * config/tc-arm.c (parse_neon_mov): Parse register before immediate
+ to avoid spurious symbols.
+
+2008-03-28 Nathan Sidwell <nathan@codesourcery.com>
+
+ * config/tc-m68k.c (md_convert_frag_1): Replace as_fatal with
+ as_bad_where.
+
+2008-03-27 Eric B. Weddington <eric.weddington@atmel.com>
+
+ * config/tc-avr.c (mcu_types): Add atmega32m1.
+ * doc/c-avr.texi: Likewise.
+
+2008-03-27 Ineiev <ineiev@yahoo.co.uk>
+
+ * config/tc-arm.c (do_neon_cvt): Move variable declarations to
+ start of block.
+ (do_neon_ext): Fix sign of comparison.
+
+2008-03-26 Bernd Schmidt <bernd.schmidt@analog.com>
+
+ From Jie Zhang <jie.zhang@analog.com>
+ * config/bfin-parse.y (asm_1): Check AREGS in comparison
+ instructions. And call yyerror when comparing PREG with
+ DREG.
+ (check_macfunc_option): New.
+ (check_macfuncs): Check option by calling check_macfunc_option.
+ Fix comparison always true warnings. Both scalar instructions
+ of vector instruction must share the same mode option. Only allow
+ option mode at the end of the second instruction of the vector.
+ (asm_1): Check option by calling check_macfunc_option.
+
+ * config/bfin-parse.y (check_macfunc_option): Allow (IU)
+ option for multiply and multiply-accumulate to data register
+ instruction.
+ (check_macfuncs): Don't check if accumulator matches the data register
+ here.
+ (assign_macfunc): Check if accumulator matches the
+ data register in each rule that moves to the data
+ register.
+
+ * config/tc-bfin.c (bfin_start_line_hook): Localize the labels
+ generated for LOOP_BEGIN and LOOP_END instructions.
+ (bfin_gen_loop): Likewise.
+
+2008-03-19 Andreas Krebbel <krebbel1@de.ibm.com>
+
+ * config/tc-s390.c (md_parse_option): z10 option added.
+
+2008-03-17 Ralf Wildenhues <Ralf.Wildenhues@gmx.de>
+
+ * aclocal.m4: Regenerate.
+ * configure: Likewise.
+ * Makefile.in: Likewise.
+ * doc/Makefile.in: Likewise.
+
+2008-03-17 Adrian Bunk <bunk@stusta.de>
+
+ PR 5946
+ * config/tc-hppa.c (is_same_frag): Delete.
+
+2008-03-14 Sterling Augustine <sterling@tensilica.com>
+
+ * config/tc-xtensa.h (xtensa_relax_statesE): Update comment for
+ RELAX_LOOP_END_ADD_NOP.
+
+2008-03-13 Evandro Menezes <evandro@yahoo.com>
+
+ PR gas/5895
+ * read.c (s_mexit): Warn if attempting to exit a macro when not
+ inside a macro definition.
+
+2008-03-13 Alan Modra <amodra@bigpond.net.au>
+
+ * Makefile.am: Run "make dep-am".
+ * Makefile.in: Regenerate.
+ * configure: Regenerate.
+
+2008-03-09 Paul Brook <paul@codesourcery.com>
+
+ * config/tc-arm.c (arm_cpu_option_table): Add cortex-a9.
+ * doc/c-arm.texi: Add cortex-a9.
+
+2008-03-09 Paul Brook <paul@codesourcery.com>
+
+ * config/tc-arm.c (fpu_vfp_ext_d32): New vairable.
+ (parse_vfp_reg_list, encode_arm_vfp_reg): Use it.
+ (arm_option_cpu_value): Add vfpv3-d16, vfpv2 and vfpv3.
+ (aeabi_set_public_attributes): Handle Tag_VFP_arch=VFPV3-D16.
+ * doc/c-arm.texi: Document new ARM FPU variants.
+
+2008-03-07 Paul Brook <paul@codesourcery.com>
+
+ * config/tc-arm.c (md_apply_fix): Use correct offset range.
+
+2008-03-07 Alan Modra <amodra@bigpond.net.au>
+
+ * config/tc-ppc.c (ppc_setup_opcodes): Tidy. Add code to test
+ for strict ordering of powerpc_opcodes, but disable for now.
+
+2008-03-04 Paul Brook <paul@codesourcery.com>
+
+ * config/tc-arm.c (arm_ext_barrier, arm_ext_msr): New.
+ (arm_ext_v7m): Rename...
+ (arm_ext_m): ... to this. Include v6-M.
+ (do_t_add_sub): Allow narrow low-reg non flag setting adds.
+ (do_t_mrs, do_t_msr, aeabi_set_public_attributes): Use arm_ext_m.
+ (md_assemble): Allow wide msr instructions.
+ (insns): Add classifications for v6-m instructions.
+ (arm_cpu_option_table): Add cortex-m1.
+ (arm_arch_option_table): Add armv6-m.
+ (cpu_arch): Add ARM_ARCH_V6M. Fix numbering of other v6 variants.
+
+2008-03-03 Sterling Augustine <sterling@tensilica.com>
+ Bob Wilson <bob.wilson@acm.org>
+
+ * config/tc-xtensa.c (xtensa_num_pipe_stages): New.
+ (md_begin): Initialize it.
+ (resources_conflict): Use it.
+
+2008-03-03 Sterling Augustine <sterling@tensilica.com>
+
+ * config/tc-xtensa.h (RELAX_XTENSA_NONE): New.
+
+2008-03-03 Denys Vlasenko <vda.linux@googlemail.com>
+ H.J. Lu <hongjiu.lu@intel.com>
+
+ PR gas/5543
+ * read.c (pseudo_set): Don't allow global register symbol.
+
+ * symbols.c (S_SET_EXTERNAL): Don't allow register symbol
+ global.
+
+2008-03-03 H.J. Lu <hongjiu.lu@intel.com>
+
+ PR gas/5543
+ * write.c (write_object_file): Don't allow symbols which were
+ equated to register. Stop if there is an error.
+
+2008-03-01 Alan Modra <amodra@bigpond.net.au>
+
+ * config/tc-ppc.h (struct _ppc_fix_extra): New.
+ (ppc_cpu): Declare.
+ (TC_FIX_TYPE, TC_INIT_FIX_DATA): Define.
+ * config/tc-ppc.c (ppu_cpu): Make global.
+ (ppc_insert_operand): Add ppu_cpu parameter.
+ (md_assemble): Adjust for above change.
+ (md_apply_fix): Pass tc_fix_data.ppc_cpu to ppc_insert_operand.
+
2008-02-22 Nick Clifton <nickc@redhat.com>
* config/tc-arm.c (do_bx): Only test EF_ARM_EABI_VERSION on ELF
- targeted ARM ports.
+ targeted ARM ports, otherwise just skip generating the reloc.
2008-02-18 H.J. Lu <hongjiu.lu@intel.com>
projects / deliverable / binutils-gdb.git / blobdiff