+2012-09-20 Michael Zolotukhin <michael.v.zolotukhin@intel.com>
+
+ * config/tc-i386.c (cpu_arch): Add .cx16.
+ * doc/c-i386.texi: Document .cx16.
+
+2012-09-19 Steve Ellcey <sellcey@mips.com>
+
+ * configure.tgt: Add mips*-mti-elf* target.
+
+2012-09-18 Kyrylo Tkachov <kyrylo.tkachov@arm.com>
+
+ * config/tc-arm.c: Changed ldra and strl-form mnemonics
+ to lda and stl-form for armv8.
+
+2012-09-17 Yufeng Zhang <yufeng.zhang@arm.com>
+
+ * config/tc-aarch64.c (aarch64_archs): Rename 'armv8' to 'armv8-a'.
+
+2012-09-14 David Edelsohn <dje.gcc@gmail.com>
+
+ * configure: Regenerate.
+
+2012-09-13 Anthony Green <green@moxielogic.com>
+
+ * config/tc-moxie.h (DEFAULT_TARGET_FORMAT): Define.
+ (TARGET_FORMAT): Don't hard-code endian-ness.
+ * config/tc-moxie.c (target_big_endian, moxie_target_format):
+ Define.
+ (md_assemble): Handle bi-endian encodings.
+ (md_shortopts, md_parse_option, md_show_usage, md_apply_fix)
+ (md_number_to_chars, md_chars_to_number): Update for bi-endian
+ support.
+
+2012-09-12 Chris Schlumberger-Socha <chris.schlumberger-socha@arm.com>
+
+ * config/tc-aarch64.c
+ (reloc_table): Add reloc to table entry.
+ (parse_address_main): Add support for #:<reloc_op>:<symbol>.
+ (parse_operands): Check for unused reloc.
+ (md_apply_fix): New case for reloc.
+ (aarch64_force_relocation): Likewise.
+
+2012-09-11 Georg-Johann Lay <avr@gjlay.de>
+
+ PR gas/13503
+ * config/tc-avr.h (TC_VALIDATE_FIX): Skip: BFD_RELOC_AVR_8_LO,
+ BFD_RELOC_AVR_8_HI, BFD_RELOC_AVR_8_HLO.
+
+2012-09-11 Alan Modra <amodra@gmail.com>
+
+ * Makefile.am (bootstrap): Add $EXEEXT to dependency.
+ * Makefile.in: Regenerate.
+
+2012-09-10 Matthias Klose <doko@ubuntu.com>
+
+ * config.in: Disable sanity check for kfreebsd.
+
+2012-09-10 H.J. Lu <hongjiu.lu@intel.com>
+
+ * configure: Regenerated.
+
+2012-09-07 Anthony Green <green@moxielogic.com>
+
+ * config/tc-moxie.c (md_pcrel_from): Branches are now relative
+ to the address following the branch instruction.
+
+2012-09-06 Andreas Krebbel <Andreas.Krebbel@de.ibm.com>
+
+ * config/tc-s390.c (set_highgprs_p): New variable.
+ (s390_machinemode): New function.
+ (md_pseudo_table): Add new pseudo command machinemode.
+ (md_parse_option): Set set_highgprs_p to TRUE if -mzarch was
+ specified on command line.
+ (s390_elf_final_processing): Set the highgprs flag in the ELF
+ header depending on set_highgprs_p.
+
+ * doc/c-s390.texi: Document new pseudo machinemode.
+
+2012-09-05 James Lemke <jwlemke@codesourcery.com>
+
+ * doc/c-ppc.texi: Document -mvle.
+ * doc/as.texinfo: Likewise.
+
+2012-09-04 Sergey A. Guriev <sergey.a.guriev@intel.com>
+
+ * config/tc-ia64.c (reg_symbol): Add a new register.
+ (indirect_reg): Ditto.
+ (pseudo_func): Add new symbolic constants.
+ (operand_match): Add new operand types recognition.
+ (operand_insn): Add new register recognition.
+ (md_begin): Add new register definition.
+ (specify_resource): Add new register recognition.
+
+2012-09-01 Hans-Peter Nilsson <hp@bitrange.com>
+
+ PR gas/14521
+ * config/tc-mmix.h (tc_frob_file_before_fix): Renumber sections
+ after call to mmix_frob_file.
+
+2012-08-31 Maciej W. Rozycki <macro@codesourcery.com>
+
+ * doc/c-mips.texi (MIPS Opts): Correct a typo in the -mips5
+ option.
+
+2012-08-27 Walter Lee <walt@tilera.com>
+
+ * tc-tilegx.c (O_hw0_plt): Define operator.
+ (O_hw1_plt): Ditto.
+ (O_hw1_last_plt): Ditto.
+ (O_hw2_last_plt): Ditto.
+ (md_begin): Handle new operators.
+ (emit_tilegx_instruction): Ditto.
+ (md_apply_fix): Ditto.
+ * doc/c-tilegx.texi: Document new operators.
+
+2012-08-24 Matthew Gretton-Dann <matthew.gretton-dann@arm.com>
+
+ * config/tc-arm.c (ARM_ENC_TAB): Add sha1h and sha2op entries.
+ (do_sha1h): New function.
+ (do_sha1su1): Likewise.
+ (do_sha256su0): Likewise.
+ (insns): Add 2 operand SHA instructions.
+
+2012-08-24 Matthew Gretton-Dann <matthew.gretton-dann@arm.com>
+
+ * config/tc-arm.c (NEON_ENC_TAB): Add sha3op entry.
+ (do_crypto_3op_1): New function.
+ (do_sha1c): Likewise.
+ (do_sha1p): Likewise.
+ (do_sha1m): Likewise.
+ (do_sha1su0): Likewise.
+ (do_sha256h): Likewise.
+ (do_sha256h2): Likewise.
+ (do_sha256su1): Likewise.
+ (insns): Add SHA 3 operand instructions.
+
+2012-08-24 Matthew Gretton-Dann <matthew.gretton-dann@arm.com>
+
+ * config/tc-arm.c (neon_type_mask): Add P64 type.
+ (type_chk_of_el_type): Handle P64 type.
+ (el_type_of_type_chk): Likewise.
+ (do_neon_vmull): Handle VMULL.P64.
+
+2012-08-24 Matthew Gretton-Dann <matthew.gretton-dann@arm.com>
+
+ * config/tc-arm.c (NEON_ENC_TAB): Add aes entry.
+ (neon_type_mask): Add N_UNT.
+ (neon_check_type): Don't always decay typed to untyped sizes.
+ (do_crypto_2op_1): New function.
+ (do_aese): Likewise.
+ (do_aesd): Likewise.
+ (do_aesmc.8): Likewise.
+ (do_aesimc.8): Likewise.
+ (insns): Add AES instructions.
+
+2012-08-24 Matthew Gretton-Dann <matthew.gretton-dann@arm.com>
+
+ * config/tc-arm.c (el_type_type_check): Add handling for 16-bit
+ floating point types.
+ (do_neon_cvttb_2): New function.
+ (do_neon_cvttb_1): Likewise.
+ (do_neon_cvtb): Refactor to use do_neon_cvttb_1.
+ (do_neon_cvtt): Likewise.
+
+2012-08-24 Matthew Gretton-Dann <matthew.gretton-dann@arm.com>
+
+ * config/tc-arm.c (NEON_ENC_TAB): Add vrint entries.
+ (neon_cvt_mode): Add neon_cvt_mode_r.
+ (do_vrint_1): New function.
+ (do_vrint_x): Likewise.
+ (do_vrint_z): Likewise.
+ (do_vrint_r): Likewise.
+ (do_vrint_a): Likewise.
+ (do_vrint_n): Likewise.
+ (do_vrint_p): Likewise.
+ (do_vrint_m): Likewise.
+ (insns): Add VRINT instructions.
+
2012-08-24 Matthew Gretton-Dann <matthew.gretton-dann@arm.com>
* config/tc-arm.c (NEON_ENC_TAB): Add vcvta entry.
projects / deliverable / binutils-gdb.git / blobdiff