+start-sanitize-v850
+Tue Oct 22 22:01:25 1996 Jeffrey A Law (law@cygnus.com)
+
+ * config/tc-v850.c (md_assemble): Handle TDAOFF relocs
+ differently for movea & sst/sld insns.
+
+end-sanitize-v850
+Tue Oct 22 17:09:32 1996 Michael Meissner <meissner@tiktok.cygnus.com>
+
+ * config/tc-d10v.c (parallel_ok): Don't allow illegal combinations
+ of instructions.
+
+Tue Oct 22 11:28:39 1996 Ian Lance Taylor <ian@cygnus.com>
+
+ * obj.h (struct format_ops): Add frob_file_after_relocs field.
+ * config/obj-multi.h (obj_frob_file_after_relocs): Define.
+ * config/obj-ecoff.c (ecoff_format_ops): Initialize new
+ frob_file_after_relocs field.
+ * config/obj-elf.c (elf_format_ops): Likewise.
+ * config/tc-mips.c: Undefine obj_frob_file_after_relocs before
+ including obj-elf.h.
+
+Mon Oct 21 11:38:30 1996 Ian Lance Taylor <ian@cygnus.com>
+
+ * config/tc-mips.c (cons_fix_new_mips): Only treat 8 byte reloc
+ specially if not ELF.
+ (md_apply_fix): Handle BFD_RELOC_64.
+ (tc_gen_reloc): Handle BFD_RELOC_64.
+
+ * config/tc-i386.c (md_apply_fix3): Don't increment value for a PC
+ relative reloc when BFD_ASSEMBLER and OBJ_AOUT (more ugly gas
+ reloc hacking).
+
+ * config/obj-aout.h (S_IS_DEFINE): non BFD_ASSEMBLER version:
+ Don't check S_GET_OTHER.
+
+Fri Oct 18 14:06:26 1996 Ian Lance Taylor <ian@cygnus.com>
+
+ * config/tc-mips.c (mips_ip): Accept an odd floating point
+ register with l.s or s.s.
+
+ * config/obj-aout.c (obj_pseudo_table): Use obj_aout_type for
+ .type pseudo-op.
+ (obj_aout_type): New static function.
+
+Thu Oct 17 17:55:17 1996 Ian Lance Taylor <ian@cygnus.com>
+
+ * Makefile.in ($(OBJS)): Depend upon libiberty.h.
+
+start-sanitize-v850
+Wed Oct 16 11:28:31 1996 Jeffrey A Law (law@cygnus.com)
+
+ * config/tc-v850.c (v850_reloc_prefix): Recognize zdaoff, tdaoff
+ and sdaoff expressions.
+
+ * write.c (fixup_segment): Don't add symbol value to addend if
+ TC_V850 and OBJ_ELF.
+ * config/tc-v850.h (tc_fix_adjustable): Don't adjust any
+ pc-relative fixups.
+
+ * config/tc-v850.c (md_pcrel_from): Undo yesterday's changes.
+ (md_pcrel_from_section): Likewise.
+ * config/tc-v850.h (MD_PCREL_FROM_SECTION): Likewise.
+
+Tue Oct 15 23:19:00 1996 Jeffrey A Law (law@cygnus.com)
+
+ * config/tc-v850.c (md_pcrel_from): Delete unused function.
+ (md_pcrel_from_section): New function.
+ * config/tc-v850.h (MD_PCREL_FROM_SECTION): Define.
+
+end-sanitize-v850
+Mon Oct 14 13:59:12 1996 Ian Lance Taylor <ian@cygnus.com>
+
+ * config/tc-mips.c (load_register): Add cast to offsetT when using
+ a constant with &~.
+
+Mon Oct 14 11:24:28 1996 Richard Henderson <rth@tamu.edu>
+
+ * config/obj-elf.c (elf_frob_file): Move ECOFF debug processing to ...
+ (elf_frob_file_after_relocs): ... here. New function.
+ * config/obj-elf.h (obj_from_file_after_relocs): New macro.
+ * write.c (write_object_file): Call *frob_after_relocs after the
+ call to write_relocs.
+
+ * config/tc-alpha.c: Use new BFD_RELOC_ALPHA_ELF_LITERAL reloc.
+
+ * config/tc-alpha.c (load_expression): Don't SET_VALUE on the section
+ symbol, as this messes up linking. Instead, expand the recursive call
+ inline and change up the appropriate bits to get the 0x8000 offset
+ in the reloc addend.
+
+Thu Oct 10 17:30:31 1996 Ian Lance Taylor <ian@cygnus.com>
+
+ * config/tc-sparc.h (tc_fix_adjustable): Permit the difference of
+ two symbols in the same segment to be adjusted.
+
+ * configure.in: Don't get confused by CPU-VENDOR-linux-gnu.
+ * configure: Rebuild.
+
+Thu Oct 10 17:22:18 1996 Michael Meissner <meissner@tiktok.cygnus.com>
+
+ * config/tc-ppc.c (ppc_insert_operand): Change most warnings into
+ errors.
+ (ppc_elf_validate_fix): Ditto.
+ (md_assemble): Ditto.
+ (ppc_tc): Ditto.
+ (ppc_pe_section): Ditto.
+ (ppc_frob_symbol): Ditto.
+
+Thu Oct 10 12:05:45 1996 Jeffrey A Law (law@cygnus.com)
+
+ * config/mn10300.c (md_assemble): Pass an extra shift count
+ to mn10300_insert_operand based on the opcode format.
+ (mn10300_insert_operand): Accept and use extra shift count
+ parameter.
+
+ * config/tc-mn10300.c (md_assemble): Use FMT_* macros for
+ formats rather than hard-coded constants.
+
+ * config/tc-mn10300.c (md_assemble): Format D5 instructions
+ are 7 bytes long. Write out instructions in big-endian format.
+
+Tue Oct 8 14:56:15 1996 Jeffrey A Law (law@cygnus.com)
+
+ * config/tc-mn10300.c (md_assemble): Tweak further so
+ that all instructions are parsed correctly.
+
+Tue Oct 8 13:02:21 1996 Ian Lance Taylor <ian@cygnus.com>
+
+ * as.h: Include libiberty.h.
+ (xmalloc, xrealloc): Don't declare.
+ * as.c: Don't include libiberty.h.
+ * expr.c, read.c, stabs.c, config/obj-coff.c: Likewise.
+ * config/tc-mips.c: Likewise.
+ * messages.c: Likewise.
+ (xstrerror): Don't declare.
+ * xmalloc.c: Remove.
+
+Mon Oct 7 16:53:23 1996 Jeffrey A Law (law@cygnus.com)
+
+ * config/tc-mn10300.h (pre_defined_registers) Remove.
+ (system_registers, cc_names): Likewise.
+ (address_registers, data_registers, other_registers): New register
+ arrays.
+ (register_name, system_register_name, cc_name): Remove.
+ (mn10300_reloc_prefix): Likewise.
+ (data_register_name): New function.
+ (address_register_name, other_register_name): Likewise.
+ (md_assemble): Rough cut at parsing operands. Remove lots of
+ unwanted code.
+ (md_apply_fix3): Disable for now.
+
Mon Oct 7 11:38:34 1996 Andreas Schwab <schwab@issan.informatik.uni-dortmund.de>
* config/tc-m68k.c (select_control_regs): New function, extracted
projects / deliverable / binutils-gdb.git / blobdiff