+2006-04-06 Carlos O'Donell <carlos@codesourcery.com>
+
+ * po/Make-in: Add install-html target.
+ * Makefile.am: Add install-html and install-html-recursive targets.
+ * Makefile.in: Regenerate.
+ * configure.in: AC_SUBST datarootdir, docdir, htmldir.
+ * configure: Regenerate.
+ * doc/Makefile.am: Add install-html and install-html-am targets.
+ * doc/Makefile.in: Regenerate.
+
+2006-04-06 Alan Modra <amodra@bigpond.net.au>
+
+ * frags.c (frag_offset_fixed_p): Reinitialise offset before
+ second scan.
+
+2006-04-05 Richard Sandiford <richard@codesourcery.com>
+ Daniel Jacobowitz <dan@codesourcery.com>
+
+ * config/tc-sparc.c (sparc_target_format): Handle TE_VXWORKS.
+ (GOTT_BASE, GOTT_INDEX): New.
+ (tc_gen_reloc): Don't alter relocations against GOTT_BASE and
+ GOTT_INDEX when generating VxWorks PIC.
+ * configure.tgt (sparc*-*-vxworks*): Remove this special case;
+ use the generic *-*-vxworks* stanza instead.
+
+2006-04-04 Alan Modra <amodra@bigpond.net.au>
+
+ PR 997
+ * frags.c (frag_offset_fixed_p): New function.
+ * frags.h (frag_offset_fixed_p): Declare.
+ * expr.c (expr): Use frag_offset_fixed_p when simplifying subtraction.
+ (resolve_expression): Likewise.
+
+2006-04-03 Sterling Augustine <sterling@tensilica.com>
+
+ * config/tc-xtensa.c (init_op_placement_info_table): Check for formats
+ of the same length but different numbers of slots.
+
+2006-03-30 Andreas Schwab <schwab@suse.de>
+
+ * configure.in: Fix help string for --enable-targets option.
+ * configure: Regenerate.
+
+2006-03-28 Nathan Sidwell <nathan@codesourcery.com>
+
+ * gas/config/tc-m68k.c (find_cf_chip): Merge into ...
+ (m68k_ip): ... here. Use for all chips. Protect against buffer
+ overrun and avoid excessive copying.
+
+ * config/tc-m68k.c (m68000_control_regs, m68010_control_regs,
+ m68020_control_regs, m68040_control_regs, m68060_control_regs,
+ mcf_control_regs, mcf5208_control_regs, mcf5213_control_regs,
+ mcf5329_control_regs, mcf5249_control_regs, mcf528x_control_regs,
+ mcfv4e_control_regs, m68010_control_regs): Rename and reorder to ...
+ (m68000_ctrl, m68010_ctrl, m68020_ctrl, m68040_ctrl, m68060_ctrl,
+ mcf_ctrl, mcf5208_ctrl, mcf5213_ctrl, mcf5235_ctrl, mcf5249_ctrl,
+ mcf5216_ctrl, mcf5250_ctrl, mcf5271_ctrl, mcf5272_ctrl,
+ mcf5282_ctrl, mcfv4e_ctrl): ... these.
+ (mcf5275_ctrl, mcf5329_ctrl, mcf5373_ctrl): New.
+ (struct m68k_cpu): Change chip field to control_regs.
+ (current_chip): Remove.
+ (control_regs): New.
+ (m68k_archs, m68k_extensions): Adjust.
+ (m68k_cpus): Reorder to be in cpu number order. Adjust.
+ (CPU_ALLOW_MC, CPU_ALLOW_NEGATION): Remove.
+ (find_cf_chip): Reimplement for new organization of cpu table.
+ (select_control_regs): Remove.
+ (mri_chip): Adjust.
+ (struct save_opts): Save control regs, not chip.
+ (s_save, s_restore): Adjust.
+ (m68k_lookup_cpu): Give deprecated warning when necessary.
+ (m68k_init_arch): Adjust.
+ (md_show_usage): Adjust for new cpu table organization.
+
+2006-03-25 Bernd Schmidt <bernd.schmidt@analog.com>
+
+ * config/bfin-defs.h (Expr_Node_Type enum): Add Expr_Node_GOT_Reloc.
+ * config/bfin-lex.l: Recognize GOT17M4 and FUNCDESC_GOT17M4.
+ * config/bfin-parse.y: Include "libbfd.h", "elf/common.h" and
+ "elf/bfin.h".
+ (GOT17M4, FUNCDESC_GOT17M4): New tokens of type <value>.
+ (any_gotrel): New rule.
+ (got): Use it, and create Expr_Node_GOT_Reloc nodes.
+ * config/tc-bfin.c: Include "libbfd.h", "elf/common.h" and
+ "elf/bfin.h".
+ (DEFAULT_FLAGS, bfin_flags, bfin_pic_flag): New.
+ (bfin_pic_ptr): New function.
+ (md_pseudo_table): Add it for ".picptr".
+ (OPTION_FDPIC): New macro.
+ (md_longopts): Add -mfdpic.
+ (md_parse_option): Handle it.
+ (md_begin): Set BFD flags.
+ (md_apply_fix3, bfin_fix_adjustable): Handle new relocs.
+ (bfin_gen_ldstidxi): Adjust to match the trees that the parser gives
+ us for GOT relocs.
+ * Makefile.am (bfin-parse.o): Update dependencies.
+ (DEPTC_bfin_elf): Likewise.
+ * Makefile.in: Regenerate.
+
+2006-03-25 Richard Sandiford <richard@codesourcery.com>
+
+ * config/tc-m68k.c (m68k_cpus): Change cpu_cf5208 entries to use
+ mcfemac instead of mcfmac.
+
+2006-03-22 Richard Sandiford <richard@codesourcery.com>
+ Daniel Jacobowitz <dan@codesourcery.com>
+ Phil Edwards <phil@codesourcery.com>
+ Zack Weinberg <zack@codesourcery.com>
+ Mark Mitchell <mark@codesourcery.com>
+ Nathan Sidwell <nathan@codesourcery.com>
+
+ * config/tc-mips.c (mips_target_format): Handle vxworks targets.
+ (md_begin): Complain about -G being used for PIC. Don't change
+ the text, data and bss alignments on VxWorks.
+ (reloc_needs_lo_p): Don't return true for R_MIPS_GOT16 when
+ generating VxWorks PIC.
+ (load_address): Extend SVR4_PIC handling to VXWORKS_PIC.
+ (macro): Likewise, but do not treat la $25 specially for
+ VxWorks PIC, and do not handle jal.
+ (OPTION_MVXWORKS_PIC): New macro.
+ (md_longopts): Add -mvxworks-pic.
+ (md_parse_option): Don't complain about using PIC and -G together here.
+ Handle OPTION_MVXWORKS_PIC.
+ (md_estimate_size_before_relax): Always use the first relaxation
+ sequence on VxWorks.
+ * config/tc-mips.h (VXWORKS_PIC): New.
+
+2006-03-21 Paul Brook <paul@codesourcery.com>
+
+ * config/tc-arm.c (md_apply_fix): Fix typo in offset mask.
+
+2006-03-21 Sterling Augustine <sterling@tensilica.com>
+
+ * config/tc-xtensa.c (enforce_three_byte_loop_align): New flag.
+ (xtensa_setup_hw_workarounds): Set this new flag for older hardware.
+ (get_loop_align_size): New.
+ (xtensa_end): Skip xtensa_mark_narrow_branches when not aligning.
+ (xtensa_mark_zcl_first_insns): Prevent widening of first loop frag.
+ (get_text_align_power): Rewrite to handle inputs in the range 2-8.
+ (get_noop_aligned_address): Use get_loop_align_size.
+ (get_aligned_diff): Likewise.
+
+2006-03-21 Paul Brook <paul@codesourcery.com>
+
+ * config/tc-arm.c (insns): Correct opcodes for ldrbt and strbt.
+
+2006-03-20 Paul Brook <paul@codesourcery.com>
+
+ * config/tc-arm.c (BAD_BRANCH, BAD_NOT_IT): Define.
+ (do_t_branch): Encode branches inside IT blocks as unconditional.
+ (do_t_cps): New function.
+ (do_t_blx, do_t_bkpt, do_t_branch23, do_t_bx, do_t_bxj, do_t_cpsi,
+ do_t_czb, do_t_it, do_t_setend, do_t_tb): Add IT constaints.
+ (opcode_lookup): Allow conditional suffixes on all instructions in
+ Thumb mode.
+ (md_assemble): Advance condexec state before checking for errors.
+ (insns): Use do_t_cps.
+
+2006-03-20 Paul Brook <paul@codesourcery.com>
+
+ * config/tc-arm.c (output_relax_insn): Call dwarf2_emit_insn before
+ outputting the insn.
+
+2006-03-18 Jan-Benedict Glaw <jbglaw@lug-owl.de>
+
+ * config/tc-vax.c: Update copyright year.
+ * config/tc-vax.h: Likewise.
+
+2006-03-18 Jan-Benedict Glaw <jbglaw@lug-owl.de>
+
+ * config/tc-vax.c (md_chars_to_number): Used only locally, so
+ make it static.
+ * config/tc-vax.h (md_chars_to_number): Remove obsolete declaration.
+
+2006-03-17 Paul Brook <paul@codesourcery.com>
+
+ * config/tc-arm.c (insns): Add ldm and stm.
+
+2006-03-17 Ben Elliston <bje@au.ibm.com>
+
+ PR gas/2446
+ * doc/as.texinfo (Ident): Document this directive more thoroughly.
+
+2006-03-16 Paul Brook <paul@codesourcery.com>
+
+ * config/tc-arm.c (insns): Add "svc".
+
+2006-03-13 Bob Wilson <bob.wilson@acm.org>
+
+ * config/tc-xtensa.c (xg_translate_sysreg_op): Remove has_underbar
+ flag and avoid double underscore prefixes.
+
+2006-03-10 Paul Brook <paul@codesourcery.com>
+
+ * config/tc-arm.c (md_begin): Handle EABIv5.
+ (arm_eabis): Add EF_ARM_EABI_VER5.
+ * doc/c-arm.texi: Document -meabi=5.
+
+2006-03-10 Ben Elliston <bje@au.ibm.com>
+
+ * app.c (do_scrub_chars): Simplify string handling.
+
+2006-03-07 Richard Sandiford <richard@codesourcery.com>
+ Daniel Jacobowitz <dan@codesourcery.com>
+ Zack Weinberg <zack@codesourcery.com>
+ Nathan Sidwell <nathan@codesourcery.com>
+ Paul Brook <paul@codesourcery.com>
+ Ricardo Anguiano <anguiano@codesourcery.com>
+ Phil Edwards <phil@codesourcery.com>
+
+ * config/tc-arm.c (md_apply_fix): Install a value of zero into a
+ BFD_RELOC_ARM_OFFSET_IMM field if we're going to generate a RELA
+ R_ARM_ABS12 reloc.
+ (tc_gen_reloc): Keep the original fx_offset for RELA pc-relative
+ relocs, but adjust by md_pcrel_from_section. Create R_ARM_ABS12
+ relocations for BFD_RELOC_ARM_OFFSET_IMM on RELA targets.
+
+2006-03-06 Bob Wilson <bob.wilson@acm.org>
+
+ * config/tc-xtensa.c (xtensa_post_relax_hook): Generate literal tables
+ even when using the text-section-literals option.
+
+2006-03-06 Nathan Sidwell <nathan@codesourcery.com>
+
+ * config/tc-m68k.c (m68k_extensions): Allow 'float' on both m68k
+ and cf.
+ (m68k_ip): <case 'J'> Check we have some control regs.
+ (md_parse_option): Allow raw arch switch.
+ (m68k_init_arch): Better detection of arch/cpu mismatch. Detect
+ whether 68881 or cfloat was meant by -mfloat.
+ (md_show_usage): Adjust extension display.
+ (m68k_elf_final_processing): Adjust.
+
+2006-03-03 Bjoern Haase <bjoern.m.haase@web.de>
+
+ * config/tc-avr.c (avr_mod_hash_value): New function.
+ (md_apply_fix, exp_mod): Use BFD_RELOC_HH8_LDI and
+ BFD_RELOC_MS8_LDI for hlo8() and hhi8()
+ (md_begin): Set linkrelax variable to 1, use avr_mod_hash_value
+ instead of int avr_ldi_expression: use avr_mod_hash_value instead
+ of (int).
+ (tc_gen_reloc): Handle substractions of symbols, if possible do
+ fixups, abort otherwise.
+ * config/tc-avr.h (TC_LINKRELAX_FIXUP, TC_VALIDATE_FIX,
+ tc_fix_adjustable): Define.
+
+2006-03-02 James E Wilson <wilson@specifix.com>
+
+ * config/tc-ia64.c (emit_one_bundle): For IA64_OPCODE_LAST, if we
+ change the template, then clear md.slot[curr].end_of_insn_group.
+
+2006-02-28 Jan Beulich <jbeulich@novell.com>
+
+ * macro.c (get_any_string): Don't insert quotes for <>-quoted input.
+
+2006-02-28 Jan Beulich <jbeulich@novell.com>
+
+ PR/1070
+ * macro.c (getstring): Don't treat parentheses special anymore.
+ (get_any_string): Don't consider '(' and ')' as quoting anymore.
+ Special-case '(', ')', '[', and ']' when dealing with non-quoting
+ characters.
+
+2006-02-28 Mat <mat@csail.mit.edu>
+
+ * dwarf2dbg.c (get_filenum): Don't inadvertently decrease files_in_use.
+
+2006-02-27 Jakub Jelinek <jakub@redhat.com>
+
+ * dw2gencfi.c (struct fde_entry, struct cie_entry): Add signal_frame
+ field.
+ (CFI_signal_frame): Define.
+ (cfi_pseudo_table): Add .cfi_signal_frame.
+ (dot_cfi): Handle CFI_signal_frame.
+ (output_cie): Handle cie->signal_frame.
+ (select_cie_for_fde): Don't share CIE if signal_frame flag is
+ different. Copy signal_frame from FDE to newly created CIE.
+ * doc/as.texinfo: Document .cfi_signal_frame.
+
+2006-02-27 Carlos O'Donell <carlos@codesourcery.com>
+
+ * doc/Makefile.am: Add html target.
+ * doc/Makefile.in: Regenerate.
+ * po/Make-in: Add html target.
+
+2006-02-27 H.J. Lu <hongjiu.lu@intel.com>
+
+ * config/tc-i386.c (output_insn): Support Intel Merom New
+ Instructions.
+
+ * config/tc-i386.h (CpuMNI): New.
+ (CpuUnknownFlags): Add CpuMNI.
+
+2006-02-24 David S. Miller <davem@sunset.davemloft.net>
+
+ * config/tc-sparc.c (priv_reg_table): Add entry for "gl".
+ (hpriv_reg_table): New table for hyperprivileged registers.
+ (sparc_ip): New cases '$' and '%' for wrhpr/rdhpr hyperprivileged
+ register encoding.
+
+2006-02-24 DJ Delorie <dj@redhat.com>
+
+ * config/tc-m32c.h (md_apply_fix): Define to m32c_apply_fix.
+ (tc_gen_reloc): Don't define.
+ * config/tc-m32c.c (rl_for, relaxable): New convenience macros.
+ (OPTION_LINKRELAX): New.
+ (md_longopts): Add it.
+ (m32c_relax): New.
+ (md_parse_options): Set it.
+ (md_assemble): Emit relaxation relocs as needed.
+ (md_convert_frag): Emit relaxation relocs as needed.
+ (md_cgen_lookup_reloc): Add LAB_8_8 and LAB_8_16.
+ (m32c_apply_fix): New.
+ (tc_gen_reloc): New.
+ (m32c_force_relocation): Force out jump relocs when relaxing.
+ (m32c_fix_adjustable): Return false if relaxing.
+
+2006-02-24 Paul Brook <paul@codesourcery.com>
+
+ * config/arm/tc-arm.c (arm_ext_v6_notm, arm_ext_div, arm_ext_v7,
+ arm_ext_v7a, arm_ext_v7r, arm_ext_v7m): New variables.
+ (struct asm_barrier_opt): Define.
+ (arm_v7m_psr_hsh, arm_barrier_opt_hsh): New variables.
+ (parse_psr): Accept V7M psr names.
+ (parse_barrier): New function.
+ (enum operand_parse_code): Add OP_oBARRIER.
+ (parse_operands): Implement OP_oBARRIER.
+ (do_barrier): New function.
+ (do_dbg, do_pli, do_t_barrier, do_t_dbg, do_t_div): New functions.
+ (do_t_cpsi): Add V7M restrictions.
+ (do_t_mrs, do_t_msr): Validate V7M variants.
+ (md_assemble): Check for NULL variants.
+ (v7m_psrs, barrier_opt_names): New tables.
+ (insns): Add V7 instructions. Mark V6 instructions absent from V7M.
+ (md_begin): Initialize arm_v7m_psr_hsh and arm_barrier_opt_hsh.
+ (arm_cpu_option_table): Add Cortex-M3, R4 and A8.
+ (arm_arch_option_table): Add armv7, armv7a, armv7r and armv7m.
+ (struct cpu_arch_ver_table): Define.
+ (cpu_arch_ver): New.
+ (aeabi_set_public_attributes): Use cpu_arch_ver. Set
+ Tag_CPU_arch_profile.
+ * doc/c-arm.texi: Document new cpu and arch options.
+
+2006-02-23 H.J. Lu <hongjiu.lu@intel.com>
+
+ * config/tc-ia64.c (operand_match): Handle IA64_OPND_IMMU5b.
+
+2006-02-23 H.J. Lu <hongjiu.lu@intel.com>
+
+ * config/tc-ia64.c: Update copyright years.
+
2006-02-22 H.J. Lu <hongjiu.lu@intel.com>
* config/tc-ia64.c (specify_resource): Add the rule 17 from
projects / deliverable / binutils-gdb.git / blobdiff