add more const qualifiers
[deliverable/binutils-gdb.git] / gas / ChangeLog
index f1f588e7ea42113db006000a9d2329c7ee35373e..f9082da713f5ec4398ed260cdc534fd8c47fd307 100644 (file)
@@ -1,3 +1,33 @@
+2016-03-28  Trevor Saunders  <tbsaunde+binutils@tbsaunde.org>
+
+       * config/obj-elf.c (obj_elf_section_name): Return const char *.
+       * config/obj-elf.h (obj_elf_section_name): Adjust.
+       * config/tc-aarch64.c (aarch64_parse_features): Likewise.
+       (aarch64_parse_cpu): Likewise.
+       (aarch64_parse_arch): Likewise.
+       * config/tc-arm.c (arm_parse_extension): Likewise.
+       (arm_parse_cpu): Likewise.
+       (arm_parse_arch): Likewise.
+       * config/tc-nds32.c: Likewise.
+       * config/xtensa-relax.c (parse_special_fn): Likewise.
+       * stabs.c (generate_asm_file): Likewise.
+
+2016-03-25  Trevor Saunders  <tbsaunde+binutils@tbsaunde.org>
+
+       * config/tc-cr16.c (cr16_assemble): New function.
+       (md_assemble): Call cr16_assemble.
+
+2016-03-25  Trevor Saunders  <tbsaunde+binutils@tbsaunde.org>
+
+       * as.c (parse_args): Adjust.
+       * as.h (flag_size_check): Rename to flag_allow_nonconst_size.
+       * config/obj-elf.c (elf_frob_symbol): Adjust.
+
+2016-03-24  Jose E. Marchesi  <jose.marchesi@oracle.com>
+
+       * config/tc-sparc.c (sparc_ip): Remove the V9 restriction on ASR
+       registers to be in the 16..31 range.
+
 2016-03-24  Trevor Saunders  <tbsaunde+binutils@tbsaunde.org>
 
        * config/tc-microblaze.c (md_assemble): Cast opc to char * when calling
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