+start-sanitize-fr30
+Wed Nov 11 09:58:21 1998 Nick Clifton <nickc@cygnus.com>
+
+ * config/tc-fr30.c: Removed currently superflous code.
+
+Tue Nov 10 13:13:05 1998 Nick Clifton <nickc@cygnus.com>
+
+ * config/tc-fr30.h: New file.
+ * config/tc-fr30.c: Tweaking so that it will compile.
+
+end-sanitize-fr30
+Tue Nov 10 14:41:33 1998 Catherine Moore <clm@cygnus.com>
+
+ * config/tc-d10v.h (obj_fix_adjustable): Define.
+ (TC_FORCE_RELOCATION): Define.
+ (d10v_force_relocation): Declare.
+ * config/tc-d10v.c (tc_gen_reloc): Handle Vtable relocs.
+ (md_apply_fix3): Handle Vtable relocs.
+ (d10v_fix_adjustable): New.
+ (d10v_force_relocation): New.
+
+Mon Nov 9 14:25:06 1998 Nick Clifton <nickc@cygnus.com>
+
+ * config/tc-d30v.c: Change default behaviour to ignore potential
+ conflicts between register name and symbol names.
+
+start-sanitize-fr30
+Wed Nov 4 18:42:00 1998 Dave Brolley <brolley@cygnus.com>
+
+ * configure.in: Add fr30-*-*.
+ * config/tc-fr30.c: New file.
+ * Makefile.in: Regenerated.
+ * config.in: Regenerated.
+ * configure: Regenerated.
+ * doc/Makefile.in: Regenerated.
+ * po/gas.pot: Regenerated.
+
+end-sanitize-fr30
+Mon Nov 2 20:54:16 1998 Doug Evans <devans@canuck.cygnus.com>
+
+ * config/tc-m32r.c (assemble_two_insns): Ensure both insns
+ are 16 bit insns.
+
+Mon Nov 2 20:10:18 1998 Martin von Loewis <loewis@informatik.hu-berlin.de>
+
+ * app.c (do_scrub_begin): Set characters above 127 to be symbol
+ characters.
+ (do_scrub_chars): Add some casts to unsigned char to avoid
+ unwanted sign extension.
+ * read.c (lex_type): Set characters about 127 to be symbol
+ characters.
+ * config/tc-i386.c (md_begin): Set identifier_chars and
+ operand_chars for values above 127.
+
+Mon Nov 2 15:05:33 1998 Geoffrey Noer <noer@cygnus.com>
+
+ * configure.in: detect cygwin* instead of cygwin32*
+ * configure: regenerate
+
+Tue Oct 27 13:18:40 1998 Nick Clifton <nickc@cygnus.com>
+
+ * listing.c: Add support for producing a listing from piped
+ input.
+
+Tue Oct 27 08:56:44 1998 Gavin Romig-Koch <gavin@cygnus.com>
+
+ * config/tc-mips.c (hilo_interlocks): Remove mips_3900.
+ (append_insn): Account for the tx39's multiply behavior.
+
+1998-10-26 Michael Meissner <meissner@cygnus.com>
+
+ * config/tc-m32r.c (assemble_two_insns): Rename assemble_two_insns
+ from assemble_parallel_insns. Add support for '->' to indicate
+ explicitly serializing the instructions.
+ (md_assemble): Ditto.
+
+Sat Oct 24 15:12:19 1998 Catherine Moore <clm@cygnus.com>
+
+ * config/tc-sh.c (sh_fix_adjustable): Adjust EXTERN and
+ WEAK handling.
+
+Thu Oct 22 12:41:33 1998 Catherine Moore <clm@cygnus.com>
+
+ * cgen.c (gas_cgen_md_apply_fix3): Revert last change.
+
+Thu Oct 22 10:03:15 1998 Ron Unrau <runrau@cygnus.com>
+
+ * config/tc-mips.c : support frame and regmask/fregmask when
+ MIPS_STABS_ELF is specified.
+
+Wed Oct 21 11;34:51 1998 Catherine Moore <clm@cygnus.com>
+
+ * config/tc-sh.c (sh_fix_adjustable): Only include if OBJ_ELF.
+ (md_apply_fix): Don't return 1 for VTABLE relocs.
+ * config/tc-sh.h (obj_fix_adjustable): Define only if OBJ_ELF.
+
+Tue Oct 20 11:18:28 1998 Alan Modra <alan@spri.levels.unisa.edu.au>
+
+ * doc/c-i386.texi: Replace occurences of "opcode" with
+ "instruction mnemonic", "instruction", or "mnemonic" when
+ referring to the name of an instruction. Use "opcode" when
+ referring to the sequence of machine bytes.
+
+ * config/tc-i386.c (opcode_chars): Rename to mnemonic_chars.
+ (is_opcode_char): Rename to is_mnemonic_char.
+ (md_assemble and i386_operand): Correct error messages from
+ "opcode" to "instruction mnemonic"
+ Rename throughout opcode[] -> mnemonic[], opp -> mnem_p,
+ MAX_OPCODE_SIZE -> MAX_MNEM_SIZE,
+ DWORD_OPCODE_SUFFIX -> DWORD_MNEM_SUFFIX,
+ WORD_OPCODE_SUFFIX -> WORD_MNEM_SUFFIX,
+ BYTE_OPCODE_SUFFIX -> BYTE_MNEM_SUFFIX,
+ SHORT_OPCODE_SUFFIX -> SHORT_MNEM_SUFFIX
+ LONG_OPCODE_SUFFIX -> LONG_MNEM_SUFFIX
+
+ * config/tc-i386.h (*_MNEM_SUFFIX): Rename from *_OPCODE_SUFFIX.
+
+ * config/tc-i386.c (i386_operand): Check for garbage after
+ register name.
+
+Tue Oct 20 10:49:42 1998 Ian Lance Taylor <ian@cygnus.com>
+
+ * config/tc-i386.c (md_apply_fix3): Change handling of PCREL reloc
+ for BFD_ASSEMBLER to only change value when COFF if TE_PE.
+
+Mon Oct 19 20:20:42 1998 Catherine Moore <clm@cygnus.com>
+
+ * config/tc-sh.h (obj_fix_adjustable): Define.
+ * config/tc-sh.c (sh_force_relocation): Handle VT relocs.
+ (md_apply_fix): Likewise.
+ (tc_gen_reloc): Likewise.
+ (sh_fix_adjustable): New.
+
+Mon Oct 19 12:35:43 1998 Doug Evans <devans@seba.cygnus.com>
+
+ * cgen.c (gas_cgen_finish_insn): Update handling of CGEN_INT_INSN_P.
+ * cgen.h (gas_cgen_finish_insn): Update prototype.
+ * config/tc-m32r.c (m32r_insn): CGEN_INT_INSN -> CGEN_INT_INSN_P.
+ cgen_insn_t -> CGEN_INSN_INT.
+ (make_parallel): Update handling of CGEN_INT_INSN_P.
+ (assemble_parallel_insn): Ditto.
+ (target_make_parallel): New function.
+ (md_assemble): Use it.
+
+Mon Oct 19 13:16:12 1998 Catherine Moore <clm@cygnus.com>
+
+ * config/tc-m32r.c (m32r_force_relocation): Fix typo.
+
+Sun Oct 18 18:48:57 1998 Jeffrey A Law (law@cygnus.com)
+
+ * config/tc-sh.c (md_assemble): Make sure the entire opcode is
+ converted into lower case.
+
Fri Oct 16 13:36:34 CDT Catherine Moore <clm@cygnus.com>
* cgen.c (gas_cgen_md_apply_fix3): Handle VTABLE relocs.
projects / deliverable / binutils-gdb.git / blobdiff