Require another match for AVX512VL

[deliverable/binutils-gdb.git] / gas / NEWS

diff --git a/gas/NEWS b/gas/NEWS
index 7175ef0eb6b0a79c65e29fd06c21ef5f1d4b0748..a0990602826158b9fd1633220081a16f55e40ebf 100644 (file)
--- a/gas/NEWS
+++ b/gas/NEWS
@@ -1,4 +1,21 @@
 -*- text -*-
+* Support for the ARMv8-M architecture has been added to the ARM port.  Support
+  for the ARMv8-M Security and DSP Extensions has also been added to the ARM
+  port.
+
+* ARC backend accepts .extInstruction, .extCondCode, .extAuxRegister, and
+  .extCoreRegister pseudo-ops that allow an user to define custom
+  instructions, conditional codes, auxiliary and core registers.
+
+* Add a configure option --enable-elf-stt-common to decide whether ELF
+  assembler should generate common symbols with the STT_COMMON type by
+  default.  Default to no.
+
+* New command line option --elf-stt-common= for ELF targets to control
+  whether to generate common symbols with the STT_COMMON type.
+
+* Add ability to set section flags and types via numeric values for ELF
+  based targets.
 
 * Add a configure option --enable-x86-relax-relocations to decide whether
   x86 assembler should generate relax relocations by default.  Default to
@@ -10,6 +27,8 @@
 * New command line option -mfence-as-lock-add=yes for x86 target to encode
   lfence, mfence and sfence as "lock addl $0x0, (%[re]sp)".
 
+* Add assembly-time relaxation option for ARC cpus.
+
 Changes in 2.26:
 
 * Add a configure option --enable-compressed-debug-sections={all,gas} to