[ARC] Don't allow pc-rel relocations for J* instructions.

[deliverable/binutils-gdb.git] / gas / NEWS

diff --git a/gas/NEWS b/gas/NEWS
index fdcbac43d9cac8f1f798217540d305d3570c543e..a627028de15653c9b8a5c0690eff41f4909258d0 100644 (file)
--- a/gas/NEWS
+++ b/gas/NEWS
@@ -1,8 +1,26 @@
 -*- text -*-
+* Add a configure option --enable-elf-stt-common to decide whether ELF
+  assembler should generate common symbols with the STT_COMMON type by
+  default.  Default to no.
+
+* New command line option --elf-stt-common= for ELF targets to control
+  whether to generate common symbols with the STT_COMMON type.
+
+* Add ability to set section flags and types via numeric values for ELF
+  based targets.
+
+* Add a configure option --enable-x86-relax-relocations to decide whether
+  x86 assembler should generate relax relocations by default.  Default to
+  yes, except for x86 Solaris targets older than Solaris 12.
+
+* New command line option -mrelax-relocations= for x86 target to control
+  whether to generate relax relocations.
 
 * New command line option -mfence-as-lock-add=yes for x86 target to encode
   lfence, mfence and sfence as "lock addl $0x0, (%[re]sp)".
 
+* Add assembly-time relaxation option for ARC cpus.
+
 Changes in 2.26:
 
 * Add a configure option --enable-compressed-debug-sections={all,gas} to