* xcofflink.c: More improvements, mostly to fix handling of

[deliverable/binutils-gdb.git] / gas / NOTES

diff --git a/gas/NOTES b/gas/NOTES
index 924a0ae4e3e7190839c54bdf2f1ee29e66ad5368..b062909db126dcbf48294fedc991043c65e69486 100644 (file)
--- a/gas/NOTES
+++ b/gas/NOTES
@@ -24,8 +24,7 @@ New environments: ???
 
 DOCUMENTATION:
 
-The internals of gas need documenting.  (Actually, there is some documentation
-in doc/as.texinfo, but it's *way* out of date.)
+The internals of gas need documenting.
 
 The documentation should also contain a "Trouble" section similar to gcc's
 manual: real bugs, common problems, incompatibilities, etc.
@@ -78,6 +77,12 @@ Clean up comments; lots of 'em are one previous maintainer griping about
 another previous maintainer, unrelated to the code.  (And with no names,
 they're not so fun to read. :-)
 
+For sparc: "call 0" becomes "jmpl %g0,%l7", and similarly for absolute
+addresses in -4096...4095.  (Solaris assembler does this.  No
+relocation required, no absolute symbol needed.)  For addresses
+outside the range, for COFF, keep generating an absolute symbol to use
+for relocs.
+
 Get Steve to document H8/500 stuff (and others).
 
 Improve test suite.  Incorporate more reported net bugs, and non-confidential
@@ -93,6 +98,37 @@ easier to maintain, instead of having code in most of the back ends.
 
 PIC support.
 
+Torbjorn Granlund <tege@cygnus.com> writes, regarding alpha .align:
+
+   Please make sure the .align directive works as in digital's assembler.
+   They fill the space with a sequence of "bis $31,$31,$31;ldq_u $31,0($30)"
+   since these two instructions can dual-issue.  Since .align is ued a lot by
+   gcc, it is an important optimization.
+
+Torbjorn Granlund <tege@cygnus.com> writes, regarding i386/i486/pentium:
+
+   In a new publication from Intel, "Optimization for Intel's 32 bit
+   Processors", they recommended code alignment on a 16 byte boundary if that
+   requires less than 8 bytes of fill instructions.  The Pentium is not
+   affected by such alignment, the 386 wants alignment on a 4 byte boundary.
+   It is the 486 that is most helped by large alignment.
+
+   Recommended nop instructions:
+   1 byte:  90                     xchg %eax,%eax
+   2 bytes: 8b c0                  movl %eax,%eax
+   3 bytes: 8d 76 00               leal 0(%esi),%esi
+   4 bytes: 8d 74 26 00            leal 0(%esi),%esi
+   5 bytes: 8b c0 8d 76 00         movl %eax,%eax; leal 0(%esi),%esi
+   6 bytes: 8d b6 00 00 00 00      leal 0(%esi),%esi
+   7 bytes: 8d b4 26 00 00 00 00   leal 0(%esi),%esi
+
+   Note that `leal 0(%esi),%esi' has a few different encodings...
+
+   There are faster instructions for certain lengths, that are not true nops.
+   If you can determine that a register and the condition code is dead (by
+   scanning forwards for a register that is written before it is read, and
+   similar for cc) you can use a `incl reg' for a 3 times faster 1 cycle nop...
+
 (From old "NOTES" file to-do list, not really reviewed:)
 
 fix relocation types for i860, perhaps by adding a ref pointer to fixS?