Allow symbols in MEMORY region specification

[deliverable/binutils-gdb.git] / gas / config / rx-parse.y

diff --git a/gas/config/rx-parse.y b/gas/config/rx-parse.y
index c719acc96e34a975dc769be0451ba77efa4e5cdd..645ec99f5383fa0de8a105d1c6824f9a02914f90 100644 (file)
--- a/gas/config/rx-parse.y
+++ b/gas/config/rx-parse.y
@@ -1,6 +1,5 @@
 /* rx-parse.y  Renesas RX parser
-   Copyright 2008, 2009
-   Free Software Foundation, Inc.
+   Copyright (C) 2008-2015 Free Software Foundation, Inc.
 
    This file is part of GAS, the GNU Assembler.
 
@@ -104,6 +103,7 @@ static int sizemap[] = { BSIZE, WSIZE, LSIZE, WSIZE };
 
 #define id24(a,b2,b3)     B3 (0xfb+a, b2, b3)
 
+static void       rx_check_float_support (void);
 static int         rx_intop (expressionS, int, int);
 static int         rx_uintop (expressionS, int);
 static int         rx_disp3op (expressionS);
@@ -636,13 +636,13 @@ statement :
        | BNOT REG ',' REG
          { id24 (1, 0x6f, 0x00); F ($4, 16, 4); F ($2, 20, 4); }
 
-       | BSET REG ',' disp '[' REG ']' DOT_B
+       | BSET REG ',' disp '[' REG ']' opt_b
          { id24 (1, 0x60, 0x00); F ($6, 16, 4); F ($2, 20, 4); DSP ($4, 14, BSIZE); }
-       | BCLR REG ',' disp '[' REG ']' DOT_B
+       | BCLR REG ',' disp '[' REG ']' opt_b
          { id24 (1, 0x64, 0x00); F ($6, 16, 4); F ($2, 20, 4); DSP ($4, 14, BSIZE); }
-       | BTST REG ',' disp '[' REG ']' DOT_B
+       | BTST REG ',' disp '[' REG ']' opt_b
          { id24 (1, 0x68, 0x00); F ($6, 16, 4); F ($2, 20, 4); DSP ($4, 14, BSIZE); }
-       | BNOT REG ',' disp '[' REG ']' DOT_B
+       | BNOT REG ',' disp '[' REG ']' opt_b
          { id24 (1, 0x6c, 0x00); F ($6, 16, 4); F ($2, 20, 4); DSP ($4, 14, BSIZE); }
 
 /* ---------------------------------------------------------------------- */
@@ -664,13 +664,13 @@ statement :
 
 /* ---------------------------------------------------------------------- */
 
-       | BMCND '#' EXPR ',' disp '[' REG ']' DOT_B
+       | BMCND '#' EXPR ',' disp '[' REG ']' opt_b
          { id24 (1, 0xe0, 0x00); F ($1, 20, 4); FE ($3, 11, 3);
              F ($7, 16, 4); DSP ($5, 14, BSIZE); }
 
 /* ---------------------------------------------------------------------- */
 
-       | BNOT '#' EXPR ',' disp '[' REG ']' DOT_B
+       | BNOT '#' EXPR ',' disp '[' REG ']' opt_b
          { id24 (1, 0xe0, 0x0f); FE ($3, 11, 3); F ($7, 16, 4);
              DSP ($5, 14, BSIZE); }
 
@@ -881,17 +881,20 @@ op_shift
        ;
 
 
-
 float2_op
-       : '#' EXPR ',' REG
-         { id24 (2, 0x72, sub_op << 4); F ($4, 20, 4); O4 ($2); }
+       : { rx_check_float_support (); }
+         '#' EXPR ',' REG
+         { id24 (2, 0x72, sub_op << 4); F ($5, 20, 4); O4 ($3); }
        | float2_op_ni
        ;
+
 float2_op_ni
-       : REG ',' REG
-         { id24 (1, 0x83 + (sub_op << 2), 0); F ($1, 16, 4); F ($3, 20, 4); }
-       | disp '[' REG ']' opt_l ',' REG
-         { id24 (1, 0x80 + (sub_op << 2), 0); F ($3, 16, 4); F ($7, 20, 4); DSP ($1, 14, LSIZE); }
+       : { rx_check_float_support (); } 
+         REG ',' REG
+         { id24 (1, 0x83 + (sub_op << 2), 0); F ($2, 16, 4); F ($4, 20, 4); }
+       | { rx_check_float_support (); }
+         disp '[' REG ']' opt_l ',' REG
+         { id24 (1, 0x80 + (sub_op << 2), 0); F ($4, 16, 4); F ($8, 20, 4); DSP ($2, 14, LSIZE); }
        ;
 
 /* ====================================================================== */
@@ -927,6 +930,10 @@ opt_l      :       {}
        | DOT_L {}
        ;
 
+opt_b  :       {}
+       | DOT_B {}
+       ;
+
 %%
 /* ====================================================================== */
 
@@ -1629,3 +1636,10 @@ rx_range (expressionS exp, int minv, int maxv)
   if (val < minv || val > maxv)
     as_warn (_("Value %d out of range %d..%d"), val, minv, maxv);
 }
+
+static void
+rx_check_float_support (void)
+{
+  if (rx_cpu == RX100 || rx_cpu == RX200)
+    rx_error (_("target CPU type does not support floating point instructions"));
+}