NEWS: "info" commands now list in ascending order
[deliverable/binutils-gdb.git] / gas / config / tc-arm.c
index 025e0be7305dd8c81373b8d2ebba0ef39711d203..23c506de39736fa3e1852a0442a4a31bc614e909 100644 (file)
@@ -7847,10 +7847,10 @@ move_or_literal_pool (int i, enum lit_type t, bfd_boolean mode_3)
                  return TRUE;
                }
 
-             if (ARM_CPU_HAS_FEATURE (cpu_variant, arm_arch_t2)
-                 && ARM_CPU_HAS_FEATURE (cpu_variant, arm_ext_v6t2))
+             if (ARM_CPU_HAS_FEATURE (cpu_variant, arm_arch_t2))
                {
-                 /* Check if on thumb2 it can be done with a mov.w or mvn.w instruction.  */
+                 /* Check if on thumb2 it can be done with a mov.w or mvn.w
+                    instruction.  */
                  unsigned int newimm;
                  bfd_boolean isNegated;
 
@@ -7859,36 +7859,27 @@ move_or_literal_pool (int i, enum lit_type t, bfd_boolean mode_3)
                    isNegated = FALSE;
                  else
                    {
-                     newimm = encode_thumb32_immediate (~ v);
+                     newimm = encode_thumb32_immediate (~v);
                      if (newimm != (unsigned int) FAIL)
                        isNegated = TRUE;
                    }
 
                  if (newimm != (unsigned int) FAIL)
                    {
-                     inst.instruction = 0xf04f0000 | (inst.operands[i].reg << 8);
-                     inst.instruction |= (isNegated?0x200000:0);
+                     inst.instruction = (0xf04f0000
+                                         | (inst.operands[i].reg << 8));
+                     inst.instruction |= (isNegated ? 0x200000 : 0);
                      inst.instruction |= (newimm & 0x800) << 15;
                      inst.instruction |= (newimm & 0x700) << 4;
                      inst.instruction |= (newimm & 0x0ff);
                      return TRUE;
                    }
-                 else if ((v & ~0xFFFF) == 0 || (v & ~0xFFFF0000) == 0)
+                 else if ((v & ~0xFFFF) == 0)
                    {
-                     /* The number may be loaded with a movw/movt instruction.  */
-                     int imm;
-
-                     if ((inst.reloc.exp.X_add_number & ~0xFFFF) == 0)
-                       {
-                         inst.instruction= 0xf2400000;
-                         imm = v;
-                       }
-                     else
-                       {
-                         inst.instruction = 0xf2c00000;
-                         imm = v >> 16;
-                       }
+                     /* The number can be loaded with a mov.w instruction.  */
+                     int imm = v & 0xFFFF;
 
+                     inst.instruction = 0xf2400000;  /* MOVW.  */
                      inst.instruction |= (inst.operands[i].reg << 8);
                      inst.instruction |= (imm & 0xf000) << 4;
                      inst.instruction |= (imm & 0x0800) << 15;
@@ -21019,7 +21010,7 @@ md_section_align (segT   segment ATTRIBUTE_UNUSED,
       int align;
 
       align = bfd_get_section_alignment (stdoutput, segment);
-      size = ((size + (1 << align) - 1) & ((valueT) -1 << align));
+      size = ((size + (1 << align) - 1) & (-((valueT) 1 << align)));
     }
 #endif
 
@@ -24720,6 +24711,8 @@ static const struct arm_cpu_option_table arm_cpus[] =
                                                                  "Cortex-A15"),
   ARM_CPU_OPT ("cortex-a17",   ARM_ARCH_V7VE,   FPU_ARCH_NEON_VFP_V4,
                                                                  "Cortex-A17"),
+  ARM_CPU_OPT ("cortex-a35",    ARM_ARCH_V8A,    FPU_ARCH_CRYPTO_NEON_VFP_ARMV8,
+                                                                 "Cortex-A35"),
   ARM_CPU_OPT ("cortex-a53",    ARM_ARCH_V8A,    FPU_ARCH_CRYPTO_NEON_VFP_ARMV8,
                                                                  "Cortex-A53"),
   ARM_CPU_OPT ("cortex-a57",    ARM_ARCH_V8A,    FPU_ARCH_CRYPTO_NEON_VFP_ARMV8,
@@ -24743,6 +24736,10 @@ static const struct arm_cpu_option_table arm_cpus[] =
   ARM_CPU_OPT ("exynos-m1",    ARM_ARCH_V8A,    FPU_ARCH_CRYPTO_NEON_VFP_ARMV8,
                                                                  "Samsung " \
                                                                  "Exynos M1"),
+  ARM_CPU_OPT ("qdf24xx",      ARM_ARCH_V8A,    FPU_ARCH_CRYPTO_NEON_VFP_ARMV8,
+                                                                 "Qualcomm "
+                                                                 "QDF24XX"),
+
   /* ??? XSCALE is really an architecture.  */
   ARM_CPU_OPT ("xscale",       ARM_ARCH_XSCALE, FPU_ARCH_VFP_V2, NULL),
   /* ??? iwmmxt is not a processor.  */
@@ -24829,6 +24826,7 @@ static const struct arm_arch_option_table arm_archs[] =
   ARM_ARCH_OPT ("armv7e-m",    ARM_ARCH_V7EM,   FPU_ARCH_VFP),
   ARM_ARCH_OPT ("armv8-a",     ARM_ARCH_V8A,    FPU_ARCH_VFP),
   ARM_ARCH_OPT ("armv8.1-a",   ARM_ARCH_V8_1A,  FPU_ARCH_VFP),
+  ARM_ARCH_OPT ("armv8.2-a",   ARM_ARCH_V8_2A,  FPU_ARCH_VFP),
   ARM_ARCH_OPT ("xscale",      ARM_ARCH_XSCALE, FPU_ARCH_VFP),
   ARM_ARCH_OPT ("iwmmxt",      ARM_ARCH_IWMMXT, FPU_ARCH_VFP),
   ARM_ARCH_OPT ("iwmmxt2",     ARM_ARCH_IWMMXT2,FPU_ARCH_VFP),
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