return TRUE;
}
- if (ARM_CPU_HAS_FEATURE (cpu_variant, arm_arch_t2)
- && ARM_CPU_HAS_FEATURE (cpu_variant, arm_ext_v6t2))
+ if (ARM_CPU_HAS_FEATURE (cpu_variant, arm_arch_t2))
{
- /* Check if on thumb2 it can be done with a mov.w or mvn.w instruction. */
+ /* Check if on thumb2 it can be done with a mov.w or mvn.w
+ instruction. */
unsigned int newimm;
bfd_boolean isNegated;
isNegated = FALSE;
else
{
- newimm = encode_thumb32_immediate (~ v);
+ newimm = encode_thumb32_immediate (~v);
if (newimm != (unsigned int) FAIL)
isNegated = TRUE;
}
if (newimm != (unsigned int) FAIL)
{
- inst.instruction = 0xf04f0000 | (inst.operands[i].reg << 8);
- inst.instruction |= (isNegated?0x200000:0);
+ inst.instruction = (0xf04f0000
+ | (inst.operands[i].reg << 8));
+ inst.instruction |= (isNegated ? 0x200000 : 0);
inst.instruction |= (newimm & 0x800) << 15;
inst.instruction |= (newimm & 0x700) << 4;
inst.instruction |= (newimm & 0x0ff);
return TRUE;
}
- else if ((v & ~0xFFFF) == 0 || (v & ~0xFFFF0000) == 0)
+ else if ((v & ~0xFFFF) == 0)
{
- /* The number may be loaded with a movw/movt instruction. */
- int imm;
-
- if ((inst.reloc.exp.X_add_number & ~0xFFFF) == 0)
- {
- inst.instruction= 0xf2400000;
- imm = v;
- }
- else
- {
- inst.instruction = 0xf2c00000;
- imm = v >> 16;
- }
+ /* The number can be loaded with a mov.w instruction. */
+ int imm = v & 0xFFFF;
+ inst.instruction = 0xf2400000; /* MOVW. */
inst.instruction |= (inst.operands[i].reg << 8);
inst.instruction |= (imm & 0xf000) << 4;
inst.instruction |= (imm & 0x0800) << 15;
int align;
align = bfd_get_section_alignment (stdoutput, segment);
- size = ((size + (1 << align) - 1) & ((valueT) -1 << align));
+ size = ((size + (1 << align) - 1) & (-((valueT) 1 << align)));
}
#endif
"Cortex-A15"),
ARM_CPU_OPT ("cortex-a17", ARM_ARCH_V7VE, FPU_ARCH_NEON_VFP_V4,
"Cortex-A17"),
+ ARM_CPU_OPT ("cortex-a35", ARM_ARCH_V8A, FPU_ARCH_CRYPTO_NEON_VFP_ARMV8,
+ "Cortex-A35"),
ARM_CPU_OPT ("cortex-a53", ARM_ARCH_V8A, FPU_ARCH_CRYPTO_NEON_VFP_ARMV8,
"Cortex-A53"),
ARM_CPU_OPT ("cortex-a57", ARM_ARCH_V8A, FPU_ARCH_CRYPTO_NEON_VFP_ARMV8,
ARM_CPU_OPT ("exynos-m1", ARM_ARCH_V8A, FPU_ARCH_CRYPTO_NEON_VFP_ARMV8,
"Samsung " \
"Exynos M1"),
+ ARM_CPU_OPT ("qdf24xx", ARM_ARCH_V8A, FPU_ARCH_CRYPTO_NEON_VFP_ARMV8,
+ "Qualcomm "
+ "QDF24XX"),
+
/* ??? XSCALE is really an architecture. */
ARM_CPU_OPT ("xscale", ARM_ARCH_XSCALE, FPU_ARCH_VFP_V2, NULL),
/* ??? iwmmxt is not a processor. */
ARM_ARCH_OPT ("armv7e-m", ARM_ARCH_V7EM, FPU_ARCH_VFP),
ARM_ARCH_OPT ("armv8-a", ARM_ARCH_V8A, FPU_ARCH_VFP),
ARM_ARCH_OPT ("armv8.1-a", ARM_ARCH_V8_1A, FPU_ARCH_VFP),
+ ARM_ARCH_OPT ("armv8.2-a", ARM_ARCH_V8_2A, FPU_ARCH_VFP),
ARM_ARCH_OPT ("xscale", ARM_ARCH_XSCALE, FPU_ARCH_VFP),
ARM_ARCH_OPT ("iwmmxt", ARM_ARCH_IWMMXT, FPU_ARCH_VFP),
ARM_ARCH_OPT ("iwmmxt2", ARM_ARCH_IWMMXT2,FPU_ARCH_VFP),