/* tc-arm.c -- Assemble for the ARM
- Copyright 1994, 1995, 1996, 1997, 1998, 1999, 2000, 2001, 2002, 2003, 2004
+ Copyright 1994, 1995, 1996, 1997, 1998, 1999, 2000, 2001, 2002, 2003,
+ 2004, 2005
Free Software Foundation, Inc.
Contributed by Richard Earnshaw (rwe@pegasus.esprit.ec.org)
Modified by David Taylor (dtaylor@armltd.co.uk)
unsigned sp_restored:1;
} unwind;
+/* Bit N indicates that an R_ARM_NONE relocation has been output for
+ __aeabi_unwind_cpp_prN already if set. This enables dependencies to be
+ emitted only once per section, to save unnecessary bloat. */
+static unsigned int marked_pr_dependency = 0;
+
#endif /* OBJ_ELF */
enum arm_float_abi
/* Legacy a.out format. */
# define FPU_DEFAULT FPU_ARCH_FPA /* Soft-float, but FPA order. */
# endif
+# elif defined (TE_VXWORKS)
+# define FPU_DEFAULT FPU_ARCH_VFP /* Soft-float, VFP order. */
# else
/* For backwards compatibility, default to FPA. */
# define FPU_DEFAULT FPU_ARCH_FPA
static int mfpu_opt = -1;
static int mfloat_abi_opt = -1;
#ifdef OBJ_ELF
+# ifdef EABI_DEFAULT
+static int meabi_flags = EABI_DEFAULT;
+# else
static int meabi_flags = EF_ARM_EABI_UNKNOWN;
+# endif
#endif
/* This array holds the chars that always start a comment. If the
\f
#ifdef OBJ_ELF
/* This code is to handle mapping symbols as defined in the ARM ELF spec.
- (This text is taken from version B-02 of the spec):
-
- 4.4.7 Mapping and tagging symbols
-
- A section of an ARM ELF file can contain a mixture of ARM code,
- Thumb code, and data. There are inline transitions between code
- and data at literal pool boundaries. There can also be inline
- transitions between ARM code and Thumb code, for example in
- ARM-Thumb inter-working veneers. Linkers, machine-level
- debuggers, profiling tools, and disassembly tools need to map
- images accurately. For example, setting an ARM breakpoint on a
- Thumb location, or in a literal pool, can crash the program
- being debugged, ruining the debugging session.
-
- ARM ELF entities are mapped (see section 4.4.7.1 below) and
- tagged (see section 4.4.7.2 below) using local symbols (with
- binding STB_LOCAL). To assist consumers, mapping and tagging
- symbols should be collated first in the symbol table, before
- other symbols with binding STB_LOCAL.
-
- To allow properly collated mapping and tagging symbols to be
- skipped by consumers that have no interest in them, the first
- such symbol should have the name $m and its st_value field equal
- to the total number of mapping and tagging symbols (including
- the $m) in the symbol table.
-
- 4.4.7.1 Mapping symbols
-
- $a Labels the first byte of a sequence of ARM instructions.
- Its type is STT_FUNC.
-
- $d Labels the first byte of a sequence of data items.
- Its type is STT_OBJECT.
-
- $t Labels the first byte of a sequence of Thumb instructions.
- Its type is STT_FUNC.
-
- This list of mapping symbols may be extended in the future.
-
- Section-relative mapping symbols
-
- Mapping symbols defined in a section define a sequence of
- half-open address intervals that cover the address range of the
- section. Each interval starts at the address defined by a
- mapping symbol, and continues up to, but not including, the
- address defined by the next (in address order) mapping symbol or
- the end of the section. A corollary is that there must be a
- mapping symbol defined at the beginning of each section.
- Consumers can ignore the size of a section-relative mapping
- symbol. Producers can set it to 0.
-
- Absolute mapping symbols
-
- Because of the need to crystallize a Thumb address with the
- Thumb-bit set, absolute symbol of type STT_FUNC (symbols of type
- STT_FUNC defined in section SHN_ABS) need to be mapped with $a
- or $t.
-
- The extent of a mapping symbol defined in SHN_ABS is [st_value,
- st_value + st_size), or [st_value, st_value + 1) if st_size = 0,
- where [x, y) denotes the half-open address range from x,
- inclusive, to y, exclusive.
-
- In the absence of a mapping symbol, a consumer can interpret a
- function symbol with an odd value as the Thumb code address
- obtained by clearing the least significant bit of the
- value. This interpretation is deprecated, and it may not work in
- the future.
-
- Note - the Tagging symbols ($b, $f, $p $m) have been dropped from
- the EABI (which is still under development), so they are not
- implemented here. */
+ (See "Mapping symbols", section 4.5.5, ARM AAELF version 1.0).
+ Note that previously, $a and $t has type STT_FUNC (BSF_OBJECT flag),
+ and $d has type STT_OBJECT (BSF_OBJECT flag). Now all three are untyped. */
static enum mstate mapstate = MAP_UNDEFINED;
{
case MAP_DATA:
symname = "$d";
- type = BSF_OBJECT;
+ type = BSF_NO_FLAGS;
break;
case MAP_ARM:
symname = "$a";
- type = BSF_FUNCTION;
+ type = BSF_NO_FLAGS;
break;
case MAP_THUMB:
symname = "$t";
- type = BSF_FUNCTION;
+ type = BSF_NO_FLAGS;
break;
case MAP_UNDEFINED:
return;
abort ();
}
- seg_info (now_seg)->tc_segment_info_data = state;
+ seg_info (now_seg)->tc_segment_info_data.mapstate = state;
symbolP = symbol_new (symname, now_seg, (valueT) frag_now_fix (), frag_now);
symbol_table_insert (symbolP);
arm_elf_change_section (void)
{
flagword flags;
+ segment_info_type *seginfo;
/* Link an unlinked unwind index table section to the .text section. */
if (elf_section_type (now_seg) == SHT_ARM_EXIDX
if ((flags & SEC_ALLOC) == 0)
return;
- mapstate = seg_info (now_seg)->tc_segment_info_data;
+ seginfo = seg_info (now_seg);
+ mapstate = seginfo->tc_segment_info_data.mapstate;
+ marked_pr_dependency = seginfo->tc_segment_info_data.marked_pr_dependency;
}
int
return;
}
-#if 0 /* The first edition of the ARM architecture manual stated that
- writing anything other than the flags with an immediate operation
- had UNPREDICTABLE effects. This constraint was removed in the
- second edition of the specification. */
- if ((cpu_variant & ARM_EXT_V5) != ARM_EXT_V5
- && inst.instruction & ((PSR_c | PSR_x | PSR_s) << PSR_SHIFT))
- {
- inst.error = _("immediate value cannot be used to set this field");
- return;
- }
-#endif
-
inst.instruction |= INST_IMMEDIATE;
if (inst.reloc.exp.X_add_symbol)
}
static void
-do_mla (char * str)
+do_mlas (char * str, bfd_boolean is_mls)
{
int rd, rm;
return;
}
- if (rm == rd)
+ /* This restriction does not apply to mls (nor to mla in v6, but
+ that's hard to detect at present). */
+ if (rm == rd && !is_mls)
as_tsktsk (_("rd and rm should be different in mla"));
if (skip_past_comma (&str) == FAIL
end_of_line (str);
}
+static void
+do_mla (char *str)
+{
+ do_mlas (str, FALSE);
+}
+
+static void
+do_mls (char *str)
+{
+ do_mlas (str, TRUE);
+}
+
/* Expects *str -> the characters "acc0", possibly with leading blanks.
Advances *str to the next non-alphanumeric.
Returns 0, or else FAIL (in which case sets inst.error).
end_of_line (str);
}
+/* ARM V6T2 bitfield manipulation instructions. */
+
+static int
+five_bit_unsigned_immediate (char **str)
+{
+ expressionS expr;
+
+ skip_whitespace (*str);
+ if (!is_immediate_prefix (**str))
+ {
+ inst.error = _("immediate expression expected");
+ return -1;
+ }
+ (*str)++;
+ if (my_get_expression (&expr, str))
+ {
+ inst.error = _("bad expression");
+ return -1;
+ }
+ if (expr.X_op != O_constant)
+ {
+ inst.error = _("constant expression expected");
+ return -1;
+ }
+ if (expr.X_add_number < 0 || expr.X_add_number > 32)
+ {
+ inst.error = _("immediate value out of range");
+ return -1;
+ }
+
+ return expr.X_add_number;
+}
+
+static void
+bfci_lsb_and_width (char *str)
+{
+ int lsb, width;
+
+ if ((lsb = five_bit_unsigned_immediate (&str)) == -1)
+ return;
+
+ if (skip_past_comma (&str) == FAIL)
+ {
+ inst.error = BAD_ARGS;
+ return;
+ }
+ if ((width = five_bit_unsigned_immediate (&str)) == -1)
+ return;
+
+ end_of_line (str);
+
+ if (width == 0 || lsb == 32)
+ {
+ inst.error = _("immediate value out of range");
+ return;
+ }
+ else if (width + lsb > 32)
+ {
+ inst.error = _("bit-field extends past end of register");
+ return;
+ }
+
+ /* Convert to LSB/MSB and write to register. */
+ inst.instruction |= lsb << 7;
+ inst.instruction |= (width + lsb - 1) << 16;
+}
+
+static void
+do_bfc (char *str)
+{
+ int rd;
+
+ /* Rd. */
+ skip_whitespace (str);
+ if (((rd = reg_required_here (&str, 12)) == FAIL)
+ || (skip_past_comma (&str) == FAIL))
+ {
+ inst.error = BAD_ARGS;
+ return;
+ }
+ else if (rd == REG_PC)
+ {
+ inst.error = BAD_PC;
+ return;
+ }
+
+ bfci_lsb_and_width (str);
+}
+
+static void
+do_bfi (char *str)
+{
+ int rd, rm;
+
+ /* Rd. */
+ skip_whitespace (str);
+ if (((rd = reg_required_here (&str, 12)) == FAIL)
+ || (skip_past_comma (&str) == FAIL))
+ {
+ inst.error = BAD_ARGS;
+ return;
+ }
+ else if (rd == REG_PC)
+ {
+ inst.error = BAD_PC;
+ return;
+ }
+
+ /* Rm. Accept #0 in this position as an alternative syntax for bfc. */
+ skip_whitespace (str);
+ if (is_immediate_prefix (*str))
+ {
+ expressionS expr;
+ str++;
+ if (my_get_expression (&expr, &str))
+ {
+ inst.error = _("bad expression");
+ return;
+ }
+ if (expr.X_op != O_constant)
+ {
+ inst.error = _("constant expression expected");
+ return;
+ }
+ if (expr.X_add_number != 0)
+ {
+ inst.error = _("immediate value out of range");
+ return;
+ }
+ inst.instruction |= 0x0000000f; /* Rm = PC -> bfc, not bfi. */
+ }
+ else
+ {
+ if ((rm = reg_required_here (&str, 0)) == FAIL)
+ {
+ inst.error = BAD_ARGS;
+ return;
+ }
+ else if (rm == REG_PC)
+ {
+ inst.error = BAD_PC;
+ return;
+ }
+ }
+ if (skip_past_comma (&str) == FAIL)
+ {
+ inst.error = BAD_ARGS;
+ return;
+ }
+
+ bfci_lsb_and_width (str);
+}
+
+static void
+do_bfx (char *str)
+{
+ int lsb, width;
+
+ /* Rd. */
+ skip_whitespace (str);
+ if (reg_required_here (&str, 12) == FAIL
+ || skip_past_comma (&str) == FAIL)
+ {
+ inst.error = BAD_ARGS;
+ return;
+ }
+
+ /* Rm. */
+ skip_whitespace (str);
+ if (reg_required_here (&str, 0) == FAIL
+ || skip_past_comma (&str) == FAIL)
+ {
+ inst.error = BAD_ARGS;
+ return;
+ }
+
+ if ((lsb = five_bit_unsigned_immediate (&str)) == -1)
+ return;
+
+ if (skip_past_comma (&str) == FAIL)
+ {
+ inst.error = BAD_ARGS;
+ return;
+ }
+ if ((width = five_bit_unsigned_immediate (&str)) == -1)
+ return;
+
+ end_of_line (str);
+
+ if (width == 0 || lsb == 32)
+ {
+ inst.error = _("immediate value out of range");
+ return;
+ }
+ else if (width + lsb > 32)
+ {
+ inst.error = _("bit-field extends past end of register");
+ return;
+ }
+
+ inst.instruction |= lsb << 7;
+ inst.instruction |= (width - 1) << 16;
+}
+
+static void
+do_rbit (char *str)
+{
+ /* Rd. */
+ skip_whitespace (str);
+ if (reg_required_here (&str, 12) == FAIL
+ || skip_past_comma (&str) == FAIL)
+ {
+ inst.error = BAD_ARGS;
+ return;
+ }
+
+ /* Rm. */
+ skip_whitespace (str);
+ if (reg_required_here (&str, 0) == FAIL)
+ {
+ inst.error = BAD_ARGS;
+ return;
+ }
+
+ end_of_line (str);
+}
+
+/* ARM V6T2 16-bit immediate register load: MOV[WT]{cond} Rd, #<imm16>. */
+static void
+do_mov16 (char *str)
+{
+ int rd;
+ expressionS expr;
+
+ /* Rd. */
+ skip_whitespace (str);
+ if (((rd = reg_required_here (&str, 12)) == FAIL)
+ || (skip_past_comma (&str) == FAIL))
+ {
+ inst.error = BAD_ARGS;
+ return;
+ }
+ else if (rd == REG_PC)
+ {
+ inst.error = BAD_PC;
+ return;
+ }
+
+ /* Imm16. */
+ skip_whitespace (str);
+ if (!is_immediate_prefix (*str))
+ {
+ inst.error = _("immediate expression expected");
+ return;
+ }
+ str++;
+ if (my_get_expression (&expr, &str))
+ {
+ inst.error = _("bad expression");
+ return;
+ }
+ if (expr.X_op != O_constant)
+ {
+ inst.error = _("constant expression expected");
+ return;
+ }
+ if (expr.X_add_number < 0 || expr.X_add_number > 65535)
+ {
+ inst.error = _("immediate value out of range");
+ return;
+ }
+
+ end_of_line (str);
+
+ /* The value is in two pieces: 0:11, 16:19. */
+ inst.instruction |= (expr.X_add_number & 0x00000fff);
+ inst.instruction |= (expr.X_add_number & 0x0000f000) << 4;
+}
+
+
/* THUMB V5 breakpoint instruction (argument parse)
BKPT <immed_8>. */
end_of_line (str);
}
+#ifdef OBJ_ELF
static bfd_reloc_code_real_type
arm_parse_reloc (void)
{
MAP ("(target1)", BFD_RELOC_ARM_TARGET1),
MAP ("(sbrel)", BFD_RELOC_ARM_SBREL32),
MAP ("(target2)", BFD_RELOC_ARM_TARGET2),
+ MAP ("(tlsgd)", BFD_RELOC_ARM_TLS_GD32),
+ MAP ("(tlsldm)", BFD_RELOC_ARM_TLS_LDM32),
+ MAP ("(tlsldo)", BFD_RELOC_ARM_TLS_LDO32),
+ MAP ("(gottpoff)", BFD_RELOC_ARM_TLS_IE32),
+ MAP ("(tpoff)", BFD_RELOC_ARM_TLS_LE32),
{ NULL, 0, BFD_RELOC_UNUSED }
#undef MAP
};
return reloc_map[i].reloc;
}
+#endif
/* ARM V5 branch-link-exchange (argument parse) for BLX(1) only.
Expects inst.instruction is set for BLX(1).
end_of_line (str);
}
+static void
+do_ldsttv4 (char * str)
+{
+ int conflict_reg;
+
+ skip_whitespace (str);
+
+ if ((conflict_reg = reg_required_here (& str, 12)) == FAIL)
+ {
+ if (!inst.error)
+ inst.error = BAD_ARGS;
+ return;
+ }
+
+ if (skip_past_comma (& str) == FAIL)
+ {
+ inst.error = _("address expected");
+ return;
+ }
+
+ if (*str == '[')
+ {
+ int reg;
+
+ str++;
+
+ skip_whitespace (str);
+
+ if ((reg = reg_required_here (&str, 16)) == FAIL)
+ return;
+
+ /* ldrt/strt always use post-indexed addressing, so if the base is
+ the same as Rd, we warn. */
+ if (conflict_reg == reg)
+ as_warn (_("%s register same as write-back base"),
+ ((inst.instruction & LOAD_BIT)
+ ? _("destination") : _("source")));
+
+ skip_whitespace (str);
+
+ if (*str == ']')
+ {
+ str ++;
+
+ if (skip_past_comma (&str) == SUCCESS)
+ {
+ /* [Rn],... (post inc) */
+ if (ldst_extend_v4 (&str) == FAIL)
+ return;
+ }
+ else
+ {
+ /* [Rn] */
+ skip_whitespace (str);
+
+ /* Skip a write-back '!'. */
+ if (*str == '!')
+ str++;
+
+ inst.instruction |= (INDEX_UP|HWOFFSET_IMM);
+ }
+ }
+ else
+ {
+ inst.error = _("post-indexed expression expected");
+ return;
+ }
+ }
+ else
+ {
+ inst.error = _("post-indexed expression expected");
+ return;
+ }
+
+ end_of_line (str);
+}
+
+
static long
reg_list (char ** strp)
{
return;
}
- if (inst.reloc.type != BFD_RELOC_NONE)
+ if (inst.reloc.type != BFD_RELOC_UNUSED)
{
/* This really doesn't seem worth it. */
- inst.reloc.type = BFD_RELOC_NONE;
+ inst.reloc.type = BFD_RELOC_UNUSED;
inst.error = _("expression too complex");
return;
}
return;
}
- if (inst.reloc.type != BFD_RELOC_NONE)
+ if (inst.reloc.type != BFD_RELOC_UNUSED)
{
/* This really doesn't seem worth it. */
- inst.reloc.type = BFD_RELOC_NONE;
+ inst.reloc.type = BFD_RELOC_UNUSED;
inst.error = _("expression too complex");
return;
}
/* ARM V6Z. */
{ "smi", 0xe1600070, 3, ARM_EXT_V6Z, do_smi},
+ /* ARM V6T2. */
+ { "bfc", 0xe7c0001f, 3, ARM_EXT_V6T2, do_bfc},
+ { "bfi", 0xe7c00010, 3, ARM_EXT_V6T2, do_bfi},
+ { "mls", 0xe0600090, 3, ARM_EXT_V6T2, do_mls},
+ { "movw", 0xe3000000, 4, ARM_EXT_V6T2, do_mov16},
+ { "movt", 0xe3400000, 4, ARM_EXT_V6T2, do_mov16},
+ { "rbit", 0xe3ff0f30, 4, ARM_EXT_V6T2, do_rbit},
+ { "sbfx", 0xe7a00050, 4, ARM_EXT_V6T2, do_bfx},
+ { "ubfx", 0xe7e00050, 4, ARM_EXT_V6T2, do_bfx},
+
+ { "ldrht", 0xe03000b0, 3, ARM_EXT_V6T2, do_ldsttv4},
+ { "ldrsht", 0xe03000f0, 3, ARM_EXT_V6T2, do_ldsttv4},
+ { "ldrsbt", 0xe03000d0, 3, ARM_EXT_V6T2, do_ldsttv4},
+ { "strht", 0xe02000b0, 3, ARM_EXT_V6T2, do_ldsttv4},
+
/* Core FPA instruction set (V1). */
{"wfs", 0xee200110, 3, FPU_FPA_EXT_V1, do_fpa_ctrl},
{"rfs", 0xee300110, 3, FPU_FPA_EXT_V1, do_fpa_ctrl},
}
}
-#if 0 /* Suppressed - for now. */
-#if defined OBJ_ELF || defined OBJ_COFF
-
-#ifdef OBJ_ELF
-#define arm_Note Elf_External_Note
-#else
-typedef struct
-{
- unsigned char namesz[4]; /* Size of entry's owner string. */
- unsigned char descsz[4]; /* Size of the note descriptor. */
- unsigned char type[4]; /* Interpretation of the descriptor. */
- char name[1]; /* Start of the name+desc data. */
-} arm_Note;
-#endif
-
-/* The description is kept to a fix sized in order to make updating
- it and merging it easier. */
-#define ARM_NOTE_DESCRIPTION_LENGTH 8
-
-static void
-arm_add_note (const char * name,
- const char * description,
- unsigned int type)
-{
- arm_Note note ATTRIBUTE_UNUSED;
- char * p;
- unsigned int name_len;
-
- name_len = (strlen (name) + 1 + 3) & ~3;
-
- p = frag_more (sizeof (note.namesz));
- md_number_to_chars (p, (valueT) name_len, sizeof (note.namesz));
-
- p = frag_more (sizeof (note.descsz));
- md_number_to_chars (p, (valueT) ARM_NOTE_DESCRIPTION_LENGTH, sizeof (note.descsz));
-
- p = frag_more (sizeof (note.type));
- md_number_to_chars (p, (valueT) type, sizeof (note.type));
-
- p = frag_more (name_len);
- strcpy (p, name);
-
- p = frag_more (ARM_NOTE_DESCRIPTION_LENGTH);
- strncpy (p, description, ARM_NOTE_DESCRIPTION_LENGTH);
- frag_align (2, 0, 0);
-}
-#endif
-#endif
-
\f
static const struct thumb_opcode tinsns[] =
{
{"sxtb", 0xb240, 2, ARM_EXT_V6, do_t_arit},
{"uxth", 0xb280, 2, ARM_EXT_V6, do_t_arit},
{"uxtb", 0xb2c0, 2, ARM_EXT_V6, do_t_arit},
+
+ /* ARM V6K. */
+ {"sev", 0xbf40, 2, ARM_EXT_V6K, do_empty},
+ {"wfe", 0xbf20, 2, ARM_EXT_V6K, do_empty},
+ {"wfi", 0xbf30, 2, ARM_EXT_V6K, do_empty},
+ {"yield", 0xbf10, 2, ARM_EXT_V6K, do_empty},
};
void
}
else if (mfpu_opt == -1)
{
-#if !(defined (TE_LINUX) || defined (TE_NetBSD))
+#if !(defined (TE_LINUX) || defined (TE_NetBSD) || defined (TE_VXWORKS))
/* Some environments specify a default FPU. If they don't, infer it
from the processor. */
if (mcpu_fpu_opt != -1)
cpu_variant = mcpu_cpu_opt | mfpu_opt;
+#if defined OBJ_COFF || defined OBJ_ELF
{
unsigned int flags = 0;
{
case EF_ARM_EABI_UNKNOWN:
#endif
-#if defined OBJ_COFF || defined OBJ_ELF
/* Set the flags in the private structure. */
if (uses_apcs_26) flags |= F_APCS26;
if (support_interwork) flags |= F_INTERWORK;
/* Using VFP conventions (even if soft-float). */
if (cpu_variant & FPU_VFP_EXT_NONE)
flags |= F_VFP_FLOAT;
-#endif
+
#if defined OBJ_ELF
if (cpu_variant & FPU_ARCH_MAVERICK)
flags |= EF_ARM_MAVERICK_FLOAT;
abort ();
}
#endif
-#if defined OBJ_COFF || defined OBJ_ELF
bfd_set_private_flags (stdoutput, flags);
/* We have run out flags in the COFF header to encode the
bfd_set_section_contents (stdoutput, sec, NULL, 0, 0);
}
}
-#endif
}
+#endif
/* Record the CPU type as well. */
switch (cpu_variant & ARM_CPU_MASK)
else if (cpu_variant & ARM_EXT_V3M)
mach = bfd_mach_arm_3M;
-#if 0 /* Suppressed - for now. */
-#if defined (OBJ_ELF) || defined (OBJ_COFF)
-
- /* Create a .note section to fully identify this arm binary. */
-
-#define NOTE_ARCH_STRING "arch: "
-
-#if defined OBJ_COFF && ! defined NT_VERSION
-#define NT_VERSION 1
-#define NT_ARCH 2
-#endif
-
- {
- segT current_seg = now_seg;
- subsegT current_subseg = now_subseg;
- asection * arm_arch;
- const char * arch_string;
-
- arm_arch = bfd_make_section_old_way (stdoutput, ARM_NOTE_SECTION);
-
-#ifdef OBJ_COFF
- bfd_set_section_flags (stdoutput, arm_arch,
- SEC_DATA | SEC_ALLOC | SEC_LOAD | SEC_LINK_ONCE \
- | SEC_HAS_CONTENTS);
-#else
- bfd_set_section_flags (stdoutput, arm_arch,
- SEC_READONLY | SEC_HAS_CONTENTS);
-#endif
- arm_arch->output_section = arm_arch;
- subseg_set (arm_arch, 0);
-
- switch (mach)
- {
- default:
- case bfd_mach_arm_unknown: arch_string = "unknown"; break;
- case bfd_mach_arm_2: arch_string = "armv2"; break;
- case bfd_mach_arm_2a: arch_string = "armv2a"; break;
- case bfd_mach_arm_3: arch_string = "armv3"; break;
- case bfd_mach_arm_3M: arch_string = "armv3M"; break;
- case bfd_mach_arm_4: arch_string = "armv4"; break;
- case bfd_mach_arm_4T: arch_string = "armv4t"; break;
- case bfd_mach_arm_5: arch_string = "armv5"; break;
- case bfd_mach_arm_5T: arch_string = "armv5t"; break;
- case bfd_mach_arm_5TE: arch_string = "armv5te"; break;
- case bfd_mach_arm_XScale: arch_string = "XScale"; break;
- case bfd_mach_arm_ep9312: arch_string = "ep9312"; break;
- case bfd_mach_arm_iWMMXt: arch_string = "iWMMXt"; break;
- }
-
- arm_add_note (NOTE_ARCH_STRING, arch_string, NT_ARCH);
-
- subseg_set (current_seg, current_subseg);
- }
-#endif
-#endif /* Suppressed code. */
-
bfd_set_arch_mach (stdoutput, TARGET_ARCH, mach);
}
char * buf = fixP->fx_where + fixP->fx_frag->fr_literal;
arm_fix_data * arm_data = (arm_fix_data *) fixP->tc_fix_data;
- assert (fixP->fx_r_type < BFD_RELOC_UNUSED);
+ assert (fixP->fx_r_type <= BFD_RELOC_UNUSED);
/* Note whether this will delete the relocation. */
-#if 0
- /* Patch from REarnshaw to JDavis (disabled for the moment, since it
- doesn't work fully.) */
- if ((fixP->fx_addsy == 0 || symbol_constant_p (fixP->fx_addsy))
- && !fixP->fx_pcrel)
-#else
if (fixP->fx_addsy == 0 && !fixP->fx_pcrel)
-#endif
fixP->fx_done = 1;
/* If this symbol is in a different section then we need to leave it for
switch (fixP->fx_r_type)
{
+ case BFD_RELOC_NONE:
+ /* This will need to go in the object file. */
+ fixP->fx_done = 0;
+ break;
+
case BFD_RELOC_ARM_IMMEDIATE:
/* We claim that this fixup has been processed here,
even if in fact we generate an error because we do
as_bad_where (fixP->fx_file, fixP->fx_line,
_("out of range branch"));
- newval = (value & 0x00ffffff) | (newval & 0xff000000);
+ if (seg->use_rela_p && !fixP->fx_done)
+ {
+ /* Must unshift the value before storing it in the addend. */
+ value <<= 2;
+#ifdef OBJ_ELF
+ fixP->fx_offset = value;
+#endif
+ fixP->fx_addnumber = value;
+ newval = newval & 0xff000000;
+ }
+ else
+ newval = (value & 0x00ffffff) | (newval & 0xff000000);
md_number_to_chars (buf, newval, INSN_SIZE);
break;
hbit = (value >> 1) & 1;
value = (value >> 2) & 0x00ffffff;
value = (value + (newval & 0x00ffffff)) & 0x00ffffff;
- newval = value | (newval & 0xfe000000) | (hbit << 24);
+
+ if (seg->use_rela_p && !fixP->fx_done)
+ {
+ /* Must sign-extend and unshift the value before storing
+ it in the addend. */
+ value = SEXT24 (value);
+ value = (value << 2) | hbit;
+#ifdef OBJ_ELF
+ fixP->fx_offset = value;
+#endif
+ fixP->fx_addnumber = value;
+ newval = newval & 0xfe000000;
+ }
+ else
+ newval = value | (newval & 0xfe000000) | (hbit << 24);
md_number_to_chars (buf, newval, INSN_SIZE);
}
break;
if ((value & ~0xff) && ((value & ~0xff) != ~0xff))
as_bad_where (fixP->fx_file, fixP->fx_line,
_("branch out of range"));
- newval = (newval & 0xff00) | ((value & 0x1ff) >> 1);
+ if (seg->use_rela_p && !fixP->fx_done)
+ {
+#ifdef OBJ_ELF
+ fixP->fx_offset = value;
+#endif
+ fixP->fx_addnumber = value;
+ newval = newval & 0xff00;
+ }
+ else
+ newval = (newval & 0xff00) | ((value & 0x1ff) >> 1);
}
md_number_to_chars (buf, newval, THUMB_SIZE);
break;
if ((value & ~0x7ff) && ((value & ~0x7ff) != ~0x7ff))
as_bad_where (fixP->fx_file, fixP->fx_line,
_("branch out of range"));
- newval = (newval & 0xf800) | ((value & 0xfff) >> 1);
+ if (seg->use_rela_p && !fixP->fx_done)
+ {
+#ifdef OBJ_ELF
+ fixP->fx_offset = value;
+#endif
+ fixP->fx_addnumber = value;
+ newval = newval & 0xf800;
+ }
+ else
+ newval = (newval & 0xf800) | ((value & 0xfff) >> 1);
}
md_number_to_chars (buf, newval, THUMB_SIZE);
break;
as_bad_where (fixP->fx_file, fixP->fx_line,
_("branch with link out of range"));
- newval = (newval & 0xf800) | ((value & 0x7fffff) >> 12);
- newval2 = (newval2 & 0xf800) | ((value & 0xfff) >> 1);
if (fixP->fx_r_type == BFD_RELOC_THUMB_PCREL_BLX)
/* For a BLX instruction, make sure that the relocation is rounded up
to a word boundary. This follows the semantics of the instruction
which specifies that bit 1 of the target address will come from bit
1 of the base address. */
- newval2 = (newval2 + 1) & ~ 1;
+ value = (value + 1) & ~ 1;
+
+ if (seg->use_rela_p && !fixP->fx_done)
+ {
+#ifdef OBJ_ELF
+ fixP->fx_offset = value;
+#endif
+ fixP->fx_addnumber = value;
+ newval = newval & 0xf800;
+ newval2 = newval2 & 0xf800;
+ }
+ else
+ {
+ newval = (newval & 0xf800) | ((value & 0x7fffff) >> 12);
+ newval2 = (newval2 & 0xf800) | ((value & 0xfff) >> 1);
+ }
md_number_to_chars (buf, newval, THUMB_SIZE);
md_number_to_chars (buf + THUMB_SIZE, newval2, THUMB_SIZE);
}
break;
case BFD_RELOC_8:
+ if (seg->use_rela_p && !fixP->fx_done)
+ break;
if (fixP->fx_done || fixP->fx_pcrel)
md_number_to_chars (buf, value, 1);
#ifdef OBJ_ELF
break;
case BFD_RELOC_16:
+ if (seg->use_rela_p && !fixP->fx_done)
+ break;
if (fixP->fx_done || fixP->fx_pcrel)
md_number_to_chars (buf, value, 2);
#ifdef OBJ_ELF
break;
#ifdef OBJ_ELF
+ case BFD_RELOC_ARM_TLS_GD32:
+ case BFD_RELOC_ARM_TLS_LE32:
+ case BFD_RELOC_ARM_TLS_IE32:
+ case BFD_RELOC_ARM_TLS_LDM32:
+ case BFD_RELOC_ARM_TLS_LDO32:
+ S_SET_THREAD_LOCAL (fixP->fx_addsy);
+ /* fall through */
+
case BFD_RELOC_ARM_GOT32:
case BFD_RELOC_ARM_GOTOFF:
case BFD_RELOC_ARM_TARGET2:
+ if (seg->use_rela_p && !fixP->fx_done)
+ break;
md_number_to_chars (buf, 0, 4);
break;
#endif
case BFD_RELOC_ARM_ROSEGREL32:
case BFD_RELOC_ARM_SBREL32:
case BFD_RELOC_32_PCREL:
+ if (seg->use_rela_p && !fixP->fx_done)
+ break;
if (fixP->fx_done || fixP->fx_pcrel)
md_number_to_chars (buf, value, 4);
#ifdef OBJ_ELF
fixP->fx_done = 0;
return;
- case BFD_RELOC_NONE:
+ case BFD_RELOC_UNUSED:
default:
as_bad_where (fixP->fx_file, fixP->fx_line,
_("bad relocation fixup type (%d)"), fixP->fx_r_type);
break;
}
+ case BFD_RELOC_NONE:
case BFD_RELOC_ARM_PCREL_BRANCH:
case BFD_RELOC_ARM_PCREL_BLX:
case BFD_RELOC_RVA:
case BFD_RELOC_ARM_SBREL32:
case BFD_RELOC_ARM_PREL31:
case BFD_RELOC_ARM_TARGET2:
+ case BFD_RELOC_ARM_TLS_LE32:
+ case BFD_RELOC_ARM_TLS_LDO32:
+ code = fixp->fx_r_type;
+ break;
+
+ case BFD_RELOC_ARM_TLS_GD32:
+ case BFD_RELOC_ARM_TLS_IE32:
+ case BFD_RELOC_ARM_TLS_LDM32:
+ /* BFD will include the symbol's address in the addend.
+ But we don't want that, so subtract it out again here. */
+ if (!S_IS_COMMON (fixp->fx_addsy))
+ reloc->addend -= (*reloc->sym_ptr_ptr)->value;
code = fixp->fx_r_type;
break;
#endif
switch (fixp->fx_r_type)
{
+ case BFD_RELOC_NONE: type = "NONE"; break;
case BFD_RELOC_ARM_OFFSET_IMM8: type = "OFFSET_IMM8"; break;
case BFD_RELOC_ARM_SHIFT_IMM: type = "SHIFT_IMM"; break;
case BFD_RELOC_ARM_SMI: type = "SMI"; break;
else
md_number_to_chars (to, inst.instruction, inst.size);
- if (inst.reloc.type != BFD_RELOC_NONE)
+ if (inst.reloc.type != BFD_RELOC_UNUSED)
fix_new_arm (frag_now, to - frag_now->fr_literal,
inst.size, & inst.reloc.exp, inst.reloc.pc_rel,
inst.reloc.type);
char *p;
char *start;
- /* Align the instruction.
- This may not be the right thing to do but ... */
-#if 0
- arm_align (2, 0);
-#endif
-
/* Align the previous label if needed. */
if (last_label_seen != NULL)
{
}
memset (&inst, '\0', sizeof (inst));
- inst.reloc.type = BFD_RELOC_NONE;
+ inst.reloc.type = BFD_RELOC_UNUSED;
skip_whitespace (str);
{"arm1020", ARM_ARCH_V5TE, FPU_ARCH_VFP_V2},
{"arm1020t", ARM_ARCH_V5T, FPU_ARCH_VFP_V1},
{"arm1020e", ARM_ARCH_V5TE, FPU_ARCH_VFP_V2},
- {"arm1026ejs", ARM_ARCH_V5TE, FPU_ARCH_VFP_V2},
- {"arm1026ej-s", ARM_ARCH_V5TE, FPU_ARCH_VFP_V2},
+ {"arm1026ejs", ARM_ARCH_V5TEJ, FPU_ARCH_VFP_V2},
+ {"arm1026ej-s", ARM_ARCH_V5TEJ, FPU_ARCH_VFP_V2},
{"arm1136js", ARM_ARCH_V6, FPU_NONE},
{"arm1136j-s", ARM_ARCH_V6, FPU_NONE},
{"arm1136jfs", ARM_ARCH_V6, FPU_ARCH_VFP_V2},
{"armv6k", ARM_ARCH_V6K, FPU_ARCH_VFP},
{"armv6z", ARM_ARCH_V6Z, FPU_ARCH_VFP},
{"armv6zk", ARM_ARCH_V6ZK, FPU_ARCH_VFP},
+ {"armv6t2", ARM_ARCH_V6T2, FPU_ARCH_VFP},
+ {"armv6kt2", ARM_ARCH_V6KT2, FPU_ARCH_VFP},
+ {"armv6zt2", ARM_ARCH_V6ZT2, FPU_ARCH_VFP},
+ {"armv6zkt2", ARM_ARCH_V6ZKT2, FPU_ARCH_VFP},
{"xscale", ARM_ARCH_XSCALE, FPU_ARCH_VFP},
{"iwmmxt", ARM_ARCH_IWMMXT, FPU_ARCH_VFP},
{NULL, 0, 0}
elf_symbol_type * elf_sym;
elf_sym = elf_symbol (symbol_get_bfdsym (sym));
- bind = ELF_ST_BIND (elf_sym);
-
- /* If it's a .thumb_func, declare it as so,
- otherwise tag label as .code 16. */
- if (THUMB_IS_FUNC (sym))
- elf_sym->internal_elf_sym.st_info =
- ELF_ST_INFO (bind, STT_ARM_TFUNC);
- else
- elf_sym->internal_elf_sym.st_info =
- ELF_ST_INFO (bind, STT_ARM_16BIT);
+ bind = ELF_ST_BIND (elf_sym->internal_elf_sym.st_info);
+
+ if (! bfd_is_arm_mapping_symbol_name (elf_sym->symbol.name))
+ {
+ /* If it's a .thumb_func, declare it as so,
+ otherwise tag label as .code 16. */
+ if (THUMB_IS_FUNC (sym))
+ elf_sym->internal_elf_sym.st_info =
+ ELF_ST_INFO (bind, STT_ARM_TFUNC);
+ else
+ elf_sym->internal_elf_sym.st_info =
+ ELF_ST_INFO (bind, STT_ARM_16BIT);
+ }
}
}
#endif
if (fixP->fx_r_type == BFD_RELOC_ARM_PLT32
|| fixP->fx_r_type == BFD_RELOC_ARM_GOT32
|| fixP->fx_r_type == BFD_RELOC_ARM_GOTOFF
+ || fixP->fx_r_type == BFD_RELOC_ARM_TLS_GD32
+ || fixP->fx_r_type == BFD_RELOC_ARM_TLS_LE32
+ || fixP->fx_r_type == BFD_RELOC_ARM_TLS_IE32
+ || fixP->fx_r_type == BFD_RELOC_ARM_TLS_LDM32
+ || fixP->fx_r_type == BFD_RELOC_ARM_TLS_LDO32
|| fixP->fx_r_type == BFD_RELOC_ARM_TARGET2)
return 0;
return (target_big_endian
? "elf32-bigarm-symbian"
: "elf32-littlearm-symbian");
+#elif defined (TE_VXWORKS)
+ return (target_big_endian
+ ? "elf32-bigarm-vxworks"
+ : "elf32-littlearm-vxworks");
#else
if (target_big_endian)
return "elf32-bigarm";
do
{
bfd_reloc_code_real_type reloc;
+ char *sym_start;
+ int sym_len;
+ sym_start = input_line_pointer;
expression (& exp);
+ sym_len = input_line_pointer - sym_start;
if (exp.X_op == O_symbol
&& * input_line_pointer == '('
howto->name, nbytes);
else
{
- char *p = frag_more ((int) nbytes);
+ char *p;
int offset = nbytes - size;
-
+ char *saved_buf = alloca (sym_len), *saved_input;
+
+ /* We've parsed an expression stopping at O_symbol. But there
+ may be more expression left now that we have parsed the
+ relocation marker. Parse it again. */
+ saved_input = input_line_pointer - sym_len;
+ memcpy (saved_buf, saved_input, sym_len);
+ memmove (saved_input, sym_start, sym_len);
+ input_line_pointer = saved_input;
+ expression (& exp);
+ memcpy (saved_input, saved_buf, sym_len);
+ assert (input_line_pointer >= saved_input + sym_len);
+
+ p = frag_more ((int) nbytes);
fix_new_exp (frag_now, p - frag_now->fr_literal + offset, size,
&exp, 0, reloc);
}
{
int size;
addressT where;
- unsigned char *ptr;
+ char *ptr;
/* The current word of data. */
valueT data;
/* The number of bytes left in this word. */
/* Custom personality routine. */
fix_new (frag_now, where, 4, unwind.personality_routine, 0, 1,
BFD_RELOC_ARM_PREL31);
+
where += 4;
ptr += 4;
break;
/* ABI defined personality routines. */
- /* TODO: Emit R_ARM_NONE to the personality routine. */
case 0:
/* Three opcodes bytes are packed into the first word. */
data = 0x80;
s_arm_unwind_fnend (int ignored ATTRIBUTE_UNUSED)
{
long where;
- unsigned char *ptr;
+ char *ptr;
valueT val;
demand_empty_rest_of_line ();
fix_new (frag_now, where, 4, unwind.proc_start, 0, 1,
BFD_RELOC_ARM_PREL31);
+ /* Indicate dependency on EHABI-defined personality routines to the
+ linker, if it hasn't been done already. */
+ if (unwind.personality_index >= 0 && unwind.personality_index < 3)
+ {
+ char *name[] = { "__aeabi_unwind_cpp_pr0",
+ "__aeabi_unwind_cpp_pr1",
+ "__aeabi_unwind_cpp_pr2" };
+ if (!(marked_pr_dependency & (1 << unwind.personality_index)))
+ {
+ symbolS *pr = symbol_find_or_make (name[unwind.personality_index]);
+ fix_new (frag_now, where, 0, pr, 0, 1, BFD_RELOC_NONE);
+ marked_pr_dependency |= 1 << unwind.personality_index;
+ seg_info (now_seg)->tc_segment_info_data.marked_pr_dependency
+ = marked_pr_dependency;
+ }
+ }
+
if (val)
/* Inline exception table entry. */
md_number_to_chars (ptr + 4, val, 4);
projects / deliverable / binutils-gdb.git / blobdiff