gas: blackfin: support numeric local labels with LOOP_BEGIN/LOOP_END pseudo insns

[deliverable/binutils-gdb.git] / gas / config / tc-bfin.c

diff --git a/gas/config/tc-bfin.c b/gas/config/tc-bfin.c
index 6680f22361aed4ef7eae1cd3b078be56152e06b4..3efc4b67a0a9e192dc34578d04a6d132c99f16fe 100644 (file)
--- a/gas/config/tc-bfin.c
+++ b/gas/config/tc-bfin.c
@@ -1,5 +1,5 @@
 /* tc-bfin.c -- Assembler for the ADI Blackfin.
-   Copyright 2005, 2006, 2007, 2008, 2009
+   Copyright 2005, 2006, 2007, 2008, 2009, 2010
    Free Software Foundation, Inc.
 
    This file is part of GAS, the GNU Assembler.
@@ -85,7 +85,7 @@ bfin_pic_ptr (int nbytes)
   do
     {
       bfd_reloc_code_real_type reloc_type = BFD_RELOC_BFIN_FUNCDESC;
-      
+
       if (strncasecmp (input_line_pointer, "funcdesc(", 9) == 0)
        {
          input_line_pointer += 9;
@@ -136,7 +136,7 @@ const pseudo_typeS md_pseudo_table[] = {
 };
 
 /* Characters that are used to denote comments and line separators. */
-const char comment_chars[] = "";
+const char comment_chars[] = "#";
 const char line_comment_chars[] = "#";
 const char line_separator_chars[] = ";";
 
@@ -151,6 +151,8 @@ const char FLT_CHARS[] = "fFdDxX";
 typedef enum bfin_cpu_type
 {
   BFIN_CPU_UNKNOWN,
+  BFIN_CPU_BF504,
+  BFIN_CPU_BF506,
   BFIN_CPU_BF512,
   BFIN_CPU_BF514,
   BFIN_CPU_BF516,
@@ -179,7 +181,8 @@ typedef enum bfin_cpu_type
   BFIN_CPU_BF548M,
   BFIN_CPU_BF549,
   BFIN_CPU_BF549M,
-  BFIN_CPU_BF561
+  BFIN_CPU_BF561,
+  BFIN_CPU_BF592,
 } bfin_cpu_t;
 
 bfin_cpu_t bfin_cpu_type = BFIN_CPU_UNKNOWN;
@@ -200,15 +203,23 @@ struct bfin_cpu
 
 struct bfin_cpu bfin_cpus[] =
 {
+  {"bf504", BFIN_CPU_BF504, 0x0000, AC_05000074},
+
+  {"bf506", BFIN_CPU_BF506, 0x0000, AC_05000074},
+
+  {"bf512", BFIN_CPU_BF512, 0x0002, AC_05000074},
   {"bf512", BFIN_CPU_BF512, 0x0001, AC_05000074},
   {"bf512", BFIN_CPU_BF512, 0x0000, AC_05000074},
 
+  {"bf514", BFIN_CPU_BF514, 0x0002, AC_05000074},
   {"bf514", BFIN_CPU_BF514, 0x0001, AC_05000074},
   {"bf514", BFIN_CPU_BF514, 0x0000, AC_05000074},
 
+  {"bf516", BFIN_CPU_BF516, 0x0002, AC_05000074},
   {"bf516", BFIN_CPU_BF516, 0x0001, AC_05000074},
   {"bf516", BFIN_CPU_BF516, 0x0000, AC_05000074},
 
+  {"bf518", BFIN_CPU_BF518, 0x0002, AC_05000074},
   {"bf518", BFIN_CPU_BF518, 0x0001, AC_05000074},
   {"bf518", BFIN_CPU_BF518, 0x0000, AC_05000074},
 
@@ -307,6 +318,9 @@ struct bfin_cpu bfin_cpus[] =
   {"bf561", BFIN_CPU_BF561, 0x0003, AC_05000074},
   {"bf561", BFIN_CPU_BF561, 0x0002, AC_05000074},
 
+  {"bf592", BFIN_CPU_BF592, 0x0001, AC_05000074},
+  {"bf592", BFIN_CPU_BF592, 0x0000, AC_05000074},
+
   {NULL, 0, 0, 0}
 };
 
@@ -441,7 +455,7 @@ md_begin ()
   /* Ensure that lines can begin with '(', for multiple
      register stack pops. */
   lex_type ['('] = LEX_BEGIN_NAME;
-  
+
 #ifdef OBJ_ELF
   record_alignment (text_section, 2);
   record_alignment (data_section, 2);
@@ -454,7 +468,7 @@ md_begin ()
 #ifdef DEBUG
   extern int debug_codeselection;
   debug_codeselection = 1;
-#endif 
+#endif
 
   last_insn_size = 0;
 }
@@ -844,11 +858,11 @@ md_pcrel_from_section (fixP, sec)
 /* Return true if the fix can be handled by GAS, false if it must
    be passed through to the linker.  */
 
-bfd_boolean  
+bfd_boolean
 bfin_fix_adjustable (fixS *fixP)
-{         
+{
   switch (fixP->fx_r_type)
-    {     
+    {
   /* Adjust_reloc_syms doesn't know about the GOT.  */
     case BFD_RELOC_BFIN_GOT:
     case BFD_RELOC_BFIN_PLTPC:
@@ -856,10 +870,10 @@ bfin_fix_adjustable (fixS *fixP)
     case BFD_RELOC_VTABLE_INHERIT:
     case BFD_RELOC_VTABLE_ENTRY:
       return 0;
-        
+
     default:
       return 1;
-    }     
+    }
 }
 
 /* Special extra functions that help bfin-parse.y perform its job.  */
@@ -1806,6 +1820,16 @@ bfin_gen_pseudodbg_assert (int dbgop, REG_T regtest, int expected)
   return GEN_OPCODE32 ();
 }
 
+INSTR_T
+bfin_gen_pseudochr (int ch)
+{
+  INIT (PseudoChr);
+
+  ASSIGN (ch);
+
+  return GEN_OPCODE16 ();
+}
+
 /* Multiple instruction generation.  */
 
 INSTR_T
@@ -1850,6 +1874,7 @@ bfin_gen_loop (Expr_Node *exp, REG_T reg, int rop, REG_T preg)
   char *lbeginsym, *lendsym;
   Expr_Node_Value lbeginval, lendval;
   Expr_Node *lbegin, *lend;
+  symbolS *sym;
 
   loopsym = exp->value.s_value;
   lbeginsym = (char *) xmalloc (strlen (loopsym) + strlen ("__BEGIN") + 5);
@@ -1872,9 +1897,20 @@ bfin_gen_loop (Expr_Node *exp, REG_T reg, int rop, REG_T preg)
   lbegin = Expr_Node_Create (Expr_Node_Reloc, lbeginval, NULL, NULL);
   lend   = Expr_Node_Create (Expr_Node_Reloc, lendval, NULL, NULL);
 
-  symbol_remove (symbol_find (loopsym), &symbol_rootP, &symbol_lastP);
+  sym = symbol_find(loopsym);
+  if (!S_IS_LOCAL (sym) || (S_IS_LOCAL (sym) && !symbol_used_p (sym)))
+    symbol_remove (sym, &symbol_rootP, &symbol_lastP);
 
-  return bfin_gen_loopsetup(lbegin, reg, rop, lend, preg);
+  return bfin_gen_loopsetup (lbegin, reg, rop, lend, preg);
+}
+
+void
+bfin_loop_attempt_create_label (Expr_Node *exp, int is_begin)
+{
+  char *name;
+  name = fb_label_name (exp->value.i_value, is_begin);
+  exp->value.s_value = xstrdup (name);
+  exp->type = Expr_Node_Reloc;
 }
 
 void
@@ -1940,7 +1976,7 @@ bfin_start_label (char *s, char *ptr)
     }
 
   return TRUE;
-} 
+}
 
 int
 bfin_force_relocation (struct fix *fixp)
@@ -2433,7 +2469,7 @@ decode_dsp32alu_0 (int iw0, int iw1)
 
   else if (aop == 0 && aopcde == 24)
     return DREG_MASK (dst0);
-  else if (aop == 1 && aopcde == 24) 
+  else if (aop == 1 && aopcde == 24)
     return DREG_MASK (dst0) | DREG_MASK (dst1);
   else if (aopcde == 13)
     return DREG_MASK (dst0) | DREG_MASK (dst1);