BFIN_CPU_BF548M,
BFIN_CPU_BF549,
BFIN_CPU_BF549M,
- BFIN_CPU_BF561
+ BFIN_CPU_BF561,
+ BFIN_CPU_BF592,
} bfin_cpu_t;
bfin_cpu_t bfin_cpu_type = BFIN_CPU_UNKNOWN;
{"bf506", BFIN_CPU_BF506, 0x0000, AC_05000074},
+ {"bf512", BFIN_CPU_BF512, 0x0002, AC_05000074},
{"bf512", BFIN_CPU_BF512, 0x0001, AC_05000074},
{"bf512", BFIN_CPU_BF512, 0x0000, AC_05000074},
+ {"bf514", BFIN_CPU_BF514, 0x0002, AC_05000074},
{"bf514", BFIN_CPU_BF514, 0x0001, AC_05000074},
{"bf514", BFIN_CPU_BF514, 0x0000, AC_05000074},
+ {"bf516", BFIN_CPU_BF516, 0x0002, AC_05000074},
{"bf516", BFIN_CPU_BF516, 0x0001, AC_05000074},
{"bf516", BFIN_CPU_BF516, 0x0000, AC_05000074},
+ {"bf518", BFIN_CPU_BF518, 0x0002, AC_05000074},
{"bf518", BFIN_CPU_BF518, 0x0001, AC_05000074},
{"bf518", BFIN_CPU_BF518, 0x0000, AC_05000074},
{"bf542m", BFIN_CPU_BF542M, 0x0003, AC_05000074},
+ {"bf542", BFIN_CPU_BF542, 0x0004, AC_05000074},
{"bf542", BFIN_CPU_BF542, 0x0002, AC_05000074},
{"bf542", BFIN_CPU_BF542, 0x0001, AC_05000074},
{"bf542", BFIN_CPU_BF542, 0x0000, AC_05000074},
{"bf544m", BFIN_CPU_BF544M, 0x0003, AC_05000074},
+ {"bf544", BFIN_CPU_BF544, 0x0004, AC_05000074},
{"bf544", BFIN_CPU_BF544, 0x0002, AC_05000074},
{"bf544", BFIN_CPU_BF544, 0x0001, AC_05000074},
{"bf544", BFIN_CPU_BF544, 0x0000, AC_05000074},
{"bf547m", BFIN_CPU_BF547M, 0x0003, AC_05000074},
+ {"bf547", BFIN_CPU_BF547, 0x0004, AC_05000074},
{"bf547", BFIN_CPU_BF547, 0x0002, AC_05000074},
{"bf547", BFIN_CPU_BF547, 0x0001, AC_05000074},
{"bf547", BFIN_CPU_BF547, 0x0000, AC_05000074},
{"bf548m", BFIN_CPU_BF548M, 0x0003, AC_05000074},
+ {"bf548", BFIN_CPU_BF548, 0x0004, AC_05000074},
{"bf548", BFIN_CPU_BF548, 0x0002, AC_05000074},
{"bf548", BFIN_CPU_BF548, 0x0001, AC_05000074},
{"bf548", BFIN_CPU_BF548, 0x0000, AC_05000074},
{"bf549m", BFIN_CPU_BF549M, 0x0003, AC_05000074},
+ {"bf549", BFIN_CPU_BF549, 0x0004, AC_05000074},
{"bf549", BFIN_CPU_BF549, 0x0002, AC_05000074},
{"bf549", BFIN_CPU_BF549, 0x0001, AC_05000074},
{"bf549", BFIN_CPU_BF549, 0x0000, AC_05000074},
{"bf561", BFIN_CPU_BF561, 0x0003, AC_05000074},
{"bf561", BFIN_CPU_BF561, 0x0002, AC_05000074},
+ {"bf592", BFIN_CPU_BF592, 0x0001, AC_05000074},
+ {"bf592", BFIN_CPU_BF592, 0x0000, AC_05000074},
+
{NULL, 0, 0, 0}
};
return GEN_OPCODE32 ();
}
+INSTR_T
+bfin_gen_pseudochr (int ch)
+{
+ INIT (PseudoChr);
+
+ ASSIGN (ch);
+
+ return GEN_OPCODE16 ();
+}
+
/* Multiple instruction generation. */
INSTR_T
char *lbeginsym, *lendsym;
Expr_Node_Value lbeginval, lendval;
Expr_Node *lbegin, *lend;
+ symbolS *sym;
loopsym = exp->value.s_value;
lbeginsym = (char *) xmalloc (strlen (loopsym) + strlen ("__BEGIN") + 5);
lbegin = Expr_Node_Create (Expr_Node_Reloc, lbeginval, NULL, NULL);
lend = Expr_Node_Create (Expr_Node_Reloc, lendval, NULL, NULL);
- symbol_remove (symbol_find (loopsym), &symbol_rootP, &symbol_lastP);
+ sym = symbol_find(loopsym);
+ if (!S_IS_LOCAL (sym) || (S_IS_LOCAL (sym) && !symbol_used_p (sym)))
+ symbol_remove (sym, &symbol_rootP, &symbol_lastP);
+
+ return bfin_gen_loopsetup (lbegin, reg, rop, lend, preg);
+}
- return bfin_gen_loopsetup(lbegin, reg, rop, lend, preg);
+void
+bfin_loop_attempt_create_label (Expr_Node *exp, int is_begin)
+{
+ char *name;
+ name = fb_label_name (exp->value.i_value, is_begin);
+ exp->value.s_value = xstrdup (name);
+ exp->type = Expr_Node_Reloc;
}
void