RISC-V: Fix lui argument parsing.

[deliverable/binutils-gdb.git] / gas / config / tc-crx.c

diff --git a/gas/config/tc-crx.c b/gas/config/tc-crx.c
index be0d455587a7a645ad36d49063f17c746e7b558a..cb31c616ba0b56b106adac257a18a66ed4e63127 100644 (file)
--- a/gas/config/tc-crx.c
+++ b/gas/config/tc-crx.c
@@ -1,5 +1,5 @@
 /* tc-crx.c -- Assembler code for the CRX CPU core.
-   Copyright (C) 2004-2017 Free Software Foundation, Inc.
+   Copyright (C) 2004-2019 Free Software Foundation, Inc.
 
    Contributed by Tomer Levi, NSC, Israel.
    Originally written for GAS 2.12 by Tomer Levi, NSC, Israel.
@@ -69,21 +69,21 @@ static struct hash_control *reg_hash;
 /* CRX coprocessor registers hash table.  */
 static struct hash_control *copreg_hash;
 /* Current instruction we're assembling.  */
-const inst *instruction;
+static const inst *instruction;
 
 /* Global variables.  */
 
 /* Array to hold an instruction encoding.  */
-long output_opcode[2];
+static long output_opcode[2];
 
 /* Nonzero means a relocatable symbol.  */
-int relocatable;
+static int relocatable;
 
 /* A copy of the original instruction (used in error messages).  */
-char ins_parse[MAX_INST_LEN];
+static char ins_parse[MAX_INST_LEN];
 
 /* The current processed argument number.  */
-int cur_arg_num;
+static int cur_arg_num;
 
 /* Generic assembler global variables which must be defined by all targets.  */
 
@@ -1043,9 +1043,9 @@ parse_insn (ins *insn, char *operands)
   int i;
 
   /* Handle instructions with no operands.  */
-  for (i = 0; no_op_insn[i] != NULL; i++)
+  for (i = 0; crx_no_op_insn[i] != NULL; i++)
   {
-    if (streq (no_op_insn[i], instruction->mnemonic))
+    if (streq (crx_no_op_insn[i], instruction->mnemonic))
     {
       insn->nargs = 0;
       return;
@@ -1135,8 +1135,7 @@ getreg_image (reg r)
 /* Issue a error message when register is illegal.  */
 #define IMAGE_ERR \
   as_bad (_("Illegal register (`%s') in instruction: `%s'"), \
-           reg_name, ins_parse);                            \
-  break;
+         reg_name, ins_parse);
 
   switch (rreg->type)
   {
@@ -1145,18 +1144,21 @@ getreg_image (reg r)
        return rreg->image;
       else
        IMAGE_ERR;
+      break;
 
     case CRX_CFG_REGTYPE:
       if (is_procreg)
        return rreg->image;
       else
        IMAGE_ERR;
+      break;
 
     case CRX_R_REGTYPE:
       if (! is_procreg)
        return rreg->image;
       else
        IMAGE_ERR;
+      break;
 
     case CRX_C_REGTYPE:
     case CRX_CS_REGTYPE:
@@ -1165,6 +1167,7 @@ getreg_image (reg r)
 
     default:
       IMAGE_ERR;
+      break;
   }
 
   return 0;
@@ -1387,7 +1390,7 @@ check_range (long *num, int bits, int unsigned flags, int update)
                      : instruction->flags & DISPUD4 ? 4
                      : 0);
 
-      for (bin = 0; bin < cst4_maps; bin++)
+      for (bin = 0; bin < crx_cst4_maps; bin++)
        {
          if (value == mul * bin)
            {
@@ -1404,9 +1407,9 @@ check_range (long *num, int bits, int unsigned flags, int update)
     {
       int is_cst4 = 0;
 
-      for (bin = 0; bin < cst4_maps; bin++)
+      for (bin = 0; bin < crx_cst4_maps; bin++)
        {
-         if (value == (uint32_t) cst4_map[bin])
+         if (value == (uint32_t) crx_cst4_map[bin])
            {
              is_cst4 = 1;
              if (update)