/* tc-crx.c -- Assembler code for the CRX CPU core.
- Copyright (C) 2004-2017 Free Software Foundation, Inc.
+ Copyright (C) 2004-2020 Free Software Foundation, Inc.
Contributed by Tomer Levi, NSC, Israel.
Originally written for GAS 2.12 by Tomer Levi, NSC, Israel.
/* CRX coprocessor registers hash table. */
static struct hash_control *copreg_hash;
/* Current instruction we're assembling. */
-const inst *instruction;
+static const inst *instruction;
/* Global variables. */
/* Array to hold an instruction encoding. */
-long output_opcode[2];
+static long output_opcode[2];
/* Nonzero means a relocatable symbol. */
-int relocatable;
+static int relocatable;
/* A copy of the original instruction (used in error messages). */
-char ins_parse[MAX_INST_LEN];
+static char ins_parse[MAX_INST_LEN];
/* The current processed argument number. */
-int cur_arg_num;
+static int cur_arg_num;
/* Generic assembler global variables which must be defined by all targets. */
static int get_cinv_parameters (const char *);
static long getconstant (long, int);
static op_err check_range (long *, int, unsigned int, int);
-static int getreg_image (reg);
+static int getreg_image (int);
static void parse_operands (ins *, char *);
static void parse_insn (ins *, char *);
static void print_operand (int, int, argument *);
{
/* 'opcode' points to the start of the instruction, whether
we need to change the instruction's fixed encoding. */
- char *opcode = fragP->fr_literal + fragP->fr_fix;
+ char *opcode = &fragP->fr_literal[0] + fragP->fr_fix;
bfd_reloc_code_real_type reloc;
subseg_change (sec, 0);
cur_arg->type = arg_c;
goto set_params;
-/* Parse an operand according to its type. */
-set_params:
+ /* Parse an operand according to its type. */
+ set_params:
cur_arg->constant = 0;
set_operand (operand, crx_ins);
}
int i;
/* Handle instructions with no operands. */
- for (i = 0; no_op_insn[i] != NULL; i++)
+ for (i = 0; crx_no_op_insn[i] != NULL; i++)
{
- if (streq (no_op_insn[i], instruction->mnemonic))
+ if (streq (crx_no_op_insn[i], instruction->mnemonic))
{
insn->nargs = 0;
return;
issue an error. */
static int
-getreg_image (reg r)
+getreg_image (int r)
{
const reg_entry *rreg;
char *reg_name;
/* Issue a error message when register is illegal. */
#define IMAGE_ERR \
as_bad (_("Illegal register (`%s') in instruction: `%s'"), \
- reg_name, ins_parse); \
- break;
+ reg_name, ins_parse);
switch (rreg->type)
{
return rreg->image;
else
IMAGE_ERR;
+ break;
case CRX_CFG_REGTYPE:
if (is_procreg)
return rreg->image;
else
IMAGE_ERR;
+ break;
case CRX_R_REGTYPE:
if (! is_procreg)
return rreg->image;
else
IMAGE_ERR;
+ break;
case CRX_C_REGTYPE:
case CRX_CS_REGTYPE:
default:
IMAGE_ERR;
+ break;
}
return 0;
: instruction->flags & DISPUD4 ? 4
: 0);
- for (bin = 0; bin < cst4_maps; bin++)
+ for (bin = 0; bin < crx_cst4_maps; bin++)
{
if (value == mul * bin)
{
{
int is_cst4 = 0;
- for (bin = 0; bin < cst4_maps; bin++)
+ for (bin = 0; bin < crx_cst4_maps; bin++)
{
- if (value == (uint32_t) cst4_map[bin])
+ if (value == (uint32_t) crx_cst4_map[bin])
{
is_cst4 = 1;
if (update)
match = 1;
break;
-/* Try again with next instruction. */
-next_insn:
+ /* Try again with next instruction. */
+ next_insn:
instruction++;
}
as_bad (_("Maximum %d bits may be set in `mask16' operand"),
MAX_REGS_IN_MASK16);
-next_inst:
+ next_inst:
while (!ISALNUM (*paramP) && *paramP != '}')
paramP++;
}