/* tc-frv.c -- Assembler for the Fujitsu FRV.
- Copyright 2002, 2003 Free Software Foundation.
+ Copyright (C) 2002-2019 Free Software Foundation, Inc.
This file is part of GAS, the GNU Assembler.
GAS is free software; you can redistribute it and/or modify
it under the terms of the GNU General Public License as published by
- the Free Software Foundation; either version 2, or (at your option)
+ the Free Software Foundation; either version 3, or (at your option)
any later version.
GAS is distributed in the hope that it will be useful,
You should have received a copy of the GNU General Public License
along with GAS; see the file COPYING. If not, write to
- the Free Software Foundation, 59 Temple Place - Suite 330,
- Boston, MA 02111-1307, USA. */
+ the Free Software Foundation, 51 Franklin Street - Fifth Floor,
+ Boston, MA 02110-1301, USA. */
-#include <stdio.h>
#include "as.h"
-#include "subsegs.h"
+#include "subsegs.h"
#include "symcat.h"
#include "opcodes/frv-desc.h"
#include "opcodes/frv-opc.h"
#include "cgen.h"
-#include "libbfd.h"
#include "elf/common.h"
#include "elf/frv.h"
+#include "dwarf2dbg.h"
/* Structure to hold all of the different components describing
an individual instruction. */
VLIW_BRANCH_HAS_NOPS /* A Branch that requires NOPS. */
};
-/* We're going to use these in the fr_subtype field to mark
+/* We're going to use these in the fr_subtype field to mark
whether to keep inserted nops. */
#define NOP_KEEP 1 /* Keep these NOPS. */
const char comment_chars[] = ";";
const char line_comment_chars[] = "#";
-const char line_separator_chars[] = "";
+const char line_separator_chars[] = "!";
const char EXP_CHARS[] = "eE";
const char FLT_CHARS[] = "dD";
#endif
#endif
+#ifdef TE_LINUX
+# define DEFAULT_FDPIC EF_FRV_FDPIC
+#else
+# define DEFAULT_FDPIC 0
+#endif
+
static unsigned long frv_mach = bfd_mach_frv;
+static bfd_boolean fr400_audio;
/* Flags to set in the elf header */
-static flagword frv_flags = DEFAULT_FLAGS;
+static flagword frv_flags = DEFAULT_FLAGS | DEFAULT_FDPIC;
static int frv_user_set_flags_p = 0;
static int frv_pic_p = 0;
-static const char *frv_pic_flag = (const char *)0;
+static const char *frv_pic_flag = DEFAULT_FDPIC ? "-mfdpic" : (const char *)0;
/* Print tomcat-specific debugging info. */
static int tomcat_debug = 0;
static int tomcat_singles = 0;
/* Forward reference to static functions */
-static void frv_set_flags PARAMS ((int));
-static void frv_pic_ptr PARAMS ((int));
-static void frv_frob_file_section PARAMS ((bfd *, asection *, PTR));
+static void frv_set_flags (int);
+static void frv_pic_ptr (int);
/* The target specific pseudo-ops which we support. */
const pseudo_typeS md_pseudo_table[] =
#define OPTION_TOMCAT_STATS (OPTION_MD_BASE + 18)
#define OPTION_PACK (OPTION_MD_BASE + 19)
#define OPTION_NO_PACK (OPTION_MD_BASE + 20)
+#define OPTION_FDPIC (OPTION_MD_BASE + 21)
+#define OPTION_NOPIC (OPTION_MD_BASE + 22)
struct option md_longopts[] =
{
{ "mtomcat-stats", no_argument, NULL, OPTION_TOMCAT_STATS },
{ "mpack", no_argument, NULL, OPTION_PACK },
{ "mno-pack", no_argument, NULL, OPTION_NO_PACK },
+ { "mfdpic", no_argument, NULL, OPTION_FDPIC },
+ { "mnopic", no_argument, NULL, OPTION_NOPIC },
{ NULL, no_argument, NULL, 0 },
};
static int g_switch_value = 8;
int
-md_parse_option (c, arg)
- int c;
- char * arg;
+md_parse_option (int c, const char *arg)
{
switch (c)
{
case OPTION_CPU:
{
- char *p;
+ const char *p;
int cpu_flags = EF_FRV_CPU_GENERIC;
/* Identify the processor type */
frv_mach = bfd_mach_fr550;
}
+ else if (strcmp (p, "fr450") == 0)
+ {
+ cpu_flags = EF_FRV_CPU_FR450;
+ frv_mach = bfd_mach_fr450;
+ }
+
+ else if (strcmp (p, "fr405") == 0)
+ {
+ cpu_flags = EF_FRV_CPU_FR405;
+ frv_mach = bfd_mach_fr400;
+ fr400_audio = TRUE;
+ }
+
else if (strcmp (p, "fr400") == 0)
{
cpu_flags = EF_FRV_CPU_FR400;
frv_mach = bfd_mach_fr400;
+ fr400_audio = FALSE;
}
else if (strcmp (p, "fr300") == 0)
else
{
- as_fatal ("Unknown cpu -mcpu=%s", arg);
+ as_fatal (_("Unknown cpu -mcpu=%s"), arg);
return 0;
}
g_switch_value = 0;
break;
+ case OPTION_FDPIC:
+ frv_flags |= EF_FRV_FDPIC;
+ frv_pic_flag = "-mfdpic";
+ break;
+
+ case OPTION_NOPIC:
+ frv_flags &= ~(EF_FRV_FDPIC | EF_FRV_PIC
+ | EF_FRV_BIGPIC | EF_FRV_LIBPIC);
+ frv_pic_flag = 0;
+ break;
+
case OPTION_TOMCAT_DEBUG:
tomcat_debug = 1;
break;
}
void
-md_show_usage (stream)
- FILE * stream;
+md_show_usage (FILE * stream)
{
fprintf (stream, _("FRV specific command line options:\n"));
- fprintf (stream, _("-G n Data >= n bytes is in small data area\n"));
- fprintf (stream, _("-mgpr-32 Note 32 gprs are used\n"));
- fprintf (stream, _("-mgpr-64 Note 64 gprs are used\n"));
- fprintf (stream, _("-mfpr-32 Note 32 fprs are used\n"));
- fprintf (stream, _("-mfpr-64 Note 64 fprs are used\n"));
- fprintf (stream, _("-msoft-float Note software fp is used\n"));
- fprintf (stream, _("-mdword Note stack is aligned to a 8 byte boundary\n"));
- fprintf (stream, _("-mno-dword Note stack is aligned to a 4 byte boundary\n"));
- fprintf (stream, _("-mdouble Note fp double insns are used\n"));
- fprintf (stream, _("-mmedia Note media insns are used\n"));
- fprintf (stream, _("-mmuladd Note multiply add/subtract insns are used\n"));
- fprintf (stream, _("-mpack Note instructions are packed\n"));
- fprintf (stream, _("-mno-pack Do not allow instructions to be packed\n"));
- fprintf (stream, _("-mpic Note small position independent code\n"));
- fprintf (stream, _("-mPIC Note large position independent code\n"));
- fprintf (stream, _("-mlibrary-pic Compile library for large position indepedent code\n"));
- fprintf (stream, _("-mcpu={fr500|fr550|fr400|fr300|frv|simple|tomcat}\n"));
- fprintf (stream, _(" Record the cpu type\n"));
- fprintf (stream, _("-mtomcat-stats Print out stats for tomcat workarounds\n"));
- fprintf (stream, _("-mtomcat-debug Debug tomcat workarounds\n"));
-}
+ fprintf (stream, _("-G n Put data <= n bytes in the small data area\n"));
+ fprintf (stream, _("-mgpr-32 Mark generated file as only using 32 GPRs\n"));
+ fprintf (stream, _("-mgpr-64 Mark generated file as using all 64 GPRs\n"));
+ fprintf (stream, _("-mfpr-32 Mark generated file as only using 32 FPRs\n"));
+ fprintf (stream, _("-mfpr-64 Mark generated file as using all 64 FPRs\n"));
+ fprintf (stream, _("-msoft-float Mark generated file as using software FP\n"));
+ fprintf (stream, _("-mdword Mark generated file as using a 8-byte stack alignment\n"));
+ fprintf (stream, _("-mno-dword Mark generated file as using a 4-byte stack alignment\n"));
+ fprintf (stream, _("-mdouble Mark generated file as using double precision FP insns\n"));
+ fprintf (stream, _("-mmedia Mark generated file as using media insns\n"));
+ fprintf (stream, _("-mmuladd Mark generated file as using multiply add/subtract insns\n"));
+ fprintf (stream, _("-mpack Allow instructions to be packed\n"));
+ fprintf (stream, _("-mno-pack Do not allow instructions to be packed\n"));
+ fprintf (stream, _("-mpic Mark generated file as using small position independent code\n"));
+ fprintf (stream, _("-mPIC Mark generated file as using large position independent code\n"));
+ fprintf (stream, _("-mlibrary-pic Mark generated file as using position independent code for libraries\n"));
+ fprintf (stream, _("-mfdpic Assemble for the FDPIC ABI\n"));
+ fprintf (stream, _("-mnopic Disable -mpic, -mPIC, -mlibrary-pic and -mfdpic\n"));
+ fprintf (stream, _("-mcpu={fr500|fr550|fr400|fr405|fr450|fr300|frv|simple|tomcat}\n"));
+ fprintf (stream, _(" Record the cpu type\n"));
+ fprintf (stream, _("-mtomcat-stats Print out stats for tomcat workarounds\n"));
+ fprintf (stream, _("-mtomcat-debug Debug tomcat workarounds\n"));
+}
\f
void
-md_begin ()
+md_begin (void)
{
/* Initialize the `cgen' interface. */
-
+
/* Set the machine number and endian. */
gas_cgen_cpu_desc = frv_cgen_cpu_open (CGEN_CPU_OPEN_MACHS, 0,
CGEN_CPU_OPEN_ENDIAN,
frv_vliw_reset (& vliw, frv_mach, frv_flags);
}
-int chain_num = 0;
+bfd_boolean
+frv_md_fdpic_enabled (void)
+{
+ return (frv_flags & EF_FRV_FDPIC) != 0;
+}
-struct vliw_insn_list *frv_insert_vliw_insn PARAMS ((bfd_boolean));
+int chain_num = 0;
-struct vliw_insn_list *
-frv_insert_vliw_insn (count)
- bfd_boolean count;
+static struct vliw_insn_list *
+frv_insert_vliw_insn (bfd_boolean count)
{
struct vliw_insn_list *vliw_insn_list_entry;
struct vliw_chain *vliw_chain_entry;
if (current_vliw_chain == NULL)
{
- vliw_chain_entry = (struct vliw_chain *) xmalloc (sizeof (struct vliw_chain));
+ vliw_chain_entry = XNEW (struct vliw_chain);
vliw_chain_entry->insn_count = 0;
vliw_chain_entry->insn_list = NULL;
vliw_chain_entry->next = NULL;
previous_vliw_chain->next = vliw_chain_entry;
}
- vliw_insn_list_entry = (struct vliw_insn_list *) xmalloc (sizeof (struct vliw_insn_list));
+ vliw_insn_list_entry = XNEW (struct vliw_insn_list);
vliw_insn_list_entry->type = VLIW_GENERIC_TYPE;
vliw_insn_list_entry->insn = NULL;
vliw_insn_list_entry->sym = NULL;
}
/* Identify the following cases:
-
+
1) A VLIW insn that contains both a branch and the branch destination.
This requires the insertion of two vliw instructions before the
branch. The first consists of two nops. The second consists of
a single nop.
-
+
2) A single instruction VLIW insn which is the destination of a branch
that is in the next VLIW insn. This requires the insertion of a vliw
insn containing two nops before the branch.
-
+
3) A double instruction VLIW insn which contains the destination of a
branch that is in the next VLIW insn. This requires the insertion of
a VLIW insn containing a single nop before the branch.
-
+
4) A single instruction VLIW insn which contains branch destination (x),
followed by a single instruction VLIW insn which does not contain
the branch to (x), followed by a VLIW insn which does contain the branch
to (x). This requires the insertion of a VLIW insn containing a single
nop before the VLIW instruction containing the branch.
-
+
*/
#define FRV_IS_NOP(insn) (insn.buffer[0] == FRV_NOP_PACK || insn.buffer[0] == FRV_NOP_NOPACK)
#define FRV_NOP_PACK 0x00880000 /* ori.p gr0,0,gr0 */
/* Check a vliw insn for an insn of type containing the sym passed in label_sym. */
-static struct vliw_insn_list *frv_find_in_vliw
- PARAMS ((enum vliw_insn_type, struct vliw_chain *, symbolS *));
-
static struct vliw_insn_list *
-frv_find_in_vliw (vliw_insn_type, this_chain, label_sym)
- enum vliw_insn_type vliw_insn_type;
- struct vliw_chain *this_chain;
- symbolS *label_sym;
+frv_find_in_vliw (enum vliw_insn_type vliw_insn_type,
+ struct vliw_chain *this_chain,
+ symbolS *label_sym)
{
struct vliw_insn_list *the_insn;
{
/* A Vliw insn containing a single nop insn. */
VLIW_SINGLE_NOP,
-
+
/* A Vliw insn containing two nop insns. */
VLIW_DOUBLE_NOP,
- /* Two vliw insns. The first containing two nop insns.
+ /* Two vliw insns. The first containing two nop insns.
The second contain a single nop insn. */
VLIW_DOUBLE_THEN_SINGLE_NOP
};
-static void frv_debug_tomcat PARAMS ((struct vliw_chain *));
-
static void
-frv_debug_tomcat (start_chain)
- struct vliw_chain *start_chain;
+frv_debug_tomcat (struct vliw_chain *start_chain)
{
struct vliw_chain *this_chain;
struct vliw_insn_list *this_insn;
for (this_insn = this_chain->insn_list; this_insn; this_insn = this_insn->next)
{
if (this_insn->type == VLIW_LABEL_TYPE)
- fprintf (stderr, "Label Value: %d\n", (int) this_insn->sym);
+ fprintf (stderr, "Label Value: %p\n", this_insn->sym);
else if (this_insn->type == VLIW_BRANCH_TYPE)
- fprintf (stderr, "%s to %d\n", this_insn->insn->base->name, (int) this_insn->sym);
+ fprintf (stderr, "%s to %p\n", this_insn->insn->base->name, this_insn->sym);
else if (this_insn->type == VLIW_BRANCH_HAS_NOPS)
- fprintf (stderr, "nop'd %s to %d\n", this_insn->insn->base->name, (int) this_insn->sym);
+ fprintf (stderr, "nop'd %s to %p\n", this_insn->insn->base->name, this_insn->sym);
else if (this_insn->type == VLIW_NOP_TYPE)
fprintf (stderr, "Nop\n");
else
}
}
-static void frv_adjust_vliw_count PARAMS ((struct vliw_chain *));
-
static void
-frv_adjust_vliw_count (this_chain)
- struct vliw_chain *this_chain;
+frv_adjust_vliw_count (struct vliw_chain *this_chain)
{
struct vliw_insn_list *this_insn;
/* Insert the desired nop combination in the vliw chain before insert_before_insn.
Rechain the vliw insn. */
-static struct vliw_chain *frv_tomcat_shuffle
- PARAMS ((enum vliw_nop_type, struct vliw_chain *, struct vliw_insn_list *));
-
static struct vliw_chain *
-frv_tomcat_shuffle (this_nop_type, vliw_to_split, insert_before_insn)
- enum vliw_nop_type this_nop_type;
- struct vliw_chain *vliw_to_split;
- struct vliw_insn_list *insert_before_insn;
+frv_tomcat_shuffle (enum vliw_nop_type this_nop_type,
+ struct vliw_chain *vliw_to_split,
+ struct vliw_insn_list *insert_before_insn)
{
bfd_boolean pack_prev = FALSE;
struct vliw_insn_list *prev_insn = NULL;
struct vliw_insn_list *curr_insn = vliw_to_split->insn_list;
- struct vliw_chain *double_nop = (struct vliw_chain *) xmalloc (sizeof (struct vliw_chain));
- struct vliw_chain *single_nop = (struct vliw_chain *) xmalloc (sizeof (struct vliw_chain));
- struct vliw_chain *second_part = (struct vliw_chain *) xmalloc (sizeof (struct vliw_chain));
+ struct vliw_chain *double_nop = XNEW (struct vliw_chain);
+ struct vliw_chain *single_nop = XNEW (struct vliw_chain);
+ struct vliw_chain *second_part = XNEW (struct vliw_chain);
struct vliw_chain *curr_vliw = vliw_chain_top;
struct vliw_chain *prev_vliw = NULL;
pack_prev = TRUE;
prev_insn = curr_insn;
curr_insn = curr_insn->next;
- }
+ }
while (curr_vliw && curr_vliw != vliw_to_split)
{
/* Set the packing bit on the previous insn. */
if (pack_prev)
{
- unsigned char *buffer = prev_insn->address;
+ char *buffer = prev_insn->address;
buffer[0] |= 0x80;
}
/* The branch is in the middle. Split this vliw insn into first
- and second parts. Insert the NOP inbetween. */
+ and second parts. Insert the NOP between. */
second_part->insn_list = insert_before_insn;
second_part->insn_list->type = VLIW_BRANCH_HAS_NOPS;
frv_adjust_vliw_count (second_part);
single_nop->next = second_part;
-
+
vliw_to_split->next = single_nop;
prev_insn->next = NULL;
-
+
return_me = second_part;
frv_adjust_vliw_count (vliw_to_split);
}
/* Set the packing bit on the previous insn. */
if (pack_prev)
{
- unsigned char *buffer = prev_insn->address;
+ char *buffer = prev_insn->address;
buffer[0] |= 0x80;
}
/* The branch is in the middle. Split this vliw insn into first
- and second parts. Insert the NOP inbetween. */
+ and second parts. Insert the NOP in between. */
second_part->insn_list = insert_before_insn;
second_part->insn_list->type = VLIW_BRANCH_HAS_NOPS;
second_part->next = vliw_to_split->next;
frv_adjust_vliw_count (second_part);
-
+
double_nop->next = second_part;
-
+
vliw_to_split->next = single_nop;
prev_insn->next = NULL;
frv_adjust_vliw_count (vliw_to_split);
-
+
return_me = second_part;
}
break;
prev_vliw->next = double_nop;
else
vliw_chain_top = double_nop;
-
+
single_nop->next = vliw_to_split;
return_me = vliw_to_split;
vliw_to_split->insn_list->type = VLIW_BRANCH_HAS_NOPS;
/* Set the packing bit on the previous insn. */
if (pack_prev)
{
- unsigned char *buffer = prev_insn->address;
+ char *buffer = prev_insn->address;
buffer[0] |= 0x80;
}
/* The branch is in the middle of this vliw insn. Split into first and
- second parts. Insert the nop vliws in between. */
+ second parts. Insert the nop vliws in between. */
second_part->insn_list = insert_before_insn;
second_part->insn_list->type = VLIW_BRANCH_HAS_NOPS;
second_part->next = vliw_to_split->next;
return return_me;
}
-static void frv_tomcat_analyze_vliw_chains PARAMS ((void));
-
static void
-frv_tomcat_analyze_vliw_chains ()
+frv_tomcat_analyze_vliw_chains (void)
{
struct vliw_chain *vliw1 = NULL;
struct vliw_chain *vliw2 = NULL;
tomcat_doubles++;
goto workaround_top;
}
- else if (vliw2
+ else if (vliw2
&& vliw2->insn_count == 1
&& (temp_insn = frv_find_in_vliw (VLIW_BRANCH_TYPE, vliw3, vliw1->insn_list->sym)) != NULL)
{
if (vliw1->insn_count == 2)
{
- struct vliw_insn_list *this_insn;
-
- /* check vliw1 for a label. */
+ /* Check vliw1 for a label. */
for (this_insn = vliw1->insn_list; this_insn; this_insn = this_insn->next)
{
if (this_insn->type == VLIW_LABEL_TYPE)
}
void
-frv_tomcat_workaround ()
+frv_tomcat_workaround (void)
{
if (frv_mach != bfd_mach_frvtomcat)
return;
case FRV_INSN_CMQMULHU:
case FRV_INSN_MMACHS:
case FRV_INSN_MMRDHS:
- case FRV_INSN_CMMACHS:
+ case FRV_INSN_CMMACHS:
case FRV_INSN_MQMACHS:
case FRV_INSN_CMQMACHS:
case FRV_INSN_MQXMACHS:
}
static int
-fr550_check_acc_range (FRV_VLIW *vliw, frv_insn *insn)
+fr550_check_acc_range (FRV_VLIW *vlw, frv_insn *insn)
{
- switch ((*vliw->current_vliw)[vliw->next_slot - 1])
+ switch ((*vlw->current_vliw)[vlw->next_slot - 1])
{
case UNIT_FM0:
case UNIT_FM2:
return 0; /* all is ok */
}
+/* Return true if the target implements instruction INSN. */
+
+static bfd_boolean
+target_implements_insn_p (const CGEN_INSN *insn)
+{
+ switch (frv_mach)
+ {
+ default:
+ /* bfd_mach_frv or generic. */
+ return TRUE;
+
+ case bfd_mach_fr300:
+ case bfd_mach_frvsimple:
+ return CGEN_INSN_MACH_HAS_P (insn, MACH_SIMPLE);
+
+ case bfd_mach_fr400:
+ return ((fr400_audio || !CGEN_INSN_ATTR_VALUE (insn, CGEN_INSN_AUDIO))
+ && CGEN_INSN_MACH_HAS_P (insn, MACH_FR400));
+
+ case bfd_mach_fr450:
+ return CGEN_INSN_MACH_HAS_P (insn, MACH_FR450);
+
+ case bfd_mach_fr500:
+ return CGEN_INSN_MACH_HAS_P (insn, MACH_FR500);
+
+ case bfd_mach_fr550:
+ return CGEN_INSN_MACH_HAS_P (insn, MACH_FR550);
+ }
+}
+
void
-md_assemble (str)
- char * str;
+md_assemble (char *str)
{
frv_insn insn;
char *errmsg;
/* Initialize GAS's cgen interface for a new instruction. */
gas_cgen_init_parse ();
+ memset (&insn, 0, sizeof (insn));
+
insn.insn = frv_cgen_assemble_insn
(gas_cgen_cpu_desc, str, & insn.fields, insn.buffer, &errmsg);
-
+
if (!insn.insn)
{
- as_bad (errmsg);
+ as_bad ("%s", errmsg);
return;
}
-
+
/* If the cpu is tomcat, then we need to insert nops to workaround
hardware limitations. We need to keep track of each vliw unit
and examine the length of the unit and the individual insns
{
/* If we've just finished a VLIW insn OR this is a branch,
then start up a new frag. Fill it with nops. We will get rid
- of those that are not required after we've seen all of the
+ of those that are not required after we've seen all of the
instructions but before we start resolving fixups. */
if ( !FRV_IS_NOP (insn)
&& (frv_is_branch_insn (insn.insn) || insn.fields.f_pack))
instructions, don't do vliw checking. */
else if (frv_mach != bfd_mach_frv)
{
+ if (!target_implements_insn_p (insn.insn))
+ {
+ as_bad (_("Instruction not supported by this architecture"));
+ return;
+ }
packing_constraint = frv_vliw_add_insn (& vliw, insn.insn);
if (frv_mach == bfd_mach_fr550 && ! packing_constraint)
packing_constraint = fr550_check_acc_range (& vliw, & insn);
previous_vliw_chain = current_vliw_chain;
current_vliw_chain = NULL;
current_vliw_insn = NULL;
- }
+ }
}
}
/* The syntax in the manual says constants begin with '#'.
We just ignore it. */
-void
-md_operand (expressionP)
- expressionS * expressionP;
+void
+md_operand (expressionS *expressionP)
{
if (* input_line_pointer == '#')
{
}
valueT
-md_section_align (segment, size)
- segT segment;
- valueT size;
+md_section_align (segT segment, valueT size)
{
- int align = bfd_get_section_alignment (stdoutput, segment);
- return ((size + (1 << align) - 1) & (-1 << align));
+ int align = bfd_section_alignment (segment);
+ return ((size + (1 << align) - 1) & -(1 << align));
}
symbolS *
-md_undefined_symbol (name)
- char * name ATTRIBUTE_UNUSED;
+md_undefined_symbol (char *name ATTRIBUTE_UNUSED)
{
return 0;
}
};
long
-frv_relax_frag (fragP, stretch)
- fragS *fragP ATTRIBUTE_UNUSED;
- long stretch ATTRIBUTE_UNUSED;
+frv_relax_frag (fragS *fragP ATTRIBUTE_UNUSED, long stretch ATTRIBUTE_UNUSED)
{
return 0;
}
0 value. */
int
-md_estimate_size_before_relax (fragP, segment)
- fragS * fragP;
- segT segment ATTRIBUTE_UNUSED;
+md_estimate_size_before_relax (fragS *fragP, segT segment ATTRIBUTE_UNUSED)
{
switch (fragP->fr_subtype)
{
default:
case NOP_DELETE:
return 0;
- }
-}
+ }
+}
/* *fragP has been relaxed to its final size, and now needs to have
the bytes inside it modified to conform to the new size.
fragP->fr_subtype is the subtype of what the address relaxed to. */
void
-md_convert_frag (abfd, sec, fragP)
- bfd * abfd ATTRIBUTE_UNUSED;
- segT sec ATTRIBUTE_UNUSED;
- fragS * fragP;
+md_convert_frag (bfd *abfd ATTRIBUTE_UNUSED,
+ segT sec ATTRIBUTE_UNUSED,
+ fragS *fragP)
{
switch (fragP->fr_subtype)
{
case NOP_KEEP:
fragP->fr_fix = fragP->fr_var;
fragP->fr_var = 0;
- return;
+ return;
}
}
\f
given a PC relative reloc. */
long
-md_pcrel_from_section (fixP, sec)
- fixS * fixP;
- segT sec ATTRIBUTE_UNUSED;
+md_pcrel_from_section (fixS *fixP, segT sec)
{
- /* Make no adjustment for relocations that will be written out. */
- if (TC_FORCE_RELOCATION (fixP))
- return 0;
+ if (TC_FORCE_RELOCATION (fixP)
+ || (fixP->fx_addsy != (symbolS *) NULL
+ && S_GET_SEGMENT (fixP->fx_addsy) != sec))
+ {
+ /* If we can't adjust this relocation, or if it references a
+ local symbol in a different section (which
+ TC_FORCE_RELOCATION can't check), let the linker figure it
+ out. */
+ return 0;
+ }
return (fixP->fx_frag->fr_address + fixP->fx_where) & ~1;
}
*FIXP may be modified if desired. */
bfd_reloc_code_real_type
-md_cgen_lookup_reloc (insn, operand, fixP)
- const CGEN_INSN * insn ATTRIBUTE_UNUSED;
- const CGEN_OPERAND * operand;
- fixS * fixP;
+md_cgen_lookup_reloc (const CGEN_INSN *insn ATTRIBUTE_UNUSED,
+ const CGEN_OPERAND *operand,
+ fixS *fixP)
{
switch (operand->type)
{
case FRV_OPERAND_LABEL24:
fixP->fx_pcrel = TRUE;
+
+ if (fixP->fx_cgen.opinfo != 0)
+ return fixP->fx_cgen.opinfo;
+
return BFD_RELOC_FRV_LABEL24;
case FRV_OPERAND_UHI16:
case FRV_OPERAND_ULO16:
case FRV_OPERAND_SLO16:
-
+ case FRV_OPERAND_CALLANN:
+ case FRV_OPERAND_LDANN:
+ case FRV_OPERAND_LDDANN:
/* The relocation type should be recorded in opinfo */
if (fixP->fx_cgen.opinfo != 0)
return fixP->fx_cgen.opinfo;
case FRV_OPERAND_D12:
case FRV_OPERAND_S12:
+ if (fixP->fx_cgen.opinfo != 0)
+ return fixP->fx_cgen.opinfo;
+
return BFD_RELOC_FRV_GPREL12;
case FRV_OPERAND_U12:
return BFD_RELOC_FRV_GPRELU12;
- default:
+ default:
break;
}
return BFD_RELOC_NONE;
relaxing. */
int
-frv_force_relocation (fix)
- fixS * fix;
+frv_force_relocation (fixS *fix)
{
- if (fix->fx_r_type == BFD_RELOC_FRV_GPREL12
- || fix->fx_r_type == BFD_RELOC_FRV_GPRELU12)
- return 1;
+ switch (fix->fx_r_type < BFD_RELOC_UNUSED
+ ? (int) fix->fx_r_type
+ : fix->fx_cgen.opinfo)
+ {
+ case BFD_RELOC_FRV_GPREL12:
+ case BFD_RELOC_FRV_GPRELU12:
+ case BFD_RELOC_FRV_GPREL32:
+ case BFD_RELOC_FRV_GPRELHI:
+ case BFD_RELOC_FRV_GPRELLO:
+ case BFD_RELOC_FRV_GOT12:
+ case BFD_RELOC_FRV_GOTHI:
+ case BFD_RELOC_FRV_GOTLO:
+ case BFD_RELOC_FRV_FUNCDESC_VALUE:
+ case BFD_RELOC_FRV_FUNCDESC_GOTOFF12:
+ case BFD_RELOC_FRV_FUNCDESC_GOTOFFHI:
+ case BFD_RELOC_FRV_FUNCDESC_GOTOFFLO:
+ case BFD_RELOC_FRV_GOTOFF12:
+ case BFD_RELOC_FRV_GOTOFFHI:
+ case BFD_RELOC_FRV_GOTOFFLO:
+ case BFD_RELOC_FRV_GETTLSOFF:
+ case BFD_RELOC_FRV_TLSDESC_VALUE:
+ case BFD_RELOC_FRV_GOTTLSDESC12:
+ case BFD_RELOC_FRV_GOTTLSDESCHI:
+ case BFD_RELOC_FRV_GOTTLSDESCLO:
+ case BFD_RELOC_FRV_TLSMOFF12:
+ case BFD_RELOC_FRV_TLSMOFFHI:
+ case BFD_RELOC_FRV_TLSMOFFLO:
+ case BFD_RELOC_FRV_GOTTLSOFF12:
+ case BFD_RELOC_FRV_GOTTLSOFFHI:
+ case BFD_RELOC_FRV_GOTTLSOFFLO:
+ case BFD_RELOC_FRV_TLSOFF:
+ case BFD_RELOC_FRV_TLSDESC_RELAX:
+ case BFD_RELOC_FRV_GETTLSOFF_RELAX:
+ case BFD_RELOC_FRV_TLSOFF_RELAX:
+ return 1;
+
+ default:
+ break;
+ }
return generic_force_reloc (fix);
}
+
+/* Apply a fixup that could be resolved within the assembler. */
+
+void
+md_apply_fix (fixS *fixP, valueT *valP, segT seg)
+{
+ if (fixP->fx_addsy == 0)
+ switch (fixP->fx_cgen.opinfo)
+ {
+ case BFD_RELOC_FRV_HI16:
+ *valP >>= 16;
+ /* Fall through. */
+ case BFD_RELOC_FRV_LO16:
+ *valP &= 0xffff;
+ break;
+
+ /* We need relocations for these, even if their symbols reduce
+ to constants. */
+ case BFD_RELOC_FRV_GPREL12:
+ case BFD_RELOC_FRV_GPRELU12:
+ case BFD_RELOC_FRV_GPREL32:
+ case BFD_RELOC_FRV_GPRELHI:
+ case BFD_RELOC_FRV_GPRELLO:
+ case BFD_RELOC_FRV_GOT12:
+ case BFD_RELOC_FRV_GOTHI:
+ case BFD_RELOC_FRV_GOTLO:
+ case BFD_RELOC_FRV_FUNCDESC_VALUE:
+ case BFD_RELOC_FRV_FUNCDESC_GOTOFF12:
+ case BFD_RELOC_FRV_FUNCDESC_GOTOFFHI:
+ case BFD_RELOC_FRV_FUNCDESC_GOTOFFLO:
+ case BFD_RELOC_FRV_GOTOFF12:
+ case BFD_RELOC_FRV_GOTOFFHI:
+ case BFD_RELOC_FRV_GOTOFFLO:
+ case BFD_RELOC_FRV_GETTLSOFF:
+ case BFD_RELOC_FRV_TLSDESC_VALUE:
+ case BFD_RELOC_FRV_GOTTLSDESC12:
+ case BFD_RELOC_FRV_GOTTLSDESCHI:
+ case BFD_RELOC_FRV_GOTTLSDESCLO:
+ case BFD_RELOC_FRV_TLSMOFF12:
+ case BFD_RELOC_FRV_TLSMOFFHI:
+ case BFD_RELOC_FRV_TLSMOFFLO:
+ case BFD_RELOC_FRV_GOTTLSOFF12:
+ case BFD_RELOC_FRV_GOTTLSOFFHI:
+ case BFD_RELOC_FRV_GOTTLSOFFLO:
+ case BFD_RELOC_FRV_TLSOFF:
+ case BFD_RELOC_FRV_TLSDESC_RELAX:
+ case BFD_RELOC_FRV_GETTLSOFF_RELAX:
+ case BFD_RELOC_FRV_TLSOFF_RELAX:
+ fixP->fx_addsy = abs_section_sym;
+ break;
+ }
+ else
+ switch (fixP->fx_cgen.opinfo)
+ {
+ case BFD_RELOC_FRV_GETTLSOFF:
+ case BFD_RELOC_FRV_TLSDESC_VALUE:
+ case BFD_RELOC_FRV_GOTTLSDESC12:
+ case BFD_RELOC_FRV_GOTTLSDESCHI:
+ case BFD_RELOC_FRV_GOTTLSDESCLO:
+ case BFD_RELOC_FRV_TLSMOFF12:
+ case BFD_RELOC_FRV_TLSMOFFHI:
+ case BFD_RELOC_FRV_TLSMOFFLO:
+ case BFD_RELOC_FRV_GOTTLSOFF12:
+ case BFD_RELOC_FRV_GOTTLSOFFHI:
+ case BFD_RELOC_FRV_GOTTLSOFFLO:
+ case BFD_RELOC_FRV_TLSOFF:
+ case BFD_RELOC_FRV_TLSDESC_RELAX:
+ case BFD_RELOC_FRV_GETTLSOFF_RELAX:
+ case BFD_RELOC_FRV_TLSOFF_RELAX:
+ /* Mark TLS symbols as such. */
+ if (S_GET_SEGMENT (fixP->fx_addsy) != absolute_section)
+ S_SET_THREAD_LOCAL (fixP->fx_addsy);
+ break;
+ }
+
+ gas_cgen_md_apply_fix (fixP, valP, seg);
+ return;
+}
+
\f
/* Write a value out to the object file, using the appropriate endianness. */
void
-frv_md_number_to_chars (buf, val, n)
- char * buf;
- valueT val;
- int n;
+frv_md_number_to_chars (char *buf, valueT val, int n)
{
number_to_chars_bigendian (buf, val, n);
}
-/* Turn a string in input_line_pointer into a floating point constant of type
- type, and store the appropriate bytes in *litP. The number of LITTLENUMS
- emitted is stored in *sizeP . An error message is returned, or NULL on OK.
-*/
-
-/* Equal to MAX_PRECISION in atof-ieee.c */
-#define MAX_LITTLENUMS 6
-
-char *
-md_atof (type, litP, sizeP)
- char type;
- char * litP;
- int * sizeP;
+const char *
+md_atof (int type, char *litP, int *sizeP)
{
- int i;
- int prec;
- LITTLENUM_TYPE words [MAX_LITTLENUMS];
- char * t;
-
- switch (type)
- {
- case 'f':
- case 'F':
- case 's':
- case 'S':
- prec = 2;
- break;
-
- case 'd':
- case 'D':
- case 'r':
- case 'R':
- prec = 4;
- break;
-
- /* FIXME: Some targets allow other format chars for bigger sizes here. */
-
- default:
- * sizeP = 0;
- return _("Bad call to md_atof()");
- }
-
- t = atof_ieee (input_line_pointer, type, words);
- if (t)
- input_line_pointer = t;
- * sizeP = prec * sizeof (LITTLENUM_TYPE);
-
- for (i = 0; i < prec; i++)
- {
- md_number_to_chars (litP, (valueT) words[i],
- sizeof (LITTLENUM_TYPE));
- litP += sizeof (LITTLENUM_TYPE);
- }
-
- return 0;
+ return ieee_md_atof (type, litP, sizeP, TRUE);
}
bfd_boolean
-frv_fix_adjustable (fixP)
- fixS * fixP;
+frv_fix_adjustable (fixS *fixP)
{
bfd_reloc_code_real_type reloc_type;
/* Allow user to set flags bits. */
void
-frv_set_flags (arg)
- int arg ATTRIBUTE_UNUSED;
+frv_set_flags (int arg ATTRIBUTE_UNUSED)
{
flagword new_flags = get_absolute_expression ();
flagword new_mask = ~ (flagword)0;
BFD_RELOC_32 at that time. */
void
-frv_pic_ptr (nbytes)
- int nbytes;
+frv_pic_ptr (int nbytes)
{
expressionS exp;
char *p;
do
{
- expression (&exp);
+ bfd_reloc_code_real_type reloc_type = BFD_RELOC_CTOR;
+
+ if (strncasecmp (input_line_pointer, "funcdesc(", 9) == 0)
+ {
+ input_line_pointer += 9;
+ expression (&exp);
+ if (*input_line_pointer == ')')
+ input_line_pointer++;
+ else
+ as_bad (_("missing ')'"));
+ reloc_type = BFD_RELOC_FRV_FUNCDESC;
+ }
+ else if (strncasecmp (input_line_pointer, "tlsmoff(", 8) == 0)
+ {
+ input_line_pointer += 8;
+ expression (&exp);
+ if (*input_line_pointer == ')')
+ input_line_pointer++;
+ else
+ as_bad (_("missing ')'"));
+ reloc_type = BFD_RELOC_FRV_TLSMOFF;
+ }
+ else
+ expression (&exp);
p = frag_more (4);
memset (p, 0, 4);
fix_new_exp (frag_now, p - frag_now->fr_literal, 4, &exp, 0,
- BFD_RELOC_CTOR);
+ reloc_type);
}
while (*input_line_pointer++ == ',');
not possible, issue an error. */
static void
-frv_frob_file_section (abfd, sec, ptr)
- bfd *abfd;
- asection *sec;
- PTR ptr ATTRIBUTE_UNUSED;
+frv_frob_file_section (bfd *abfd, asection *sec, void *ptr ATTRIBUTE_UNUSED)
{
segment_info_type *seginfo = seg_info (sec);
fixS *fixp;
CGEN_CPU_DESC cd = gas_cgen_cpu_desc;
- flagword flags = bfd_get_section_flags (abfd, sec);
+ flagword flags = bfd_section_flags (sec);
/* Skip relocations in known sections (.ctors, .dtors, and .gcc_except_table)
since we can fix those up by hand. */
for any relocations that pic won't support. */
void
-frv_frob_file ()
+frv_frob_file (void)
{
- bfd_map_over_sections (stdoutput, frv_frob_file_section, (PTR)0);
+ bfd_map_over_sections (stdoutput, frv_frob_file_section, (void *) 0);
}
void
-frv_frob_label (this_label)
- symbolS *this_label;
+frv_frob_label (symbolS *this_label)
{
struct vliw_insn_list *vliw_insn_list_entry;
+ dwarf2_emit_label (this_label);
if (frv_mach != bfd_mach_frvtomcat)
return;
vliw_insn_list_entry = frv_insert_vliw_insn(DONT_COUNT);
vliw_insn_list_entry->type = VLIW_LABEL_TYPE;
- vliw_insn_list_entry->sym = this_label;
+ vliw_insn_list_entry->sym = this_label;
}
fixS *
-frv_cgen_record_fixup_exp (frag, where, insn, length, operand, opinfo, exp)
- fragS * frag;
- int where;
- const CGEN_INSN * insn;
- int length;
- const CGEN_OPERAND * operand;
- int opinfo;
- expressionS * exp;
+frv_cgen_record_fixup_exp (fragS *frag,
+ int where,
+ const CGEN_INSN *insn,
+ int length,
+ const CGEN_OPERAND *operand,
+ int opinfo,
+ expressionS *exp)
{
fixS * fixP = gas_cgen_record_fixup_exp (frag, where, insn, length,
operand, opinfo, exp);
&& current_vliw_insn->type == VLIW_BRANCH_TYPE
&& exp != NULL)
current_vliw_insn->sym = exp->X_add_symbol;
-
+
return fixP;
}