/* tc-h8300.c -- Assemble code for the Renesas H8/300
- Copyright (C) 1991-2016 Free Software Foundation, Inc.
+ Copyright (C) 1991-2019 Free Software Foundation, Inc.
This file is part of GAS, the GNU Assembler.
#define h8_opcodes ops
#include "opcode/h8300.h"
#include "safe-ctype.h"
-
-#ifdef OBJ_ELF
#include "elf/h8.h"
-#endif
const char comment_chars[] = ";";
const char line_comment_chars[] = "#";
{"page", listing_eject, 0},
{"program", s_ignore, 0},
-#ifdef OBJ_ELF
{"section", h8300_elf_section, 0},
{"section.s", h8300_elf_section, 0},
{"sect", h8300_elf_section, 0},
{"sect.s", h8300_elf_section, 0},
-#endif
{0, 0, 0}
};
check_operand (operand, 0xffff, t);
bytes[0] |= operand->exp.X_add_number >> 8;
bytes[1] |= operand->exp.X_add_number >> 0;
-#ifdef OBJ_ELF
/* MOVA needs both relocs to relax the second operand properly. */
if (relaxmode != 0
&& (OP_KIND(this_try->opcode->how) == O_MOVAB
idx = BFD_RELOC_16;
fix_new_exp (frag_now, offset, 2, &operand->exp, 0, idx);
}
-#endif
break;
case L_24:
check_operand (operand, 0xffffff, t);
bytes[3] |= operand->exp.X_add_number >> 0;
if (relaxmode != 0)
{
-#ifdef OBJ_ELF
if ((operand->mode & MODE) == DISP && relaxmode == 1)
idx = BFD_RELOC_H8_DISP32A16;
else
-#endif
idx = (relaxmode == 2) ? R_MOV24B1 : R_MOVL1;
fix_new_exp (frag_now, offset, 4, &operand->exp, 0, idx);
}
case L_32:
size = 4;
where = (operand->mode & SIZE) == L_24 ? -1 : 0;
-#ifdef OBJ_ELF
if ((operand->mode & MODE) == DISP && relaxmode == 1)
idx = BFD_RELOC_H8_DISP32A16;
- else
-#endif
- if (relaxmode == 2)
+ else if (relaxmode == 2)
idx = R_MOV24B1;
else if (relaxmode == 1)
idx = R_MOVL1;
break;
default:
as_bad (_("Can't work out size of operand.\n"));
+ /* Fall through. */
case L_16:
case L_16U:
size = 2;
int x_mode = x & MODE;
if (x_mode == IMM || x_mode == DISP)
- {
-#ifndef OBJ_ELF
- /* Remove MEMRELAX flag added in h8300.h on mov with
- addressing mode "register indirect with displacement". */
- if (x_mode == DISP)
- x &= ~MEMRELAX;
-#endif
- do_a_fix_imm (output - frag_now->fr_literal + op_at[i] / 2,
- op_at[i] & 1, operand + i, (x & MEMRELAX) != 0,
- this_try);
- }
+ do_a_fix_imm (output - frag_now->fr_literal + op_at[i] / 2,
+ op_at[i] & 1, operand + i, (x & MEMRELAX) != 0,
+ this_try);
else if (x_mode == ABS)
do_a_fix_imm (output - frag_now->fr_literal + op_at[i] / 2,
op_at[i] & 1, operand + i,
if (operand[i].exp.X_add_number & 1)
as_warn (_("branch operand has odd offset (%lx)\n"),
(unsigned long) operand->exp.X_add_number);
-#ifndef OBJ_ELF
- /* The COFF port has always been off by one, changing it
- now would be an incompatible change, so we leave it as-is.
-
- We don't want to do this for ELF as we want to be
- compatible with the proposed ELF format from Hitachi. */
- operand[i].exp.X_add_number -= 1;
-#endif
if (size16)
{
operand[i].exp.X_add_number =
int where = 0;
bfd_reloc_code_real_type reloc_type = R_JMPL1;
-#ifdef OBJ_ELF
/* To be compatible with the proposed H8 ELF format, we
want the relocation's offset to point to the first byte
that will be modified, not to the start of the instruction. */
}
else
where = 1;
-#endif
/* This jmp may be a jump or a branch. */