static enum flag_code flag_code;
static unsigned int object_64bit;
+static unsigned int disallow_64bit_reloc;
static int use_rela_relocations = 0;
+#if ((defined (OBJ_MAYBE_COFF) && defined (OBJ_MAYBE_AOUT)) \
+ || defined (OBJ_ELF) || defined (OBJ_MAYBE_ELF) \
+ || defined (TE_PE) || defined (TE_PEP) || defined (OBJ_MACH_O))
+
/* The ELF ABI to use. */
enum x86_elf_abi
{
I386_ABI,
- X86_64_LP64_ABI,
- X86_64_ILP32_ABI
+ X86_64_ABI,
+ X86_64_X32_ABI
};
static enum x86_elf_abi x86_elf_abi = I386_ABI;
+#endif
/* The names used to print error messages. */
static const char *flag_code_names[] =
CPU_ABM_FLAGS, 0, 0 },
{ STRING_COMMA_LEN (".bmi"), PROCESSOR_UNKNOWN,
CPU_BMI_FLAGS, 0, 0 },
+ { STRING_COMMA_LEN (".tbm"), PROCESSOR_UNKNOWN,
+ CPU_TBM_FLAGS, 0, 0 },
};
#ifdef I386COFF
else
patt = f32_patt;
break;
- case PROCESSOR_PENTIUMPRO:
case PROCESSOR_PENTIUM4:
case PROCESSOR_NOCONA:
case PROCESSOR_CORE:
case PROCESSOR_I386:
case PROCESSOR_I486:
case PROCESSOR_PENTIUM:
+ case PROCESSOR_PENTIUMPRO:
case PROCESSOR_GENERIC32:
patt = f32_patt;
break;
else
cpu_sub_arch_name = xstrdup (cpu_arch[j].name);
cpu_arch_flags = flags;
+ cpu_arch_isa_flags = flags;
}
*input_line_pointer = e;
demand_empty_rest_of_line ();
if (flag_code == CODE_64BIT)
{
+#if defined (OBJ_COFF) && defined (TE_PE)
+ x86_dwarf2_return_column = (OUTPUT_FLAVOR == bfd_target_coff_flavour
+ ? 32 : 16);
+#else
x86_dwarf2_return_column = 16;
+#endif
x86_cie_data_alignment = -8;
}
else
#define OPTION_MSSE2AVX (OPTION_MD_BASE + 10)
#define OPTION_MSSE_CHECK (OPTION_MD_BASE + 11)
#define OPTION_MAVXSCALAR (OPTION_MD_BASE + 12)
-#define OPTION_N32 (OPTION_MD_BASE + 13)
+#define OPTION_X32 (OPTION_MD_BASE + 13)
struct option md_longopts[] =
{
{"64", no_argument, NULL, OPTION_64},
#endif
#if defined (OBJ_ELF) || defined (OBJ_MAYBE_ELF)
- {"n32", no_argument, NULL, OPTION_N32},
+ {"x32", no_argument, NULL, OPTION_X32},
#endif
{"divide", no_argument, NULL, OPTION_DIVIDE},
{"march", required_argument, NULL, OPTION_MARCH},
#endif
#if defined (OBJ_ELF) || defined (OBJ_MAYBE_ELF)
- case OPTION_N32:
+ case OPTION_X32:
if (IS_ELF)
{
const char **list, **l;
else
cpu_sub_arch_name = xstrdup (cpu_arch[j].name);
cpu_arch_flags = flags;
+ cpu_arch_isa_flags = flags;
}
break;
}
#if (defined (OBJ_ELF) || defined (OBJ_MAYBE_ELF) \
|| defined (TE_PE) || defined (TE_PEP))
fprintf (stream, _("\
- --32/--64/--n32 generate 32bit/64bit/n32bit code\n"));
+ --32/--64/--x32 generate 32bit/64bit/x32 code\n"));
#endif
#ifdef SVR4_COMMENT_CHARS
fprintf (stream, _("\
{
update_code_flag (CODE_64BIT, 1);
if (default_arch[6] == '\0')
- x86_elf_abi = X86_64_LP64_ABI;
+ x86_elf_abi = X86_64_ABI;
else
- x86_elf_abi = X86_64_ILP32_ABI;
+ x86_elf_abi = X86_64_X32_ABI;
}
else if (!strcmp (default_arch, "i386"))
update_code_flag (CODE_32BIT, 1);
default:
format = ELF_TARGET_FORMAT;
break;
- case X86_64_LP64_ABI:
+ case X86_64_ABI:
use_rela_relocations = 1;
object_64bit = 1;
format = ELF_TARGET_FORMAT64;
break;
- case X86_64_ILP32_ABI:
+ case X86_64_X32_ABI:
use_rela_relocations = 1;
object_64bit = 1;
+ disallow_64bit_reloc = 1;
format = ELF_TARGET_FORMAT32;
break;
}
if (cpu_arch_isa == PROCESSOR_L1OM)
{
- if (x86_elf_abi != X86_64_LP64_ABI)
+ if (x86_elf_abi != X86_64_ABI)
as_fatal (_("Intel L1OM is 64bit only"));
return ELF_TARGET_L1OM_FORMAT;
}
/* Use the rela in 64bit mode. */
else
{
+ if (disallow_64bit_reloc)
+ switch (code)
+ {
+ case BFD_RELOC_64:
+ case BFD_RELOC_X86_64_DTPOFF64:
+ case BFD_RELOC_X86_64_TPOFF64:
+ case BFD_RELOC_64_PCREL:
+ case BFD_RELOC_X86_64_GOTOFF64:
+ case BFD_RELOC_X86_64_GOT64:
+ case BFD_RELOC_X86_64_GOTPCREL64:
+ case BFD_RELOC_X86_64_GOTPC64:
+ case BFD_RELOC_X86_64_GOTPLT64:
+ case BFD_RELOC_X86_64_PLTOFF64:
+ as_bad_where (fixp->fx_file, fixp->fx_line,
+ _("cannot represent relocation type %s in x32 mode"),
+ bfd_get_reloc_code_name (code));
+ break;
+ default:
+ break;
+ }
+
if (!fixp->fx_pcrel)
rel->addend = fixp->fx_offset;
else