/* tc-i386.h -- Header file for tc-i386.c
- Copyright (C) 1989, 92, 93, 94, 95, 96, 97, 1998 Free Software Foundation.
+ Copyright (C) 1989-2019 Free Software Foundation, Inc.
This file is part of GAS, the GNU Assembler.
GAS is free software; you can redistribute it and/or modify
it under the terms of the GNU General Public License as published by
- the Free Software Foundation; either version 2, or (at your option)
+ the Free Software Foundation; either version 3, or (at your option)
any later version.
GAS is distributed in the hope that it will be useful,
You should have received a copy of the GNU General Public License
along with GAS; see the file COPYING. If not, write to the Free
- Software Foundation, 59 Temple Place - Suite 330, Boston, MA
- 02111-1307, USA. */
+ Software Foundation, 51 Franklin Street - Fifth Floor, Boston, MA
+ 02110-1301, USA. */
#ifndef TC_I386
#define TC_I386 1
-#ifdef ANSI_PROTOTYPES
+#include "opcodes/i386-opc.h"
+
struct fix;
-#endif
#define TARGET_BYTES_BIG_ENDIAN 0
-#ifdef TE_LYNX
-#define TARGET_FORMAT "coff-i386-lynx"
-#endif
-
-#ifdef BFD_ASSEMBLER
-/* This is used to determine relocation types in tc-i386.c. The first
- parameter is the current relocation type, the second one is the desired
- type. The idea is that if the original type is already some kind of PIC
- relocation, we leave it alone, otherwise we give it the desired type */
-
-#define TC_RELOC(X,Y) (((X) != BFD_RELOC_386_PLT32 && \
- (X) != BFD_RELOC_386_GOTOFF && \
- (X) != BFD_RELOC_386_GOT32 && \
- (X) != BFD_RELOC_386_GOTPC) ? Y : X)
+#define TARGET_ARCH (i386_arch ())
+#define TARGET_MACH (i386_mach ())
+extern enum bfd_architecture i386_arch (void);
+extern unsigned long i386_mach (void);
-#define tc_fix_adjustable(X) tc_i386_fix_adjustable(X)
-extern int tc_i386_fix_adjustable PARAMS ((struct fix *));
-
-/* This is the relocation type for direct references to GLOBAL_OFFSET_TABLE.
- * It comes up in complicated expressions such as
- * _GLOBAL_OFFSET_TABLE_+[.-.L284], which cannot be expressed normally with
- * the regular expressions. The fixup specified here when used at runtime
- * implies that we should add the address of the GOT to the specified location,
- * and as a result we have simplified the expression into something we can use.
- */
-#define TC_RELOC_GLOBAL_OFFSET_TABLE BFD_RELOC_386_GOTPC
-
-/* This expression evaluates to false if the relocation is for a local object
- for which we still want to do the relocation at runtime. True if we
- are willing to perform this relocation while building the .o file.
- This is only used for pcrel relocations, so GOTOFF does not need to be
- checked here. I am not sure if some of the others are ever used with
- pcrel, but it is easier to be safe than sorry. */
-
-#define TC_RELOC_RTSYM_LOC_FIXUP(FIX) \
- ((FIX)->fx_r_type != BFD_RELOC_386_PLT32 \
- && (FIX)->fx_r_type != BFD_RELOC_386_GOT32 \
- && (FIX)->fx_r_type != BFD_RELOC_386_GOTPC \
- && ((FIX)->fx_addsy == NULL \
- || (! S_IS_EXTERNAL ((FIX)->fx_addsy) \
- && ! S_IS_WEAK ((FIX)->fx_addsy) \
- && S_IS_DEFINED ((FIX)->fx_addsy) \
- && ! S_IS_COMMON ((FIX)->fx_addsy))))
-
-#define TARGET_ARCH bfd_arch_i386
-
-#ifdef OBJ_AOUT
+#ifdef TE_FreeBSD
+#define AOUT_TARGET_FORMAT "a.out-i386-freebsd"
+#endif
#ifdef TE_NetBSD
-#define TARGET_FORMAT "a.out-i386-netbsd"
+#define AOUT_TARGET_FORMAT "a.out-i386-netbsd"
#endif
#ifdef TE_386BSD
-#define TARGET_FORMAT "a.out-i386-bsd"
+#define AOUT_TARGET_FORMAT "a.out-i386-bsd"
#endif
#ifdef TE_LINUX
-#define TARGET_FORMAT "a.out-i386-linux"
+#define AOUT_TARGET_FORMAT "a.out-i386-linux"
#endif
#ifdef TE_Mach
-#define TARGET_FORMAT "a.out-mach3"
+#define AOUT_TARGET_FORMAT "a.out-mach3"
#endif
#ifdef TE_DYNIX
-#define TARGET_FORMAT "a.out-i386-dynix"
+#define AOUT_TARGET_FORMAT "a.out-i386-dynix"
#endif
-#ifndef TARGET_FORMAT
-#define TARGET_FORMAT "a.out-i386"
+#ifndef AOUT_TARGET_FORMAT
+#define AOUT_TARGET_FORMAT "a.out-i386"
#endif
-#endif /* OBJ_AOUT */
-#ifdef OBJ_ELF
-#define TARGET_FORMAT "elf32-i386"
+#ifdef TE_FreeBSD
+#define ELF_TARGET_FORMAT "elf32-i386-freebsd"
+#define ELF_TARGET_FORMAT64 "elf64-x86-64-freebsd"
+#elif defined (TE_VXWORKS)
+#define ELF_TARGET_FORMAT "elf32-i386-vxworks"
+#elif defined (TE_NACL)
+#define ELF_TARGET_FORMAT "elf32-i386-nacl"
+#define ELF_TARGET_FORMAT32 "elf32-x86-64-nacl"
+#define ELF_TARGET_FORMAT64 "elf64-x86-64-nacl"
+#elif defined TE_CLOUDABI
+#define ELF_TARGET_FORMAT64 "elf64-x86-64-cloudabi"
#endif
-#ifdef OBJ_MAYBE_ELF
-#ifdef OBJ_MAYBE_COFF
-extern const char *i386_target_format PARAMS ((void));
-#define TARGET_FORMAT i386_target_format ()
-#endif
+#ifdef TE_SOLARIS
+#define ELF_TARGET_FORMAT "elf32-i386-sol2"
+#define ELF_TARGET_FORMAT64 "elf64-x86-64-sol2"
#endif
-#else /* ! BFD_ASSEMBLER */
-
-/* COFF STUFF */
+#ifndef ELF_TARGET_FORMAT
+#define ELF_TARGET_FORMAT "elf32-i386"
+#endif
-#define COFF_MAGIC I386MAGIC
-#define BFD_ARCH bfd_arch_i386
-#define COFF_FLAGS F_AR32WR
-#define TC_COUNT_RELOC(x) ((x)->fx_addsy || (x)->fx_r_type==7)
-#define TC_FORCE_RELOCATION(x) ((x)->fx_r_type==7)
-#define TC_COFF_FIX2RTYPE(fixP) tc_coff_fix2rtype(fixP)
-extern short tc_coff_fix2rtype PARAMS ((struct fix *));
-#define TC_COFF_SIZEMACHDEP(frag) tc_coff_sizemachdep(frag)
-extern int tc_coff_sizemachdep PARAMS ((fragS *frag));
-#define SUB_SEGMENT_ALIGN(SEG) 2
-#define TC_RVA_RELOC 7
-/* Need this for PIC relocations */
-#define NEED_FX_R_TYPE
+#ifndef ELF_TARGET_FORMAT64
+#define ELF_TARGET_FORMAT64 "elf64-x86-64"
+#endif
+#ifndef ELF_TARGET_FORMAT32
+#define ELF_TARGET_FORMAT32 "elf32-x86-64"
+#endif
-#ifdef TE_386BSD
-/* The BSDI linker apparently rejects objects with a machine type of
- M_386 (100). */
-#define AOUT_MACHTYPE 0
-#else
-#define AOUT_MACHTYPE 100
+#ifndef ELF_TARGET_L1OM_FORMAT
+#define ELF_TARGET_L1OM_FORMAT "elf64-l1om"
#endif
-#undef REVERSE_SORT_RELOCS
+#ifndef ELF_TARGET_K1OM_FORMAT
+#define ELF_TARGET_K1OM_FORMAT "elf64-k1om"
+#endif
-#endif /* ! BFD_ASSEMBLER */
+#ifndef ELF_TARGET_IAMCU_FORMAT
+#define ELF_TARGET_IAMCU_FORMAT "elf32-iamcu"
+#endif
-#ifdef BFD_ASSEMBLER
-#define NO_RELOC BFD_RELOC_NONE
+#if ((defined (OBJ_MAYBE_COFF) && defined (OBJ_MAYBE_AOUT)) \
+ || defined (OBJ_ELF) || defined (OBJ_MAYBE_ELF) \
+ || defined (TE_PE) || defined (TE_PEP) || defined (OBJ_MACH_O))
+extern const char *i386_target_format (void);
+#define TARGET_FORMAT i386_target_format ()
#else
-#define NO_RELOC 0
-#endif
-#define tc_coff_symbol_emit_hook(a) ; /* not used */
-
-#ifndef BFD_ASSEMBLER
-#ifndef OBJ_AOUT
-#ifndef TE_PE
-#ifndef TE_GO32
-/* Local labels starts with .L */
-#define LOCAL_LABEL(name) (name[0] == '.' \
- && (name[1] == 'L' || name[1] == 'X' || name[1] == '.'))
-#endif
+#ifdef TE_GO32
+#define TARGET_FORMAT "coff-go32"
#endif
+#ifdef OBJ_AOUT
+#define TARGET_FORMAT AOUT_TARGET_FORMAT
#endif
#endif
+#define SUB_SEGMENT_ALIGN(SEG, FRCHAIN) 0
+
+/* '$' may be used as immediate prefix. */
+#undef LOCAL_LABELS_DOLLAR
+#define LOCAL_LABELS_DOLLAR 0
+#undef LOCAL_LABELS_FB
#define LOCAL_LABELS_FB 1
-#define tc_aout_pre_write_hook(x) {;} /* not used */
-#define tc_crawl_symbol_chain(a) {;} /* not used */
-#define tc_headers_hook(a) {;} /* not used */
-
-#define MAX_OPERANDS 3 /* max operands per insn */
-#define MAX_PREFIXES 5 /* max prefixes per opcode */
-#define MAX_IMMEDIATE_OPERANDS 2/* max immediates per insn */
-#define MAX_MEMORY_OPERANDS 2 /* max memory refs per insn (string ops) */
-
-/* we define the syntax here (modulo base,index,scale syntax) */
-#define REGISTER_PREFIX '%'
-#define IMMEDIATE_PREFIX '$'
-#define ABSOLUTE_PREFIX '*'
-#define PREFIX_SEPERATOR '/'
-
-#define TWO_BYTE_OPCODE_ESCAPE 0x0f
-#define NOP_OPCODE (char) 0x90
-
-/* register numbers */
-#define EBP_REG_NUM 5
-#define ESP_REG_NUM 4
-
-/* modrm_byte.regmem for twobyte escape */
-#define ESCAPE_TO_TWO_BYTE_ADDRESSING ESP_REG_NUM
-/* index_base_byte.index for no index register addressing */
-#define NO_INDEX_REGISTER ESP_REG_NUM
-/* index_base_byte.base for no base register addressing */
-#define NO_BASE_REGISTER EBP_REG_NUM
-
-/* these are the att as opcode suffixes, making movl --> mov, for example */
-#define DWORD_OPCODE_SUFFIX 'l'
-#define WORD_OPCODE_SUFFIX 'w'
-#define BYTE_OPCODE_SUFFIX 'b'
-
-/* modrm.mode = REGMEM_FIELD_HAS_REG when a register is in there */
-#define REGMEM_FIELD_HAS_REG 0x3/* always = 0x3 */
-#define REGMEM_FIELD_HAS_MEM (~REGMEM_FIELD_HAS_REG)
-
-#define END_OF_INSN '\0'
-
-/*
- When an operand is read in it is classified by its type. This type includes
- all the possible ways an operand can be used. Thus, '%eax' is both 'register
- # 0' and 'The Accumulator'. In our language this is expressed by OR'ing
- 'Reg32' (any 32 bit register) and 'Acc' (the accumulator).
- Operands are classified so that we can match given operand types with
- the opcode table in i386-opcode.h.
- */
-/* register */
-#define Reg8 0x1 /* 8 bit reg */
-#define Reg16 0x2 /* 16 bit reg */
-#define Reg32 0x4 /* 32 bit reg */
-/* immediate */
-#define Imm8 0x8 /* 8 bit immediate */
-#define Imm8S 0x10 /* 8 bit immediate sign extended */
-#define Imm16 0x20 /* 16 bit immediate */
-#define Imm32 0x40 /* 32 bit immediate */
-#define Imm1 0x80 /* 1 bit immediate */
-/* memory */
-#define BaseIndex 0x100
-/* Disp8,16,32 are used in different ways, depending on the
- instruction. For jumps, they specify the size of the PC relative
- displacement, for baseindex type instructions, they specify the
- size of the offset relative to the base register, and for memory
- offset instructions such as `mov 1234,%al' they specify the size of
- the offset relative to the segment base. */
-#define Disp8 0x200 /* 8 bit displacement */
-#define Disp16 0x400 /* 16 bit displacement */
-#define Disp32 0x800 /* 32 bit displacement */
-/* Mem8,16,32 are used to limit the allowed sizes of memory operands */
-#define Mem8 0x1000
-#define Mem16 0x2000
-#define Mem32 0x4000
-/* specials */
-#define InOutPortReg 0x10000 /* register to hold in/out port addr = dx */
-#define ShiftCount 0x20000 /* register to hold shift cound = cl */
-#define Control 0x40000 /* Control register */
-#define Debug 0x80000 /* Debug register */
-#define Test 0x100000 /* Test register */
-#define FloatReg 0x200000 /* Float register */
-#define FloatAcc 0x400000 /* Float stack top %st(0) */
-#define SReg2 0x800000 /* 2 bit segment register */
-#define SReg3 0x1000000 /* 3 bit segment register */
-#define Acc 0x2000000 /* Accumulator %al or %ax or %eax */
-#define JumpAbsolute 0x4000000
-#define Abs8 0x8000000
-#define Abs16 0x10000000
-#define Abs32 0x20000000
-#define RegMMX 0x40000000 /* MMX register */
-#define EsSeg 0x80000000 /* String insn operand with fixed es segment */
-
-#define Reg (Reg8|Reg16|Reg32) /* gen'l register */
-#define WordReg (Reg16|Reg32)
-#define Imm (Imm8|Imm8S|Imm16|Imm32) /* gen'l immediate */
-#define Disp (Disp8|Disp16|Disp32) /* General displacement */
-#define Mem (Mem8|Mem16|Mem32|Disp|BaseIndex) /* General memory */
-#define WordMem (Mem16|Mem32|Disp|BaseIndex)
-#define ByteMem (Mem8|Disp|BaseIndex)
-#define ImplicitRegister (InOutPortReg|ShiftCount|Acc|FloatAcc)
-#define Abs (Abs8|Abs16|Abs32)
-
-#define Byte (Reg8|Imm8|Imm8S)
-#define Word (Reg16|Imm16)
-#define DWord (Reg32|Imm32)
-
-#define SMALLEST_DISP_TYPE(num) \
- fits_in_signed_byte(num) ? (Disp8|Disp32|Abs8|Abs32) : (Disp32|Abs32)
-
-typedef struct
-{
- /* instruction name sans width suffix ("mov" for movl insns) */
- char *name;
-
- /* how many operands */
- unsigned int operands;
-
- /* base_opcode is the fundamental opcode byte with a optional prefix(es). */
- unsigned int base_opcode;
-
- /* extension_opcode is the 3 bit extension for group <n> insns.
- If this template has no extension opcode (the usual case) use None */
- unsigned char extension_opcode;
-#define None 0xff /* If no extension_opcode is possible. */
-
- /* the bits in opcode_modifier are used to generate the final opcode from
- the base_opcode. These bits also are used to detect alternate forms of
- the same instruction */
- unsigned int opcode_modifier;
-
- /* opcode_modifier bits: */
-#define W 0x1 /* set if operands can be words or dwords
- encoded the canonical way: MUST BE 0x1 */
-#define D 0x2 /* D = 0 if Reg --> Regmem;
- D = 1 if Regmem --> Reg: MUST BE 0x2 */
-#define Modrm 0x4
-#define ReverseRegRegmem 0x8
-#define ShortForm 0x10 /* register is in low 3 bits of opcode */
-#define ShortFormW 0x20 /* ShortForm and W bit is 0x8 */
-#define Seg2ShortForm 0x40 /* encoding of load segment reg insns */
-#define Seg3ShortForm 0x80 /* fs/gs segment register insns. */
-#define Jump 0x100 /* special case for jump insns. */
-#define JumpInterSegment 0x200 /* special case for intersegment leaps/calls */
-#define FloatD 0x400 /* direction for float insns: MUST BE 0x400 */
-#define JumpByte 0x800
-#define JumpDword 0x1000
-#define FWait 0x2000 /* instruction needs FWAIT */
-#define Data16 0x4000 /* needs data prefix if in 32-bit mode */
-#define Data32 0x8000 /* needs data prefix if in 16-bit mode */
-#define IsString 0x100000 /* quick test for string instructions */
-#define regKludge 0x200000 /* fake an extra reg operand for clr, imul */
-
-#define DW (D|W) /* shorthand */
-
- /* (opcode_modifier & COMES_IN_BOTH_DIRECTIONS) indicates that the
- source and destination operands can be reversed by setting either
- the D (for integer insns) or the FloatD (for floating insns) bit
- in base_opcode. */
-#define COMES_IN_BOTH_DIRECTIONS (D|FloatD)
-
- /* operand_types[i] describes the type of operand i. This is made
- by OR'ing together all of the possible type masks. (e.g.
- 'operand_types[i] = Reg|Imm' specifies that operand i can be
- either a register or an immediate operand */
- unsigned int operand_types[3];
-}
-template;
-
-/*
- 'templates' is for grouping together 'template' structures for opcodes
- of the same name. This is only used for storing the insns in the grand
- ole hash table of insns.
- The templates themselves start at START and range up to (but not including)
- END.
- */
-typedef struct
- {
- template *start;
- template *end;
- } templates;
-
-/* these are for register name --> number & type hash lookup */
-typedef struct
- {
- char *reg_name;
- unsigned int reg_type;
- unsigned int reg_num;
- }
+extern const char extra_symbol_chars[];
+#define tc_symbol_chars extra_symbol_chars
-reg_entry;
+extern const char *i386_comment_chars;
+#define tc_comment_chars i386_comment_chars
-typedef struct
- {
- char *seg_name;
- unsigned int seg_prefix;
- }
+/* The name of the global offset table generated by the compiler. Allow
+ this to be overridden if need be. */
+#ifndef GLOBAL_OFFSET_TABLE_NAME
+#define GLOBAL_OFFSET_TABLE_NAME "_GLOBAL_OFFSET_TABLE_"
+#endif
-seg_entry;
+#if (defined (OBJ_ELF) || defined (OBJ_MAYBE_ELF)) && !defined (LEX_AT)
+#define TC_PARSE_CONS_EXPRESSION(EXP, NBYTES) x86_cons (EXP, NBYTES)
+#endif
+extern bfd_reloc_code_real_type x86_cons (expressionS *, int);
-/* these are for prefix name --> prefix code hash lookup */
-typedef struct
- {
- char *prefix_name;
- unsigned char prefix_code;
- }
+#define TC_CONS_FIX_NEW(FRAG, OFF, LEN, EXP, RELOC) \
+ x86_cons_fix_new(FRAG, OFF, LEN, EXP, RELOC)
+extern void x86_cons_fix_new
+(fragS *, unsigned int, unsigned int, expressionS *, bfd_reloc_code_real_type);
-prefix_entry;
+#define TC_ADDRESS_BYTES x86_address_bytes
+extern int x86_address_bytes (void);
-/* 386 operand encoding bytes: see 386 book for details of this. */
-typedef struct
- {
- unsigned regmem:3; /* codes register or memory operand */
- unsigned reg:3; /* codes register operand (or extended opcode) */
- unsigned mode:2; /* how to interpret regmem & reg */
- }
+#define DIFF_EXPR_OK /* foo-. gets turned into PC relative relocs */
-modrm_byte;
+#define NO_RELOC BFD_RELOC_NONE
-/* 386 opcode byte to code indirect addressing. */
-typedef struct
- {
- unsigned base:3;
- unsigned index:3;
- unsigned scale:2;
- }
+void i386_validate_fix (struct fix *);
+#define TC_VALIDATE_FIX(FIX,SEGTYPE,SKIP) i386_validate_fix(FIX)
-base_index_byte;
+#define tc_fix_adjustable(X) tc_i386_fix_adjustable(X)
+extern int tc_i386_fix_adjustable (struct fix *);
-/* The name of the global offset table generated by the compiler. Allow
- this to be overridden if need be. */
-#ifndef GLOBAL_OFFSET_TABLE_NAME
-#define GLOBAL_OFFSET_TABLE_NAME "_GLOBAL_OFFSET_TABLE_"
-#endif
+/* Values passed to md_apply_fix don't include the symbol value. */
+#define MD_APPLY_SYM_VALUE(FIX) 0
-#ifdef BFD_ASSEMBLER
-void i386_validate_fix PARAMS ((struct fix *));
-#define TC_VALIDATE_FIX(FIXP,SEGTYPE,SKIP) i386_validate_fix(FIXP)
+/* ELF wants external syms kept, as does PE COFF. */
+#if defined (TE_PE) && defined (STRICT_PE_FORMAT)
+#define EXTERN_FORCE_RELOC \
+ (OUTPUT_FLAVOR == bfd_target_elf_flavour \
+ || OUTPUT_FLAVOR == bfd_target_coff_flavour)
+#else
+#define EXTERN_FORCE_RELOC \
+ (OUTPUT_FLAVOR == bfd_target_elf_flavour)
#endif
-#endif /* TC_I386 */
+/* This expression evaluates to true if the relocation is for a local
+ object for which we still want to do the relocation at runtime.
+ False if we are willing to perform this relocation while building
+ the .o file. GOTOFF and GOT32 do not need to be checked here because
+ they are not pcrel. .*/
-#define md_operand(x)
+#define TC_FORCE_RELOCATION_LOCAL(FIX) \
+ (GENERIC_FORCE_RELOCATION_LOCAL (FIX) \
+ || (FIX)->fx_r_type == BFD_RELOC_386_PLT32 \
+ || (FIX)->fx_r_type == BFD_RELOC_386_GOTPC \
+ || (FIX)->fx_r_type == BFD_RELOC_X86_64_GOTPCREL \
+ || (FIX)->fx_r_type == BFD_RELOC_X86_64_GOTPCRELX \
+ || (FIX)->fx_r_type == BFD_RELOC_X86_64_REX_GOTPCRELX)
-extern const struct relax_type md_relax_table[];
-#define TC_GENERIC_RELAX_TABLE md_relax_table
+extern int i386_parse_name (char *, expressionS *, char *);
+#define md_parse_name(s, e, m, c) i386_parse_name (s, e, c)
+extern operatorT i386_operator (const char *name, unsigned int operands, char *);
+#define md_operator i386_operator
-extern int flag_16bit_code;
+extern int i386_need_index_operator (void);
+#define md_need_index_operator i386_need_index_operator
-#ifdef BFD_ASSEMBLER
-#define md_maybe_text() \
- ((bfd_get_section_flags (stdoutput, now_seg) & SEC_CODE) != 0)
-#else
-#define md_maybe_text() \
- (now_seg != data_section && now_seg != bss_section)
-#endif
+#define md_register_arithmetic 0
+
+extern const struct relax_type md_relax_table[];
+#define TC_GENERIC_RELAX_TABLE md_relax_table
+
+extern int optimize_align_code;
#define md_do_align(n, fill, len, max, around) \
-if ((n) && !need_pass_2 \
- && (!(fill) || ((char)*(fill) == (char)0x90 && (len) == 1)) \
- && md_maybe_text ()) \
+if ((n) \
+ && !need_pass_2 \
+ && optimize_align_code \
+ && (!(fill) \
+ || ((char)*(fill) == (char)0x90 && (len) == 1)) \
+ && subseg_text_p (now_seg)) \
{ \
- char *p; \
- p = frag_var (rs_align_code, 15, 1, (relax_substateT) max, \
- (symbolS *) 0, (offsetT) (n), (char *) 0); \
- *p = 0x90; \
+ frag_align_code ((n), (max)); \
goto around; \
}
-extern void i386_align_code PARAMS ((fragS *, int));
+#define MAX_MEM_FOR_RS_ALIGN_CODE (alignment ? ((1 << alignment) - 1) : 1)
+
+void i386_print_statistics (FILE *);
+#define tc_print_statistics i386_print_statistics
+
+extern unsigned int i386_frag_max_var (fragS *);
+#define md_frag_max_var i386_frag_max_var
+
+#define md_number_to_chars number_to_chars_littleendian
+
+enum processor_type
+{
+ PROCESSOR_UNKNOWN,
+ PROCESSOR_I386,
+ PROCESSOR_I486,
+ PROCESSOR_PENTIUM,
+ PROCESSOR_PENTIUMPRO,
+ PROCESSOR_PENTIUM4,
+ PROCESSOR_NOCONA,
+ PROCESSOR_CORE,
+ PROCESSOR_CORE2,
+ PROCESSOR_COREI7,
+ PROCESSOR_L1OM,
+ PROCESSOR_K1OM,
+ PROCESSOR_IAMCU,
+ PROCESSOR_K6,
+ PROCESSOR_ATHLON,
+ PROCESSOR_K8,
+ PROCESSOR_GENERIC32,
+ PROCESSOR_GENERIC64,
+ PROCESSOR_AMDFAM10,
+ PROCESSOR_BD,
+ PROCESSOR_ZNVER,
+ PROCESSOR_BT
+};
+
+extern enum processor_type cpu_arch_tune;
+extern enum processor_type cpu_arch_isa;
+extern i386_cpu_flags cpu_arch_isa_flags;
+
+struct i386_tc_frag_data
+{
+ enum processor_type isa;
+ i386_cpu_flags isa_flags;
+ enum processor_type tune;
+ unsigned int max_bytes;
+};
+
+/* We need to emit the right NOP pattern in .align frags. This is
+ done after the text-to-bits assembly pass, so we need to mark it with
+ the isa/tune settings at the time the .align was assembled. */
+#define TC_FRAG_TYPE struct i386_tc_frag_data
+
+#define TC_FRAG_INIT(FRAGP, MAX_BYTES) \
+ do \
+ { \
+ (FRAGP)->tc_frag_data.isa = cpu_arch_isa; \
+ (FRAGP)->tc_frag_data.isa_flags = cpu_arch_isa_flags; \
+ (FRAGP)->tc_frag_data.tune = cpu_arch_tune; \
+ (FRAGP)->tc_frag_data.max_bytes = (MAX_BYTES); \
+ } \
+ while (0)
+
+#define WORKING_DOT_WORD 1
+
+/* How to generate NOPs for .nop direct directive. */
+extern void i386_generate_nops (fragS *, char *, offsetT, int);
+#define md_generate_nops(frag, where, amount, control) \
+ i386_generate_nops ((frag), (where), (amount), (control))
#define HANDLE_ALIGN(fragP) \
if (fragP->fr_type == rs_align_code) \
- i386_align_code (fragP, (fragP->fr_next->fr_address \
- - fragP->fr_address \
- - fragP->fr_fix));
+ { \
+ offsetT __count = (fragP->fr_next->fr_address \
+ - fragP->fr_address \
+ - fragP->fr_fix); \
+ if (__count > 0 \
+ && (unsigned int) __count <= fragP->tc_frag_data.max_bytes) \
+ md_generate_nops (fragP, fragP->fr_literal + fragP->fr_fix, \
+ __count, 0); \
+ }
-/* call md_apply_fix3 with segment instead of md_apply_fix */
-#define MD_APPLY_FIX3
+/* We want .cfi_* pseudo-ops for generating unwind info. */
+#define TARGET_USE_CFIPOP 1
-void i386_print_statistics PARAMS ((FILE *));
-#define tc_print_statistics i386_print_statistics
+extern unsigned int x86_dwarf2_return_column;
+#define DWARF2_DEFAULT_RETURN_COLUMN x86_dwarf2_return_column
-#define md_number_to_chars number_to_chars_littleendian
+extern int x86_cie_data_alignment;
+#define DWARF2_CIE_DATA_ALIGNMENT x86_cie_data_alignment
+
+extern int x86_dwarf2_addr_size (void);
+#define DWARF2_ADDR_SIZE(bfd) x86_dwarf2_addr_size ()
+
+#define tc_parse_to_dw2regnum tc_x86_parse_to_dw2regnum
+extern void tc_x86_parse_to_dw2regnum (expressionS *);
+
+#define tc_cfi_frame_initial_instructions tc_x86_frame_initial_instructions
+extern void tc_x86_frame_initial_instructions (void);
+
+#define md_elf_section_type(str,len) i386_elf_section_type (str, len)
+extern int i386_elf_section_type (const char *, size_t);
-#ifdef SCO_ELF
-#define tc_init_after_args() sco_id ()
-extern void sco_id PARAMS ((void));
+#ifdef TE_SOLARIS
+#define md_fix_up_eh_frame(sec) i386_solaris_fix_up_eh_frame (sec)
+extern void i386_solaris_fix_up_eh_frame (segT);
#endif
-#define DIFF_EXPR_OK /* foo-. gets turned into PC relative relocs */
+/* Support for SHF_X86_64_LARGE */
+extern bfd_vma x86_64_section_word (char *, size_t);
+extern bfd_vma x86_64_section_letter (int, const char **);
+#define md_elf_section_letter(LETTER, PTR_MSG) x86_64_section_letter (LETTER, PTR_MSG)
+#define md_elf_section_word(STR, LEN) x86_64_section_word (STR, LEN)
+
+#if defined (OBJ_ELF) || defined (OBJ_MAYBE_ELF)
+extern void x86_cleanup (void);
+#define md_cleanup() x86_cleanup ()
+#endif
+
+#ifdef TE_PE
+
+#define O_secrel O_md1
-/* end of tc-i386.h */
+#define TC_DWARF2_EMIT_OFFSET tc_pe_dwarf2_emit_offset
+void tc_pe_dwarf2_emit_offset (symbolS *, unsigned int);
+
+#endif /* TE_PE */
+
+/* X_add_symbol:X_op_symbol (Intel mode only) */
+#define O_full_ptr O_md2
+
+#ifdef OBJ_MACH_O
+
+#define TC_FORCE_RELOCATION(FIX) (obj_mach_o_force_reloc (FIX))
+
+#define TC_FORCE_RELOCATION_SUB_SAME(FIX,SEG) \
+ (obj_mach_o_force_reloc_sub_same (FIX, SEG))
+
+#define TC_FORCE_RELOCATION_SUB_LOCAL(FIX,SEG) \
+ (obj_mach_o_force_reloc_sub_local (FIX, SEG))
+
+#define TC_VALIDATE_FIX_SUB(FIX, SEG) 1
+
+#endif /* OBJ_MACH_O */
+
+#endif /* TC_I386 */
projects / deliverable / binutils-gdb.git / blobdiff