/* tc-i960.c - All the i80960-specific stuff
- Copyright 1989, 1990, 1991, 1992, 1993, 1994, 1995, 1996, 1997, 1998,
- 1999, 2000, 2001, 2002, 2003, 2005, 2006, 2007
- Free Software Foundation, Inc.
+ Copyright (C) 1989-2016 Free Software Foundation, Inc.
This file is part of GAS.
#include "as.h"
#include "safe-ctype.h"
-#include "obstack.h"
#include "opcode/i960.h"
operands. */
static const struct
{
- char *reg_name;
+ const char *reg_name;
int reg_num;
}
regnames[] =
'abase' (indirect addressing) registers. */
static const struct
{
- char *areg_name;
+ const char *areg_name;
int areg_num;
}
aregs[] =
static void
get_cdisp (char *dispP, /* Displacement as specified in source instruction. */
- char *ifmtP, /* "COBR" or "CTRL" (for use in error message). */
+ const char *ifmtP, /* "COBR" or "CTRL" (for use in error message). */
long instr, /* Instruction needing the displacement. */
int numbits, /* # bits of displacement (13 for COBR, 24 for CTRL). */
int var_frag,/* 1 if varying length code fragment should be emitted;
0 if an address fix should be emitted. */
- int callj) /* 1 if callj relocation should be done; else 0. */
+ int callj) /* 1 if callj relocation should be done; else 0. */
{
expressionS e; /* Parsed expression. */
fixS *fixP; /* Structure describing needed address fix. */
}
/* get_ispec: parse a memory operand for an index specification
-
+
Here, an "index specification" is taken to be anything surrounded
by square brackets and NOT followed by anything else.
static char *
get_ispec (char *textP) /* Pointer to memory operand from source instruction, no white space. */
-
+
{
/* Points to start of index specification. */
char *start;
char opdesc; /* Operand descriptor byte. */
memS instr; /* Description of binary to be output. */
char *outP; /* Where the binary was output to. */
- expressionS expr; /* Parsed expression. */
+ expressionS exp; /* Parsed expression. */
/* ->description of deferred address fixup. */
fixS *fixP;
/* Parse the displacement; this must be done before emitting the
opcode, in case it is an expression using `.'. */
- parse_expr (instr.e, &expr);
+ parse_expr (instr.e, &exp);
/* Output opcode. */
outP = emit (instr.opcode);
return;
/* Process the displacement. */
- switch (expr.X_op)
+ switch (exp.X_op)
{
case O_illegal:
as_bad (_("expression syntax error"));
case O_constant:
if (instr.disp == 32)
- (void) emit (offs (expr)); /* Output displacement. */
+ (void) emit (offs (exp)); /* Output displacement. */
else
{
/* 12-bit displacement. */
- if (offs (expr) & ~0xfff)
+ if (offs (exp) & ~0xfff)
{
/* Won't fit in 12 bits: convert already-output
instruction to MEMB format, output
displacement. */
mema_to_memb (outP);
- (void) emit (offs (expr));
+ (void) emit (offs (exp));
}
else
{
/* WILL fit in 12 bits: OR into opcode and
overwrite the binary we already put out. */
- instr.opcode |= offs (expr);
+ instr.opcode |= offs (exp);
md_number_to_chars (outP, instr.opcode, 4);
}
}
outP = emit ((long) 0);
fixP = fix_new_exp (frag_now,
outP - frag_now->fr_literal,
- 4, & expr, 0, NO_RELOC);
+ 4, &exp, 0, NO_RELOC);
/* Steve's linker relaxing hack. Mark this 32-bit relocation as
being in the instruction stream, specifically as part of a callx
instruction. */
ldconst 64,<reg> -> shlo 8,3,<reg>
ldconst -1,<reg> -> subo 1,0,<reg>
ldconst -31,<reg> -> subo 31,0,<reg>
-
+
Anything else becomes:
lda xxx,<reg>. */
n = offs (e);
break;
case REG:
if (branch_predict)
- as_warn (bp_error_msg);
+ as_warn ("%s", bp_error_msg);
reg_fmt (args, oP);
break;
case MEM1:
if (args[0][0] == 'c' && args[0][1] == 'a')
{
if (branch_predict)
- as_warn (bp_error_msg);
+ as_warn ("%s", bp_error_msg);
mem_fmt (args, oP, 1);
break;
}
case MEM12:
case MEM16:
if (branch_predict)
- as_warn (bp_error_msg);
+ as_warn ("%s", bp_error_msg);
mem_fmt (args, oP, 0);
break;
case CALLJ:
if (branch_predict)
- as_warn (bp_error_msg);
+ as_warn ("%s", bp_error_msg);
/* Output opcode & set up "fixup" (relocation); flag
relocation as 'callj' type. */
know (oP->num_ops == 1);
{
/* Put bit field into instruction and write back in target
* byte order. */
- val &= ~(-1 << (int) numbits); /* Clear unused sign bits. */
+ val &= ~(-(1 << (int) numbits)); /* Clear unused sign bits. */
instr |= val;
md_number_to_chars (instrP, instr, 4);
}
struct tabentry
{
- char *flag;
+ const char *flag;
int arch;
};
static const struct tabentry arch_tab[] =
char buf[20];
/* Where the binary was output to. */
char *p;
- /* Pointer to description of deferred address fixup. */
- fixS *fixP;
if (!instrument_branches)
return;
{
sprintf (buf, "%s%d", BR_LABEL_BASE, i);
p = emit (0);
- fixP = fix_new (frag_now,
- p - frag_now->fr_literal,
- 4, symbol_find (buf), 0, 0, NO_RELOC);
+ fix_new (frag_now,
+ p - frag_now->fr_literal,
+ 4, symbol_find (buf), 0, 0, NO_RELOC);
}
}
passed fixup structure. */
int
-reloc_callj (fixS *fixP) /* Relocation that can be done at assembly time. */
+reloc_callj (fixS *fixP) /* Relocation that can be done at assembly time. */
{
/* Points to the binary for the instruction being relocated. */
char *where;
char *name;
char c;
- name = input_line_pointer;
- c = get_symbol_end ();
+ c = get_symbol_name (&name);
if (strcasecmp (name, "little") == 0)
;
else if (strcasecmp (name, "big") == 0)
else
as_warn (_("ignoring unrecognized .endian type `%s'"), name);
- *input_line_pointer = c;
+ (void) restore_line_pointer (c);
demand_empty_rest_of_line ();
}
int align;
align = bfd_get_section_alignment (stdoutput, seg);
- return (addr + (1 << align) - 1) & (-1 << align);
+ return (addr + (1 << align) - 1) & -(1 << align);
}
extern int coff_flags;
if (reloc->howto == NULL)
{
as_bad_where (fixP->fx_file, fixP->fx_line,
- "internal error: can't export reloc type %d (`%s')",
+ _("internal error: can't export reloc type %d (`%s')"),
fixP->fx_r_type,
bfd_get_reloc_code_name (fixP->fx_r_type));
return NULL;