/* tc-m32r.c -- Assembler for the Renesas M32R.
- Copyright 1996, 1997, 1998, 1999, 2000, 2001, 2002, 2003, 2004, 2005,
- 2006, 2007 Free Software Foundation, Inc.
+ Copyright (C) 1996-2015 Free Software Foundation, Inc.
This file is part of GAS, the GNU Assembler.
fprintf (stream, _("\
-ignore-parallel-conflicts do not check parallel instructions\n"));
fprintf (stream, _("\
- fo contraint violations\n"));
+ for constraint violations\n"));
fprintf (stream, _("\
-no-ignore-parallel-conflicts check parallel instructions for\n"));
fprintf (stream, _("\
- contraint violations\n"));
+ constraint violations\n"));
fprintf (stream, _("\
-Ip synonym for -ignore-parallel-conflicts\n"));
fprintf (stream, _("\
char delim;
char *end_name;
symbolS *symbolP;
- sym_linkS *link;
+ sym_linkS *lnk;
name = input_line_pointer;
delim = get_symbol_end ();
else
{
- link = (sym_linkS *) xmalloc (sizeof (sym_linkS));
- link->symbol = symbolP;
- link->next = debug_sym_link;
- debug_sym_link = link;
+ lnk = (sym_linkS *) xmalloc (sizeof (sym_linkS));
+ lnk->symbol = symbolP;
+ lnk->next = debug_sym_link;
+ debug_sym_link = lnk;
symbol_get_obj (symbolP)->local = 1;
}
/* The sbss section is for local .scomm symbols. */
sbss_section = subseg_new (".sbss", 0);
+ seg_info (sbss_section)->bss = 1;
/* This is copied from perform_an_assembly_pass. */
applicable = bfd_applicable_section_flags (stdoutput);
/* We must construct a fake section similar to bfd_com_section
but with the name .scommon. */
- scom_section = bfd_com_section;
+ scom_section = *bfd_com_section_ptr;
scom_section.name = ".scommon";
scom_section.output_section = & scom_section;
scom_section.symbol = & scom_symbol;
scom_section.symbol_ptr_ptr = & scom_section.symbol;
- scom_symbol = * bfd_com_section.symbol;
+ scom_symbol = * bfd_com_section_ptr->symbol;
scom_symbol.name = ".scommon";
scom_symbol.section = & scom_section;
if (! (first.insn = m32r_cgen_assemble_insn
(gas_cgen_cpu_desc, str1, & first.fields, first.buffer, & errmsg)))
{
- as_bad (errmsg);
+ as_bad ("%s", errmsg);
return;
}
if (! (second.insn = m32r_cgen_assemble_insn
(gas_cgen_cpu_desc, str1, & second.fields, second.buffer, & errmsg)))
{
- as_bad (errmsg);
+ as_bad ("%s", errmsg);
return;
}
if (!insn.insn)
{
- as_bad (errmsg);
+ as_bad ("%s", errmsg);
return;
}
{
fixS *fixP;
- assert (fragP->fr_subtype != 1);
- assert (fragP->fr_cgen.insn != 0);
+ gas_assert (fragP->fr_subtype != 1);
+ gas_assert (fragP->fr_cgen.insn != 0);
fixP = gas_cgen_record_fixup (fragP,
/* Offset of branch insn in frag. */
{
struct m32r_hi_fixup *hi_fixup;
- assert (reloc_type == BFD_RELOC_M32R_HI16_SLO
+ gas_assert (reloc_type == BFD_RELOC_M32R_HI16_SLO
|| reloc_type == BFD_RELOC_M32R_HI16_ULO);
hi_fixup = xmalloc (sizeof (* hi_fixup));
segment_info_type *seginfo;
int pass;
- assert (FX_OPINFO_R_TYPE (l->fixp) == BFD_RELOC_M32R_HI16_SLO
+ gas_assert (FX_OPINFO_R_TYPE (l->fixp) == BFD_RELOC_M32R_HI16_SLO
|| FX_OPINFO_R_TYPE (l->fixp) == BFD_RELOC_M32R_HI16_ULO);
/* Check quickly whether the next fixup happens to be a matching low. */
for (pf = &seginfo->fix_root;
*pf != l->fixp;
pf = & (*pf)->fx_next)
- assert (*pf != NULL);
+ gas_assert (*pf != NULL);
*pf = l->fixp->fx_next;