-/* tc-m32r.c -- Assembler for the Mitsubishi M32R.
- Copyright 1996, 1997, 1998, 1999, 2000, 2001
+/* tc-m32r.c -- Assembler for the Renesas M32R.
+ Copyright 1996, 1997, 1998, 1999, 2000, 2001, 2002, 2003
Free Software Foundation, Inc.
This file is part of GAS, the GNU Assembler.
static struct m32r_hi_fixup *m32r_hi_fixup_list;
\f
+static void allow_m32rx PARAMS ((int));
+
static void
allow_m32rx (on)
int on;
int
md_parse_option (c, arg)
int c;
- char *arg;
+ char *arg ATTRIBUTE_UNUSED;
{
switch (c)
{
static void
fill_insn (ignore)
- int ignore;
+ int ignore ATTRIBUTE_UNUSED;
{
frag_align_code (2, 0);
prev_insn.insn = NULL;
static void
debug_sym (ignore)
- int ignore;
+ int ignore ATTRIBUTE_UNUSED;
{
register char *name;
register char delim;
of instruction 'b'. If 'check_outputs' is true then b's outputs are
checked, otherwise its inputs are examined. */
+static int first_writes_to_seconds_operands
+ PARAMS ((m32r_insn *, m32r_insn *, const int));
+
static int
first_writes_to_seconds_operands (a, b, check_outputs)
m32r_insn *a;
/* Returns true if the insn can (potentially) alter the program counter. */
+static int writes_to_pc PARAMS ((m32r_insn *));
+
static int
writes_to_pc (a)
m32r_insn *a;
/* Return NULL if the two 16 bit insns can be executed in parallel.
Otherwise return a pointer to an error message explaining why not. */
+static const char *can_make_parallel PARAMS ((m32r_insn *, m32r_insn *));
+
static const char *
can_make_parallel (a, b)
m32r_insn *a;
|| CGEN_FIELDS_BITSIZE (&b->fields) != 16)
abort ();
- if (first_writes_to_seconds_operands (a, b, true))
+ if (first_writes_to_seconds_operands (a, b, TRUE))
return _("Instructions write to the same destination register.");
a_pipe = CGEN_INSN_ATTR_VALUE (a->insn, CGEN_INSN_PIPE);
/* Force the top bit of the second 16-bit insn to be set. */
+static void make_parallel PARAMS ((CGEN_INSN_BYTES_PTR));
+
static void
make_parallel (buffer)
CGEN_INSN_BYTES_PTR buffer;
/* Same as make_parallel except buffer contains the bytes in target order. */
+static void target_make_parallel PARAMS ((char *));
+
static void
target_make_parallel (buffer)
char *buffer;
/* Assemble two instructions with an explicit parallel operation (||) or
sequential operation (->). */
+static void assemble_two_insns PARAMS ((char *, char *, int));
+
static void
assemble_two_insns (str, str2, parallel_p)
char *str;
if (parallel_p && warn_explicit_parallel_conflicts)
{
- if (first_writes_to_seconds_operands (&first, &second, false))
+ if (first_writes_to_seconds_operands (&first, &second, FALSE))
/* xgettext:c-format */
as_warn (_("%s: output of 1st instruction is the same as an input to 2nd instruction - is this intentional ?"), str2);
- if (first_writes_to_seconds_operands (&second, &first, false))
+ if (first_writes_to_seconds_operands (&second, &first, FALSE))
/* xgettext:c-format */
as_warn (_("%s: output of 2nd instruction is the same as an input to 1st instruction - is this intentional ?"), str2);
}
else
{
int on_32bit_boundary_p;
- int swap = false;
+ int swap = FALSE;
if (CGEN_INSN_BITSIZE (insn.insn) != 16)
abort ();
&& optimize
&& CGEN_INSN_ATTR_VALUE (insn.orig_insn, CGEN_INSN_RELAXABLE) == 0
&& ! writes_to_pc (&prev_insn)
- && ! first_writes_to_seconds_operands (&prev_insn, &insn, false))
+ && ! first_writes_to_seconds_operands (&prev_insn, &insn, FALSE))
{
if (can_make_parallel (&prev_insn, &insn) == NULL)
make_parallel (insn.buffer);
else if (can_make_parallel (&insn, &prev_insn) == NULL)
- swap = true;
+ swap = TRUE;
}
expand_debug_syms (insn.debug_sym_link, 1);
symbolS *
md_undefined_symbol (name)
- char *name;
+ char *name ATTRIBUTE_UNUSED;
{
return 0;
}
static void
m32r_scomm (ignore)
- int ignore;
+ int ignore ATTRIBUTE_UNUSED;
{
register char *name;
register char c;
if (S_GET_SEGMENT (fragP->fr_symbol) != segment)
{
+#if 0
int old_fr_fix = fragP->fr_fix;
+#endif
/* The symbol is undefined in this segment.
Change the relaxation subtype to the max allowable and leave
if ((strcmp (CGEN_INSN_MNEMONIC (insn),
CGEN_INSN_MNEMONIC (fragP->fr_cgen.insn))
== 0)
- && CGEN_INSN_ATTR_VALUE (insn, CGEN_INSN_RELAX))
+ && CGEN_INSN_ATTR_VALUE (insn, CGEN_INSN_RELAXED))
break;
}
if (i == 4)
void
md_convert_frag (abfd, sec, fragP)
- bfd *abfd;
+ bfd *abfd ATTRIBUTE_UNUSED;
segT sec;
fragS *fragP;
{
bfd_reloc_code_real_type
md_cgen_lookup_reloc (insn, operand, fixP)
- const CGEN_INSN *insn;
+ const CGEN_INSN *insn ATTRIBUTE_UNUSED;
const CGEN_OPERAND *operand;
fixS *fixP;
{
/* Record a HI16 reloc for later matching with its LO16 cousin. */
+static void m32r_record_hi16 PARAMS ((int, fixS *, segT));
+
static void
m32r_record_hi16 (reloc_type, fixP, seg)
int reloc_type;
fixS *fixP;
- segT seg;
+ segT seg ATTRIBUTE_UNUSED;
{
struct m32r_hi_fixup *hi_fixup;
m32r_force_relocation (fix)
fixS *fix;
{
- if (fix->fx_r_type == BFD_RELOC_VTABLE_INHERIT
- || fix->fx_r_type == BFD_RELOC_VTABLE_ENTRY)
+ if (generic_force_reloc (fix))
return 1;
if (! m32r_relax)
int prec;
LITTLENUM_TYPE words[MAX_LITTLENUMS];
char *t;
- char *atof_ieee ();
switch (type)
{
/* Return true if can adjust the reloc to be relative to its section
(such as .data) instead of relative to some symbol. */
-boolean
+bfd_boolean
m32r_fix_adjustable (fixP)
fixS *fixP;
{
-
bfd_reloc_code_real_type reloc_type;
if ((int) fixP->fx_r_type >= (int) BFD_RELOC_UNUSED)
else
reloc_type = fixP->fx_r_type;
- if (fixP->fx_addsy == NULL)
- return 1;
-
- /* Prevent all adjustments to global symbols. */
- if (S_IS_EXTERN (fixP->fx_addsy))
- return 0;
- if (S_IS_WEAK (fixP->fx_addsy))
- return 0;
-
/* We need the symbol name for the VTABLE entries. */
if (reloc_type == BFD_RELOC_VTABLE_INHERIT
|| reloc_type == BFD_RELOC_VTABLE_ENTRY)