/* tc-metag.c -- Assembler for the Imagination Technologies Meta.
- Copyright (C) 2013-2014 Free Software Foundation, Inc.
+ Copyright (C) 2013-2017 Free Software Foundation, Inc.
Contributed by Imagination Technologies Ltd.
This file is part of GAS, the GNU Assembler.
#include "symcat.h"
#include "safe-ctype.h"
#include "hashtab.h"
-#include "libbfd.h"
#include <stdio.h>
return NULL;
}
-/* Parse the immediate portion of an addrssing mode. */
+/* Parse the immediate portion of an addressing mode. */
static const char *
parse_imm_addr (const char *line, metag_addr *addr)
{
as_bad (_("PC, CT, TR and TT are treated as if they are a single unit but operands must be in different units"));
return NULL;
}
+ break;
default:
/* Registers must be in different units. */
insn->bits |= (1 << 7);
break;
}
+ /* Fall through. */
default:
as_bad (_("invalid quickrot register specified"));
return NULL;
/* We don't entirely strip the register name because we might
actually want to match whole string in the register table,
e.g. "D0AW.1++" not just "D0AW.1". The string length of the table
- entry limits our comaprison to a reasonable bound anyway. */
+ entry limits our comparison to a reasonable bound anyway. */
while (is_register_char (*l) || *l == PLUS)
{
name[len] = *l;
return l;
}
-/* Parse a DSP Template definiton memory reference, e.g
+/* Parse a DSP Template definition memory reference, e.g
[A0.7+A0.5++]. DSPRAM is set to true by this function if this
template definition is a DSP RAM template definition. */
static const char *
return l;
}
-/* Sets LOAD to TRUE if this is a Template load definiton (otherwise
+/* Sets LOAD to TRUE if this is a Template load definition (otherwise
it's a store). Fills out ADDR, TEMPLATE_REG and ADDR_UNIT. */
static const char *
parse_template_regs (const char *line, bfd_boolean *load,
insn->bits |= (1 << 2);
}
- /* Check for template definitons. */
+ /* Check for template definitions. */
if (IS_TEMPLATE_DEF (insn))
{
l = interpret_template_regs(l, insn, regs, regs_shift, &load,
if ((template->meta_opcode >> 26) & 0x1)
ls_shift = INVALID_SHIFT;
- /* The Condition Is Always (CA) bit must be set if we're targetting a
+ /* The Condition Is Always (CA) bit must be set if we're targeting a
Ux.r register as the destination. This means that we can't have
any other condition bits set. */
if (!is_same_data_unit (regs[1]->unit, regs[0]->unit))
struct metag_core_option
{
- char *name;
+ const char *name;
unsigned int value;
};
/* Parse a CPU command line option. */
static int
-metag_parse_cpu (char * str)
+metag_parse_cpu (const char * str)
{
const struct metag_core_option * opt;
int optlen;
/* Parse an FPU command line option. */
static int
-metag_parse_fpu (char * str)
+metag_parse_fpu (const char * str)
{
const struct metag_core_option * opt;
int optlen;
/* Parse a DSP command line option. */
static int
-metag_parse_dsp (char * str)
+metag_parse_dsp (const char * str)
{
const struct metag_core_option * opt;
int optlen;
struct metag_long_option
{
- char * option; /* Substring to match. */
- char * help; /* Help information. */
- int (* func) (char * subopt); /* Function to decode sub-option. */
- char * deprecated; /* If non-null, print this message. */
+ const char * option; /* Substring to match. */
+ const char * help; /* Help information. */
+ int (* func) (const char * subopt); /* Function to decode sub-option. */
+ const char * deprecated; /* If non-null, print this message. */
};
struct metag_long_option metag_long_opts[] =
};
int
-md_parse_option (int c, char * arg)
+md_parse_option (int c, const char * arg)
{
struct metag_long_option *lopt;
insn_templates **slot = NULL;
insn_templates *new_entry;
- new_entry = xmalloc (sizeof (insn_templates));
+ new_entry = XNEW (insn_templates);
new_entry->template = template;
new_entry->next = NULL;
/* Make sure there are no hash table collisions, which would
require chaining entries. */
- BFD_ASSERT (*slot == NULL);
+ gas_assert (*slot == NULL);
*slot = reg;
}
/* Make sure there are no hash table collisions, which would
require chaining entries. */
- BFD_ASSERT (*slot == NULL);
+ gas_assert (*slot == NULL);
*slot = reg;
}
}
scond, INSERT);
/* Make sure there are no hash table collisions, which would
require chaining entries. */
- BFD_ASSERT (*slot == NULL);
+ gas_assert (*slot == NULL);
*slot = scond;
}
}
/* Equal to MAX_PRECISION in atof-ieee.c */
#define MAX_LITTLENUMS 6
-char *
+const char *
md_atof (int type, char * litP, int * sizeP)
{
int i;
void
metag_handle_align (fragS * fragP)
{
- static char const noop[4] = { 0xfe, 0xff, 0xff, 0xa0 };
+ static unsigned char const noop[4] = { 0xfe, 0xff, 0xff, 0xa0 };
int bytes, fix;
char *p;
}
static char *
-metag_end_of_match (char * cont, char * what)
+metag_end_of_match (char * cont, const char * what)
{
int len = strlen (what);
then it is done here. */
arelent *
-tc_gen_reloc (seg, fixp)
- asection *seg ATTRIBUTE_UNUSED;
- fixS *fixp;
+tc_gen_reloc (asection *seg ATTRIBUTE_UNUSED, fixS *fixp)
{
arelent *reloc;
- reloc = (arelent *) xmalloc (sizeof (arelent));
- reloc->sym_ptr_ptr = (asymbol **) xmalloc (sizeof (asymbol *));
+ reloc = XNEW (arelent);
+ reloc->sym_ptr_ptr = XNEW (asymbol *);
*reloc->sym_ptr_ptr = symbol_get_bfdsym (fixp->fx_addsy);
reloc->address = fixp->fx_frag->fr_address + fixp->fx_where;
break;
case BFD_RELOC_64:
md_number_to_chars (buf, value, 8);
+ break;
case BFD_RELOC_METAG_RELBRANCH:
if (!value)