/* tc-microblaze.c -- Assemble code for Xilinx MicroBlaze
- Copyright 2009 Free Software Foundation.
+ Copyright 2009, 2010, 2012 Free Software Foundation.
This file is part of GAS, the GNU Assembler.
#define DEFINE_TABLE
#include "../opcodes/microblaze-opc.h"
#include "../opcodes/microblaze-opcm.h"
-#include <ctype.h>
+#include "safe-ctype.h"
#include <string.h>
#include <dwarf2dbg.h>
#include "aout/stab_gnu.h"
offsetT size;
symbolS *symbolP;
offsetT align;
- segT old_sec;
- int old_subsec;
char *pfrag;
int align2;
segT current_seg = now_seg;
}
/* Allocate_bss. */
- old_sec = now_seg;
- old_subsec = now_subseg;
if (align)
{
/* Convert to a power of 2 alignment. */
unsigned tmpreg = 0;
/* Strip leading whitespace. */
- while (isspace (* s))
+ while (ISSPACE (* s))
++ s;
if (strncasecmp (s, "rpc", 3) == 0)
/* MMU registers end. */
else if (strncasecmp (s, "rpvr", 4) == 0)
{
- if (isdigit (s[4]) && isdigit (s[5]))
+ if (ISDIGIT (s[4]) && ISDIGIT (s[5]))
{
tmpreg = (s[4]-'0')*10 + s[5] - '0';
s += 6;
}
- else if (isdigit (s[4]))
+ else if (ISDIGIT (s[4]))
{
tmpreg = s[4] - '0';
s += 5;
}
else if (strncasecmp (s, "rfsl", 4) == 0)
{
- if (isdigit (s[4]) && isdigit (s[5]))
+ if (ISDIGIT (s[4]) && ISDIGIT (s[5]))
{
tmpreg = (s[4] - '0') * 10 + s[5] - '0';
s += 6;
}
- else if (isdigit (s[4]))
+ else if (ISDIGIT (s[4]))
{
tmpreg = s[4] - '0';
s += 5;
else
as_bad (_("register expected, but saw '%.6s'"), s);
- if ((int)tmpreg >= MIN_REGNUM && tmpreg <= MAX_REGNUM)
+ if ((int) tmpreg >= MIN_REGNUM && tmpreg <= MAX_REGNUM)
*reg = tmpreg;
else
{
}
else
{
- if (tolower (s[0]) == 'r')
+ if (TOLOWER (s[0]) == 'r')
{
- if (isdigit (s[1]) && isdigit (s[2]))
+ if (ISDIGIT (s[1]) && ISDIGIT (s[2]))
{
tmpreg = (s[1] - '0') * 10 + s[2] - '0';
s += 3;
}
- else if (isdigit (s[1]))
+ else if (ISDIGIT (s[1]))
{
tmpreg = s[1] - '0';
s += 2;
parse_exp (char *s, expressionS *e)
{
char *save;
- char *new;
+ char *new_pointer;
/* Skip whitespace. */
- while (isspace (* s))
+ while (ISSPACE (* s))
++ s;
save = input_line_pointer;
if (e->X_op == O_absent)
as_fatal (_("missing operand"));
- new = input_line_pointer;
+ new_pointer = input_line_pointer;
input_line_pointer = save;
- return new;
+ return new_pointer;
}
/* Symbol modifiers (@GOT, @PLT, @GOTOFF). */
static char *
parse_imm (char * s, expressionS * e, int min, int max)
{
- char *new;
+ char *new_pointer;
char *atp;
/* Find the start of "@GOT" or "@PLT" suffix (if any) */
GOT_symbol = symbol_find_or_make (GOT_SYMBOL_NAME);
}
- new = parse_exp (s, e);
+ new_pointer = parse_exp (s, e);
if (e->X_op == O_absent)
; /* An error message has already been emitted. */
if (atp)
{
*atp = '@'; /* restore back (needed?) */
- if (new >= atp)
- new += (e->X_md == IMM_GOTOFF)?7:4;
+ if (new_pointer >= atp)
+ new_pointer += (e->X_md == IMM_GOTOFF)?7:4;
/* sizeof("@GOTOFF", "@GOT" or "@PLT") */
}
- return new;
+ return new_pointer;
}
static char *
check_got (int * got_type, int * got_len)
{
- char *new;
+ char *new_pointer;
char *atp;
char *past_got;
int first, second;
first = atp - input_line_pointer;
past_got = atp + *got_len + 1;
- for (new = past_got; !is_end_of_line[(unsigned char) *new++]; )
+ for (new_pointer = past_got; !is_end_of_line[(unsigned char) *new_pointer++];)
;
- second = new - past_got;
+ second = new_pointer - past_got;
tmpbuf = xmalloc (first + second + 2); /* One extra byte for ' ' and one for NUL. */
memcpy (tmpbuf, input_line_pointer, first);
tmpbuf[first] = ' '; /* @GOTOFF is replaced with a single space. */
unsigned reg2;
unsigned reg3;
unsigned isize;
- unsigned int imm, temp;
+ unsigned int immed, temp;
expressionS exp;
char name[20];
/* Drop leading whitespace. */
- while (isspace (* str))
+ while (ISSPACE (* str))
str ++;
/* Find the op code end. */
for (op_start = op_end = str;
- * op_end && nlen < 20 && !is_end_of_line [(int)*op_end] && *op_end != ' ';
+ *op_end && !is_end_of_line[(unsigned char) *op_end] && *op_end != ' ';
op_end++)
{
name[nlen] = op_start[nlen];
nlen++;
+ if (nlen == sizeof (name) - 1)
+ break;
}
name [nlen] = 0;
exp.X_add_symbol,
exp.X_add_number,
opc);
- imm = 0;
+ immed = 0;
}
else
{
output = frag_more (isize);
- imm = exp.X_add_number;
+ immed = exp.X_add_number;
}
if (streq (name, "lmi") || streq (name, "smi"))
inst = opcode->bit_sequence;
inst |= (reg1 << RD_LOW) & RD_MASK;
inst |= (reg2 << RA_LOW) & RA_MASK;
- inst |= (imm << IMM_LOW) & IMM_MASK;
+ inst |= (immed << IMM_LOW) & IMM_MASK;
for (i = 0; i < count - 1; i++)
{
output[2] = INST_BYTE2 (inst);
output[3] = INST_BYTE3 (inst);
output = frag_more (isize);
- imm = imm + 4;
+ immed = immed + 4;
reg1++;
inst = opcode->bit_sequence;
inst |= (reg1 << RD_LOW) & RD_MASK;
inst |= (reg2 << RA_LOW) & RA_MASK;
- inst |= (imm << IMM_LOW) & IMM_MASK;
+ inst |= (immed << IMM_LOW) & IMM_MASK;
}
}
else
{
- temp = imm & 0xFFFF8000;
+ temp = immed & 0xFFFF8000;
if ((temp != 0) && (temp != 0xFFFF8000))
{
/* Needs an immediate inst. */
}
inst1 = opcode1->bit_sequence;
- inst1 |= ((imm & 0xFFFF0000) >> 16) & IMM_MASK;
+ inst1 |= ((immed & 0xFFFF0000) >> 16) & IMM_MASK;
output[0] = INST_BYTE0 (inst1);
output[1] = INST_BYTE1 (inst1);
output[2] = INST_BYTE2 (inst1);
}
inst |= (reg1 << RD_LOW) & RD_MASK;
inst |= (reg2 << RA_LOW) & RA_MASK;
- inst |= (imm << IMM_LOW) & IMM_MASK;
+ inst |= (immed << IMM_LOW) & IMM_MASK;
}
break;
else
{
output = frag_more (isize);
- imm = exp.X_add_number;
+ immed = exp.X_add_number;
}
- if (imm != (imm % 32))
+ if (immed != (immed % 32))
{
as_warn (_("Shift value > 32. using <value %% 32>"));
- imm = imm % 32;
+ immed = immed % 32;
}
inst |= (reg1 << RD_LOW) & RD_MASK;
inst |= (reg2 << RA_LOW) & RA_MASK;
- inst |= (imm << IMM_LOW) & IMM5_MASK;
+ inst |= (immed << IMM_LOW) & IMM5_MASK;
break;
case INST_TYPE_R1_R2:
reg1 = 0;
}
if (strcmp (op_end, ""))
- op_end = parse_reg (op_end + 1, &imm); /* Get rfslN. */
+ op_end = parse_reg (op_end + 1, &immed); /* Get rfslN. */
else
{
as_fatal (_("Error in statement syntax"));
- imm = 0;
+ immed = 0;
}
/* Check for spl registers. */
as_fatal (_("Cannot use special register with this instruction"));
inst |= (reg1 << RD_LOW) & RD_MASK;
- inst |= (imm << IMM_LOW) & RFSL_MASK;
+ inst |= (immed << IMM_LOW) & RFSL_MASK;
output = frag_more (isize);
break;
else
{
output = frag_more (isize);
- imm = exp.X_add_number;
+ immed = exp.X_add_number;
}
inst |= (reg1 << RD_LOW) & RD_MASK;
- inst |= (imm << IMM_LOW) & IMM15_MASK;
+ inst |= (immed << IMM_LOW) & IMM15_MASK;
break;
case INST_TYPE_R1_RFSL:
reg1 = 0;
}
if (strcmp (op_end, ""))
- op_end = parse_reg (op_end + 1, &imm); /* Get rfslN. */
+ op_end = parse_reg (op_end + 1, &immed); /* Get rfslN. */
else
{
as_fatal (_("Error in statement syntax"));
- imm = 0;
+ immed = 0;
}
/* Check for spl registers. */
as_fatal (_("Cannot use special register with this instruction"));
inst |= (reg1 << RA_LOW) & RA_MASK;
- inst |= (imm << IMM_LOW) & RFSL_MASK;
+ inst |= (immed << IMM_LOW) & RFSL_MASK;
output = frag_more (isize);
break;
case INST_TYPE_RFSL:
if (strcmp (op_end, ""))
- op_end = parse_reg (op_end + 1, &imm); /* Get rfslN. */
+ op_end = parse_reg (op_end + 1, &immed); /* Get rfslN. */
else
{
as_fatal (_("Error in statement syntax"));
- imm = 0;
+ immed = 0;
}
/* Check for spl registers. */
if (check_spl_reg (®1))
as_fatal (_("Cannot use special register with this instruction"));
- inst |= (imm << IMM_LOW) & RFSL_MASK;
+ inst |= (immed << IMM_LOW) & RFSL_MASK;
output = frag_more (isize);
break;
}
if (reg2 == REG_MSR)
- imm = opcode->immval_mask | REG_MSR_MASK;
+ immed = opcode->immval_mask | REG_MSR_MASK;
else if (reg2 == REG_PC)
- imm = opcode->immval_mask | REG_PC_MASK;
+ immed = opcode->immval_mask | REG_PC_MASK;
else if (reg2 == REG_EAR)
- imm = opcode->immval_mask | REG_EAR_MASK;
+ immed = opcode->immval_mask | REG_EAR_MASK;
else if (reg2 == REG_ESR)
- imm = opcode->immval_mask | REG_ESR_MASK;
+ immed = opcode->immval_mask | REG_ESR_MASK;
else if (reg2 == REG_FSR)
- imm = opcode->immval_mask | REG_FSR_MASK;
+ immed = opcode->immval_mask | REG_FSR_MASK;
else if (reg2 == REG_BTR)
- imm = opcode->immval_mask | REG_BTR_MASK;
+ immed = opcode->immval_mask | REG_BTR_MASK;
else if (reg2 == REG_EDR)
- imm = opcode->immval_mask | REG_EDR_MASK;
+ immed = opcode->immval_mask | REG_EDR_MASK;
else if (reg2 == REG_PID)
- imm = opcode->immval_mask | REG_PID_MASK;
+ immed = opcode->immval_mask | REG_PID_MASK;
else if (reg2 == REG_ZPR)
- imm = opcode->immval_mask | REG_ZPR_MASK;
+ immed = opcode->immval_mask | REG_ZPR_MASK;
else if (reg2 == REG_TLBX)
- imm = opcode->immval_mask | REG_TLBX_MASK;
+ immed = opcode->immval_mask | REG_TLBX_MASK;
else if (reg2 == REG_TLBLO)
- imm = opcode->immval_mask | REG_TLBLO_MASK;
+ immed = opcode->immval_mask | REG_TLBLO_MASK;
else if (reg2 == REG_TLBHI)
- imm = opcode->immval_mask | REG_TLBHI_MASK;
+ immed = opcode->immval_mask | REG_TLBHI_MASK;
else if (reg2 >= (REG_PVR+MIN_PVR_REGNUM) && reg2 <= (REG_PVR+MAX_PVR_REGNUM))
- imm = opcode->immval_mask | REG_PVR_MASK | reg2;
+ immed = opcode->immval_mask | REG_PVR_MASK | reg2;
else
as_fatal (_("invalid value for special purpose register"));
inst |= (reg1 << RD_LOW) & RD_MASK;
- inst |= (imm << IMM_LOW) & IMM_MASK;
+ inst |= (immed << IMM_LOW) & IMM_MASK;
output = frag_more (isize);
break;
}
if (reg1 == REG_MSR)
- imm = opcode->immval_mask | REG_MSR_MASK;
+ immed = opcode->immval_mask | REG_MSR_MASK;
else if (reg1 == REG_PC)
- imm = opcode->immval_mask | REG_PC_MASK;
+ immed = opcode->immval_mask | REG_PC_MASK;
else if (reg1 == REG_EAR)
- imm = opcode->immval_mask | REG_EAR_MASK;
+ immed = opcode->immval_mask | REG_EAR_MASK;
else if (reg1 == REG_ESR)
- imm = opcode->immval_mask | REG_ESR_MASK;
+ immed = opcode->immval_mask | REG_ESR_MASK;
else if (reg1 == REG_FSR)
- imm = opcode->immval_mask | REG_FSR_MASK;
+ immed = opcode->immval_mask | REG_FSR_MASK;
else if (reg1 == REG_BTR)
- imm = opcode->immval_mask | REG_BTR_MASK;
+ immed = opcode->immval_mask | REG_BTR_MASK;
else if (reg1 == REG_EDR)
- imm = opcode->immval_mask | REG_EDR_MASK;
+ immed = opcode->immval_mask | REG_EDR_MASK;
else if (reg1 == REG_PID)
- imm = opcode->immval_mask | REG_PID_MASK;
+ immed = opcode->immval_mask | REG_PID_MASK;
else if (reg1 == REG_ZPR)
- imm = opcode->immval_mask | REG_ZPR_MASK;
+ immed = opcode->immval_mask | REG_ZPR_MASK;
else if (reg1 == REG_TLBX)
- imm = opcode->immval_mask | REG_TLBX_MASK;
+ immed = opcode->immval_mask | REG_TLBX_MASK;
else if (reg1 == REG_TLBLO)
- imm = opcode->immval_mask | REG_TLBLO_MASK;
+ immed = opcode->immval_mask | REG_TLBLO_MASK;
else if (reg1 == REG_TLBHI)
- imm = opcode->immval_mask | REG_TLBHI_MASK;
+ immed = opcode->immval_mask | REG_TLBHI_MASK;
else if (reg1 == REG_TLBSX)
- imm = opcode->immval_mask | REG_TLBSX_MASK;
+ immed = opcode->immval_mask | REG_TLBSX_MASK;
else
as_fatal (_("invalid value for special purpose register"));
inst |= (reg2 << RA_LOW) & RA_MASK;
- inst |= (imm << IMM_LOW) & IMM_MASK;
+ inst |= (immed << IMM_LOW) & IMM_MASK;
output = frag_more (isize);
break;
exp.X_add_symbol,
exp.X_add_number,
opc);
- imm = 0;
+ immed = 0;
}
else
{
output = frag_more (isize);
- imm = exp.X_add_number;
+ immed = exp.X_add_number;
}
- temp = imm & 0xFFFF8000;
+ temp = immed & 0xFFFF8000;
if ((temp != 0) && (temp != 0xFFFF8000))
{
/* Needs an immediate inst. */
}
inst1 = opcode1->bit_sequence;
- inst1 |= ((imm & 0xFFFF0000) >> 16) & IMM_MASK;
+ inst1 |= ((immed & 0xFFFF0000) >> 16) & IMM_MASK;
output[0] = INST_BYTE0 (inst1);
output[1] = INST_BYTE1 (inst1);
output[2] = INST_BYTE2 (inst1);
}
inst |= (reg1 << RA_LOW) & RA_MASK;
- inst |= (imm << IMM_LOW) & IMM_MASK;
+ inst |= (immed << IMM_LOW) & IMM_MASK;
break;
case INST_TYPE_RD_IMM:
exp.X_add_symbol,
exp.X_add_number,
opc);
- imm = 0;
+ immed = 0;
}
else
{
output = frag_more (isize);
- imm = exp.X_add_number;
+ immed = exp.X_add_number;
}
- temp = imm & 0xFFFF8000;
+ temp = immed & 0xFFFF8000;
if ((temp != 0) && (temp != 0xFFFF8000))
{
/* Needs an immediate inst. */
}
inst1 = opcode1->bit_sequence;
- inst1 |= ((imm & 0xFFFF0000) >> 16) & IMM_MASK;
+ inst1 |= ((immed & 0xFFFF0000) >> 16) & IMM_MASK;
output[0] = INST_BYTE0 (inst1);
output[1] = INST_BYTE1 (inst1);
output[2] = INST_BYTE2 (inst1);
}
inst |= (reg1 << RD_LOW) & RD_MASK;
- inst |= (imm << IMM_LOW) & IMM_MASK;
+ inst |= (immed << IMM_LOW) & IMM_MASK;
break;
case INST_TYPE_R2:
exp.X_add_symbol,
exp.X_add_number,
opc);
- imm = 0;
+ immed = 0;
}
else
{
output = frag_more (isize);
- imm = exp.X_add_number;
+ immed = exp.X_add_number;
}
- temp = imm & 0xFFFF8000;
+ temp = immed & 0xFFFF8000;
if ((temp != 0) && (temp != 0xFFFF8000))
{
/* Needs an immediate inst. */
}
inst1 = opcode1->bit_sequence;
- inst1 |= ((imm & 0xFFFF0000) >> 16) & IMM_MASK;
+ inst1 |= ((immed & 0xFFFF0000) >> 16) & IMM_MASK;
output[0] = INST_BYTE0 (inst1);
output[1] = INST_BYTE1 (inst1);
output[2] = INST_BYTE2 (inst1);
output[3] = INST_BYTE3 (inst1);
output = frag_more (isize);
}
- inst |= (imm << IMM_LOW) & IMM_MASK;
+ inst |= (immed << IMM_LOW) & IMM_MASK;
break;
case INST_TYPE_NONE:
}
/* Drop whitespace after all the operands have been parsed. */
- while (isspace (* op_end))
+ while (ISSPACE (* op_end))
op_end ++;
/* Give warning message if the insn has more operands than required. */
fixP = fix_new (fragP, fragP->fr_fix, INST_WORD_SIZE * 2, fragP->fr_symbol,
fragP->fr_offset, TRUE, BFD_RELOC_MICROBLAZE_64_PLT);
/* fixP->fx_plt = 1; */
+ (void) fixP;
fragP->fr_fix += INST_WORD_SIZE * 2;
fragP->fr_var = 0;
break;
else if (streq (fragP->fr_opcode, str_microblaze_ro_anchor))
{
/* It is accessed using the small data read only anchor. */
- if ((S_GET_SEGMENT (fragP->fr_symbol) == &bfd_com_section)
+ if ((S_GET_SEGMENT (fragP->fr_symbol) == bfd_com_section_ptr)
|| (S_GET_SEGMENT (fragP->fr_symbol) == sdata2_segment)
|| (S_GET_SEGMENT (fragP->fr_symbol) == sbss2_segment)
|| (! S_IS_DEFINED (fragP->fr_symbol)))
}
else if (streq (fragP->fr_opcode, str_microblaze_rw_anchor))
{
- if ((S_GET_SEGMENT (fragP->fr_symbol) == &bfd_com_section)
+ if ((S_GET_SEGMENT (fragP->fr_symbol) == bfd_com_section_ptr)
|| (S_GET_SEGMENT (fragP->fr_symbol) == sdata_segment)
|| (S_GET_SEGMENT (fragP->fr_symbol) == sbss_segment)
|| (!S_IS_DEFINED (fragP->fr_symbol)))