/* tc-ppc.c -- Assemble for the PowerPC or POWER (RS/6000)
- Copyright (C) 1994, 95, 96, 97, 98, 1999 Free Software Foundation, Inc.
+ Copyright (C) 1994, 1995, 1996, 1997, 1998, 1999, 2000
+ Free Software Foundation, Inc.
Written by Ian Lance Taylor, Cygnus Support.
This file is part of GAS, the GNU Assembler.
You should have received a copy of the GNU General Public License
along with GAS; see the file COPYING. If not, write to the Free
Software Foundation, 59 Temple Place - Suite 330, Boston, MA
- 02111-1307, USA. */
+ 02111-1307, USA. */
#include <stdio.h>
#include <ctype.h>
static void ppc_rename PARAMS ((int));
static void ppc_toc PARAMS ((int));
static void ppc_xcoff_cons PARAMS ((int));
+static void ppc_machine PARAMS ((int));
static void ppc_vbyte PARAMS ((int));
#endif
{ "text", ppc_section, 't' },
{ "toc", ppc_toc, 0 },
{ "long", ppc_xcoff_cons, 2 },
+ { "llong", ppc_xcoff_cons, 3 },
{ "word", ppc_xcoff_cons, 1 },
{ "short", ppc_xcoff_cons, 1 },
{ "vbyte", ppc_vbyte, 0 },
+ { "machine", ppc_machine, 0 },
#endif
#ifdef OBJ_ELF
1. r<reg_num> which has the value <reg_num>.
2. r.<reg_num> which has the value <reg_num>.
-
Each floating point register has predefined names of the form:
1. f<reg_num> which has the value <reg_num>.
2. f.<reg_num> which has the value <reg_num>.
+ Each vector unit register has predefined names of the form:
+ 1. v<reg_num> which has the value <reg_num>.
+ 2. v.<reg_num> which has the value <reg_num>.
+
Each condition register has predefined names of the form:
1. cr<reg_num> which has the value <reg_num>.
2. cr.<reg_num> which has the value <reg_num>.
srr0 has the value 26
srr1 has the value 27
- The table is sorted. Suitable for searching by a binary search. */
+ The table is sorted. Suitable for searching by a binary search. */
static const struct pd_reg pre_defined_registers[] =
{
{ "dsisr", 18 }, /* Data Storage Interrupt Status Register */
{ "f.0", 0 }, /* Floating point registers */
- { "f.1", 1 },
- { "f.10", 10 },
- { "f.11", 11 },
- { "f.12", 12 },
- { "f.13", 13 },
- { "f.14", 14 },
- { "f.15", 15 },
- { "f.16", 16 },
- { "f.17", 17 },
- { "f.18", 18 },
- { "f.19", 19 },
- { "f.2", 2 },
- { "f.20", 20 },
- { "f.21", 21 },
- { "f.22", 22 },
- { "f.23", 23 },
- { "f.24", 24 },
- { "f.25", 25 },
- { "f.26", 26 },
- { "f.27", 27 },
- { "f.28", 28 },
- { "f.29", 29 },
- { "f.3", 3 },
+ { "f.1", 1 },
+ { "f.10", 10 },
+ { "f.11", 11 },
+ { "f.12", 12 },
+ { "f.13", 13 },
+ { "f.14", 14 },
+ { "f.15", 15 },
+ { "f.16", 16 },
+ { "f.17", 17 },
+ { "f.18", 18 },
+ { "f.19", 19 },
+ { "f.2", 2 },
+ { "f.20", 20 },
+ { "f.21", 21 },
+ { "f.22", 22 },
+ { "f.23", 23 },
+ { "f.24", 24 },
+ { "f.25", 25 },
+ { "f.26", 26 },
+ { "f.27", 27 },
+ { "f.28", 28 },
+ { "f.29", 29 },
+ { "f.3", 3 },
{ "f.30", 30 },
{ "f.31", 31 },
- { "f.4", 4 },
- { "f.5", 5 },
- { "f.6", 6 },
- { "f.7", 7 },
- { "f.8", 8 },
- { "f.9", 9 },
-
- { "f0", 0 },
- { "f1", 1 },
- { "f10", 10 },
- { "f11", 11 },
- { "f12", 12 },
- { "f13", 13 },
- { "f14", 14 },
- { "f15", 15 },
- { "f16", 16 },
- { "f17", 17 },
- { "f18", 18 },
- { "f19", 19 },
- { "f2", 2 },
- { "f20", 20 },
- { "f21", 21 },
- { "f22", 22 },
- { "f23", 23 },
- { "f24", 24 },
- { "f25", 25 },
- { "f26", 26 },
- { "f27", 27 },
- { "f28", 28 },
- { "f29", 29 },
- { "f3", 3 },
+ { "f.4", 4 },
+ { "f.5", 5 },
+ { "f.6", 6 },
+ { "f.7", 7 },
+ { "f.8", 8 },
+ { "f.9", 9 },
+
+ { "f0", 0 },
+ { "f1", 1 },
+ { "f10", 10 },
+ { "f11", 11 },
+ { "f12", 12 },
+ { "f13", 13 },
+ { "f14", 14 },
+ { "f15", 15 },
+ { "f16", 16 },
+ { "f17", 17 },
+ { "f18", 18 },
+ { "f19", 19 },
+ { "f2", 2 },
+ { "f20", 20 },
+ { "f21", 21 },
+ { "f22", 22 },
+ { "f23", 23 },
+ { "f24", 24 },
+ { "f25", 25 },
+ { "f26", 26 },
+ { "f27", 27 },
+ { "f28", 28 },
+ { "f29", 29 },
+ { "f3", 3 },
{ "f30", 30 },
{ "f31", 31 },
- { "f4", 4 },
- { "f5", 5 },
- { "f6", 6 },
- { "f7", 7 },
- { "f8", 8 },
- { "f9", 9 },
+ { "f4", 4 },
+ { "f5", 5 },
+ { "f6", 6 },
+ { "f7", 7 },
+ { "f8", 8 },
+ { "f9", 9 },
{ "fpscr", 0 },
{ "srr0", 26 }, /* Machine Status Save/Restore Register 0 */
{ "srr1", 27 }, /* Machine Status Save/Restore Register 1 */
+ { "v.0", 0 }, /* Vector registers */
+ { "v.1", 1 },
+ { "v.10", 10 },
+ { "v.11", 11 },
+ { "v.12", 12 },
+ { "v.13", 13 },
+ { "v.14", 14 },
+ { "v.15", 15 },
+ { "v.16", 16 },
+ { "v.17", 17 },
+ { "v.18", 18 },
+ { "v.19", 19 },
+ { "v.2", 2 },
+ { "v.20", 20 },
+ { "v.21", 21 },
+ { "v.22", 22 },
+ { "v.23", 23 },
+ { "v.24", 24 },
+ { "v.25", 25 },
+ { "v.26", 26 },
+ { "v.27", 27 },
+ { "v.28", 28 },
+ { "v.29", 29 },
+ { "v.3", 3 },
+ { "v.30", 30 },
+ { "v.31", 31 },
+ { "v.4", 4 },
+ { "v.5", 5 },
+ { "v.6", 6 },
+ { "v.7", 7 },
+ { "v.8", 8 },
+ { "v.9", 9 },
+
+ { "v0", 0 },
+ { "v1", 1 },
+ { "v10", 10 },
+ { "v11", 11 },
+ { "v12", 12 },
+ { "v13", 13 },
+ { "v14", 14 },
+ { "v15", 15 },
+ { "v16", 16 },
+ { "v17", 17 },
+ { "v18", 18 },
+ { "v19", 19 },
+ { "v2", 2 },
+ { "v20", 20 },
+ { "v21", 21 },
+ { "v22", 22 },
+ { "v23", 23 },
+ { "v24", 24 },
+ { "v25", 25 },
+ { "v26", 26 },
+ { "v27", 27 },
+ { "v28", 28 },
+ { "v29", 29 },
+ { "v3", 3 },
+ { "v30", 30 },
+ { "v31", 31 },
+ { "v4", 4 },
+ { "v5", 5 },
+ { "v6", 6 },
+ { "v7", 7 },
+ { "v8", 8 },
+ { "v9", 9 },
+
{ "xer", 1 },
};
-#define REG_NAME_CNT (sizeof(pre_defined_registers) / sizeof(struct pd_reg))
+#define REG_NAME_CNT (sizeof (pre_defined_registers) / sizeof (struct pd_reg))
/* Given NAME, find the register number associated with that name, return
the integer value associated with the given name or -1 on failure. */
reg_number = reg_name_search (pre_defined_registers, REG_NAME_CNT, name);
/* look to see if it's in the register table */
- if (reg_number >= 0)
+ if (reg_number >= 0)
{
expressionP->X_op = O_register;
expressionP->X_add_number = reg_number;
-
+
/* make the rest nice */
expressionP->X_add_symbol = NULL;
expressionP->X_op_symbol = NULL;
/* The size of the processor we are assembling for. This is either
PPC_OPCODE_32 or PPC_OPCODE_64. */
-static int ppc_size = PPC_OPCODE_32;
+static unsigned long ppc_size = PPC_OPCODE_32;
+
+/* Whether to target xcoff64 */
+static int ppc_xcoff64 = 0;
/* Opcode hash table. */
static struct hash_control *ppc_hash;
static segT rdata_section;
static segT tocdata_section;
-/* The current section and the previous section. See ppc_previous. */
+/* The current section and the previous section. See ppc_previous. */
static segT ppc_previous_section;
static segT ppc_current_section;
struct option md_longopts[] = {
{NULL, no_argument, NULL, 0}
};
-size_t md_longopts_size = sizeof(md_longopts);
+size_t md_longopts_size = sizeof (md_longopts);
int
md_parse_option (c, arg)
break;
#endif
+ /* a64 and a32 determine whether to use XCOFF64 or XCOFF32. */
+ case 'a':
+ if (strcmp (arg, "64") == 0)
+ ppc_xcoff64 = 1;
+ else if (strcmp (arg, "32") == 0)
+ ppc_xcoff64 = 0;
+ else
+ return 0;
+ break;
+
case 'm':
/* -mpwrx and -mpwr2 mean to assemble for the IBM POWER/2
(RIOS2). */
else if (strcmp (arg, "pwr") == 0)
ppc_cpu = PPC_OPCODE_POWER;
/* -m601 means to assemble for the Motorola PowerPC 601, which includes
- instructions that are holdovers from the Power. */
+ instructions that are holdovers from the Power. */
else if (strcmp (arg, "601") == 0)
ppc_cpu = PPC_OPCODE_PPC | PPC_OPCODE_601;
/* -mppc, -mppc32, -m603, and -m604 mean to assemble for the
else if (strcmp (arg, "ppc") == 0
|| strcmp (arg, "ppc32") == 0
|| strcmp (arg, "403") == 0
+ || strcmp (arg, "405") == 0
|| strcmp (arg, "603") == 0
|| strcmp (arg, "604") == 0)
ppc_cpu = PPC_OPCODE_PPC;
+ else if (strcmp (arg, "7400") == 0)
+ ppc_cpu = PPC_OPCODE_PPC | PPC_OPCODE_ALTIVEC;
/* -mppc64 and -m620 mean to assemble for the 64-bit PowerPC
620. */
else if (strcmp (arg, "ppc64") == 0 || strcmp (arg, "620") == 0)
md_show_usage (stream)
FILE *stream;
{
- fprintf(stream, _("\
+ fprintf (stream, _("\
PowerPC options:\n\
-u ignored\n\
-mpwrx, -mpwr2 generate code for IBM POWER/2 (RIOS2)\n\
-mpwr generate code for IBM POWER (RIOS1)\n\
-m601 generate code for Motorola PowerPC 601\n\
--mppc, -mppc32, -m403, -m603, -m604\n\
+-mppc, -mppc32, -m403, -m405, -m603, -m604\n\
generate code for Motorola PowerPC 603/604\n\
-mppc64, -m620 generate code for Motorola PowerPC 620\n\
-mppc64bridge generate code for PowerPC 64, including bridge insns\n\
-mregnames Allow symbolic names for registers\n\
-mno-regnames Do not allow symbolic names for registers\n"));
#ifdef OBJ_ELF
- fprintf(stream, _("\
+ fprintf (stream, _("\
-mrelocatable support for GCC's -mrelocatble option\n\
-mrelocatable-lib support for GCC's -mrelocatble-lib option\n\
-memb set PPC_EMB bit in ELF flags\n\
return bfd_arch_unknown;
}
+unsigned long
+ppc_mach ()
+{
+ return (ppc_size == PPC_OPCODE_64) ? 620 : 0;
+}
+
+int
+ppc_subseg_align()
+{
+ return (ppc_xcoff64) ? 3 : 2;
+}
+
+extern char*
+ppc_target_format()
+{
+#ifdef OBJ_COFF
+#ifdef TE_PE
+ return (target_big_endian ? "pe-powerpc" : "pe-powerpcle");
+#elif TE_POWERMAC
+#else
+ return (ppc_xcoff64 ? "aixcoff64-rs6000" : "aixcoff-rs6000");
+#endif
+#ifdef TE_POWERMAC
+ return "xcoff-powermac";
+#endif
+#endif
+#ifdef OBJ_ELF
+ return (target_big_endian ? "elf32-powerpc" : "elf32-powerpcle");
+#endif
+}
+
/* This function is called when the assembler starts up. It is called
after the options have been parsed and the output file has been
opened. */
ppc_set_cpu ();
#ifdef OBJ_ELF
- /* Set the ELF flags if desired. */
+ /* Set the ELF flags if desired. */
if (ppc_flags && !msolaris)
bfd_set_private_flags (stdoutput, ppc_flags);
#endif
#ifdef TE_PE
ppc_current_section = text_section;
- ppc_previous_section = 0;
+ ppc_previous_section = 0;
#endif
}
valid, but, to permit this code to assemble on a 64
bit host, we sign extend the 32 bit value. */
if (val > 0
- && (val & 0x80000000) != 0
- && (val & 0xffffffff) == val)
+ && (val & (offsetT) 0x80000000) != 0
+ && (val & (offsetT) 0xffffffff) == val)
{
val -= 0x80000000;
val -= 0x80000000;
int len;
struct map_bfd *ptr;
-#define MAP(str,reloc) { str, sizeof(str)-1, reloc }
+#define MAP(str,reloc) { str, sizeof (str)-1, reloc }
static struct map_bfd mapping[] = {
MAP ("l", BFD_RELOC_LO16),
return BFD_RELOC_UNUSED;
}
-/* Like normal .long/.short/.word, except support @got, etc. */
+/* Like normal .long/.short/.word, except support @got, etc. */
/* clobbers input_line_pointer, checks */
-/* end-of-line. */
+/* end-of-line. */
static void
ppc_elf_cons (nbytes)
register int nbytes; /* 1=.byte, 2=.word, 4=.long */
}
while (*input_line_pointer++ == ',');
- input_line_pointer--; /* Put terminator back into stream. */
+ input_line_pointer--; /* Put terminator back into stream. */
demand_empty_rest_of_line ();
}
/* Pseudo op to make file scope bss items */
static void
ppc_elf_lcomm(xxx)
- int xxx;
+ int xxx ATTRIBUTE_UNUSED;
{
register char *name;
register char c;
*
* Anything else is an error of one kind or another.
*
- * out:
+ * out:
* return value: success or failure
* toc_kind: kind of toc reference
* input_line_pointer:
*
*/
-enum toc_size_qualifier
-{
+enum toc_size_qualifier
+{
default_toc, /* The toc cell constructed should be the system default size */
data_in_toc, /* This is a direct reference to a toc cell */
must_be_32, /* The toc cell constructed must be 32 bits wide */
/* skip over the '[' , and whitespace */
++input_line_pointer;
SKIP_WHITESPACE ();
-
+
/* find the spelling of the operand */
toc_spec = input_line_pointer;
c = get_symbol_end ();
- if (strcmp(toc_spec, "toc") == 0)
+ if (strcmp(toc_spec, "toc") == 0)
{
t = default_toc;
}
- else if (strcmp(toc_spec, "tocv") == 0)
+ else if (strcmp(toc_spec, "tocv") == 0)
{
t = data_in_toc;
}
- else if (strcmp(toc_spec, "toc32") == 0)
+ else if (strcmp(toc_spec, "toc32") == 0)
{
t = must_be_32;
}
- else if (strcmp(toc_spec, "toc64") == 0)
+ else if (strcmp(toc_spec, "toc64") == 0)
{
t = must_be_64;
}
/* now find the ']' */
*input_line_pointer = c; /* put back the delimiting char */
- SKIP_WHITESPACE (); /* leading whitespace could be there. */
- c = *input_line_pointer++; /* input_line_pointer->past char in c. */
+ SKIP_WHITESPACE (); /* leading whitespace could be there. */
+ c = *input_line_pointer++; /* input_line_pointer->past char in c. */
if (c != ']')
{
input_line_pointer = str;
#ifdef TE_PE
- if (*input_line_pointer == '[')
+ if (*input_line_pointer == '[')
{
/* We are expecting something like the second argument here:
lwz r4,[toc].GS.0.static_int(rtoc)
^^^^^^^^^^^^^^^^^^^^^^^^^^^
- The argument following the `]' must be a symbol name, and the
+ The argument following the `]' must be a symbol name, and the
register must be the toc register: 'rtoc' or '2'
The effect is to 0 as the displacement field
/* go parse off the [tocXX] part */
valid_toc = parse_toc_entry(&toc_kind);
- if (!valid_toc)
+ if (!valid_toc)
{
/* Note: message has already been issued. */
/* FIXME: what sort of recovery should we do? */
/* FIXME: It's a little confusing what the tocv qualifier can */
/* be used for. At the very least, I've seen three */
/* uses, only one of which I'm sure I can explain. */
- if (ex.X_op == O_symbol)
- {
+ if (ex.X_op == O_symbol)
+ {
assert (ex.X_add_symbol != NULL);
if (symbol_get_bfdsym (ex.X_add_symbol)->section
!= tocdata_section)
as_bad (_("Unimplemented toc64 expression modifier"));
break;
default:
- fprintf(stderr,
+ fprintf (stderr,
_("Unexpected return value [%d] from parse_toc_entry!\n"),
toc_kind);
- abort();
+ abort ();
break;
}
else if (ex.X_op == O_constant)
{
#ifdef OBJ_ELF
- /* Allow @HA, @L, @H on constants. */
+ /* Allow @HA, @L, @H on constants. */
char *orig_str = str;
if ((reloc = ppc_elf_suffix (&str, &ex)) != BFD_RELOC_UNUSED)
break;
case BFD_RELOC_HI16_S:
- ex.X_add_number = (((ex.X_add_number >> 16) & 0xffff)
- + ((ex.X_add_number >> 15) & 1));
+ ex.X_add_number = ((((ex.X_add_number >> 16) & 0xffff)
+ + ((ex.X_add_number >> 15) & 1))
+ & 0xffff);
break;
}
#endif
offset = target_big_endian ? (4 - size) : 0;
if (size < 1 || size > 4)
- abort();
+ abort ();
fixP = fix_new_exp (frag_now, f - frag_now->fr_literal + offset, size,
&fixups[i].exp, reloc_howto->pc_relative,
if (s == (char *) NULL)
break;
*s++ = '\0';
- }
+ }
if (count != macro->operands)
{
/* Assemble the constructed instruction. */
md_assemble (complete);
-}
+}
\f
#ifdef OBJ_ELF
/* For ELF, add support for SHF_EXCLUDE and SHT_ORDERED */
static void
ppc_byte (ignore)
- int ignore;
+ int ignore ATTRIBUTE_UNUSED;
{
if (*input_line_pointer != '\"')
{
lcomm_name = input_line_pointer;
lcomm_endc = get_symbol_end ();
-
+
lcomm_sym = symbol_find_or_make (lcomm_name);
*input_line_pointer = lcomm_endc;
ignore_rest_of_line ();
return;
}
-
+
record_alignment (bss_section, align);
-
+
if (! lcomm
|| ! S_IS_DEFINED (lcomm_sym))
{
subseg_set (bss_section, 1);
frag_align (align, 0, 0);
-
+
symbol_set_frag (def_sym, frag_now);
pfrag = frag_var (rs_org, 1, 1, (relax_substateT) 0, def_sym,
def_size, (char *) NULL);
static void
ppc_csect (ignore)
- int ignore;
+ int ignore ATTRIBUTE_UNUSED;
{
char *name;
char endc;
name = input_line_pointer;
endc = get_symbol_end ();
-
+
sym = symbol_find_or_make (name);
*input_line_pointer = endc;
symbol_set_frag (sym, frag_now);
S_SET_VALUE (sym, (valueT) frag_now_fix ());
- symbol_get_tc (sym)->align = 2;
+ symbol_get_tc (sym)->align = (ppc_xcoff64) ? 3 : 2;
symbol_get_tc (sym)->output = 1;
symbol_get_tc (sym)->within = sym;
-
+
for (list = *list_ptr;
symbol_get_tc (list)->next != (symbolS *) NULL;
list = symbol_get_tc (list)->next)
;
symbol_get_tc (list)->next = sym;
-
+
symbol_remove (sym, &symbol_rootP, &symbol_lastP);
symbol_append (sym, symbol_get_tc (list)->within, &symbol_rootP,
&symbol_lastP);
static void
ppc_named_section (ignore)
- int ignore;
+ int ignore ATTRIBUTE_UNUSED;
{
char *user_name;
const char *real_name;
static void
ppc_extern (ignore)
- int ignore;
+ int ignore ATTRIBUTE_UNUSED;
{
char *name;
char endc;
static void
ppc_lglobl (ignore)
- int ignore;
+ int ignore ATTRIBUTE_UNUSED;
{
char *name;
char endc;
static void
ppc_rename (ignore)
- int ignore;
+ int ignore ATTRIBUTE_UNUSED;
{
char *name;
char endc;
static void
ppc_stabx (ignore)
- int ignore;
+ int ignore ATTRIBUTE_UNUSED;
{
char *name;
int len;
static void
ppc_function (ignore)
- int ignore;
+ int ignore ATTRIBUTE_UNUSED;
{
char *name;
char endc;
static void
ppc_bf (ignore)
- int ignore;
+ int ignore ATTRIBUTE_UNUSED;
{
symbolS *sym;
static void
ppc_ef (ignore)
- int ignore;
+ int ignore ATTRIBUTE_UNUSED;
{
symbolS *sym;
S_SET_STORAGE_CLASS (sym, ei ? C_EINCL : C_BINCL);
symbol_get_tc (sym)->output = 1;
-
+
for (look = last_biei ? last_biei : symbol_rootP;
(look != (symbolS *) NULL
&& (S_GET_STORAGE_CLASS (look) == C_FILE
static void
ppc_bs (ignore)
- int ignore;
+ int ignore ATTRIBUTE_UNUSED;
{
char *name;
char endc;
static void
ppc_es (ignore)
- int ignore;
+ int ignore ATTRIBUTE_UNUSED;
{
symbolS *sym;
static void
ppc_bb (ignore)
- int ignore;
+ int ignore ATTRIBUTE_UNUSED;
{
symbolS *sym;
static void
ppc_eb (ignore)
- int ignore;
+ int ignore ATTRIBUTE_UNUSED;
{
symbolS *sym;
static void
ppc_bc (ignore)
- int ignore;
+ int ignore ATTRIBUTE_UNUSED;
{
char *name;
int len;
static void
ppc_ec (ignore)
- int ignore;
+ int ignore ATTRIBUTE_UNUSED;
{
symbolS *sym;
static void
ppc_toc (ignore)
- int ignore;
+ int ignore ATTRIBUTE_UNUSED;
{
if (ppc_toc_csect != (symbolS *) NULL)
subseg_set (data_section, symbol_get_tc (ppc_toc_csect)->subseg);
subsegT subseg;
symbolS *sym;
symbolS *list;
-
+
subseg = ppc_data_subsegment;
++ppc_data_subsegment;
symbol_get_tc (sym)->within = sym;
ppc_toc_csect = sym;
-
+
for (list = ppc_data_csects;
symbol_get_tc (list)->next != (symbolS *) NULL;
list = symbol_get_tc (list)->next)
cons (1 << log_size);
}
+static void
+ppc_machine(dummy)
+ int dummy ATTRIBUTE_UNUSED;
+{
+ discard_rest_of_line();
+ /* What does aix use this for? */
+}
+
static void
ppc_vbyte (dummy)
- int dummy;
+ int dummy ATTRIBUTE_UNUSED;
{
expressionS exp;
int byte_count;
static void
ppc_tc (ignore)
- int ignore;
+ int ignore ATTRIBUTE_UNUSED;
{
#ifdef OBJ_XCOFF
else
{
++input_line_pointer;
- cons (4);
+ cons ((ppc_size == PPC_OPCODE_64) ? 8 : 4);
}
}
\f
*/
static void
ppc_previous(ignore)
- int ignore;
+ int ignore ATTRIBUTE_UNUSED;
{
symbolS *tmp;
- if (ppc_previous_section == NULL)
+ if (ppc_previous_section == NULL)
{
as_warn(_("No previous section to return to. Directive ignored."));
return;
*/
static void
ppc_pdata(ignore)
- int ignore;
+ int ignore ATTRIBUTE_UNUSED;
{
- if (pdata_section == 0)
+ if (pdata_section == 0)
{
pdata_section = subseg_new (".pdata", 0);
-
+
bfd_set_section_flags (stdoutput, pdata_section,
(SEC_ALLOC | SEC_LOAD | SEC_RELOC
| SEC_READONLY | SEC_DATA ));
-
+
bfd_set_section_alignment (stdoutput, pdata_section, 2);
}
else
*/
static void
ppc_ydata(ignore)
- int ignore;
+ int ignore ATTRIBUTE_UNUSED;
{
- if (ydata_section == 0)
+ if (ydata_section == 0)
{
ydata_section = subseg_new (".ydata", 0);
bfd_set_section_flags (stdoutput, ydata_section,
*/
static void
ppc_reldata(ignore)
- int ignore;
+ int ignore ATTRIBUTE_UNUSED;
{
if (reldata_section == 0)
{
reldata_section = subseg_new (".reldata", 0);
bfd_set_section_flags (stdoutput, reldata_section,
- ( SEC_ALLOC | SEC_LOAD | SEC_RELOC
+ ( SEC_ALLOC | SEC_LOAD | SEC_RELOC
| SEC_DATA ));
bfd_set_section_alignment (stdoutput, reldata_section, 2);
*/
static void
ppc_rdata(ignore)
- int ignore;
+ int ignore ATTRIBUTE_UNUSED;
{
if (rdata_section == 0)
{
}
/* pseudo-op: .ualong
- behaviour: much like .int, with the exception that no alignment is
+ behaviour: much like .int, with the exception that no alignment is
performed.
FIXME: test the alignment statement
errors: None
*/
static void
ppc_ualong(ignore)
- int ignore;
+ int ignore ATTRIBUTE_UNUSED;
{
/* try for long */
cons ( 4 );
*/
static void
ppc_znop(ignore)
- int ignore;
+ int ignore ATTRIBUTE_UNUSED;
{
unsigned long insn;
const struct powerpc_opcode *opcode;
}
-/* pseudo-op:
- behaviour:
- errors:
- warnings:
+/* pseudo-op:
+ behaviour:
+ errors:
+ warnings:
*/
static void
ppc_pe_comm(lcomm)
* additions/changes for the moto-pas assembler support. There are three
* categories:
*
- * FIXME: I just noticed this. This doesn't work at all really. It it
+ * FIXME: I just noticed this. This doesn't work at all really. It it
* setting bits that bfd probably neither understands or uses. The
* correct approach (?) will have to incorporate extra fields attached
* to the section to hold the system specific stuff. (krk)
void
ppc_pe_section (ignore)
- int ignore;
+ int ignore ATTRIBUTE_UNUSED;
{
/* Strip out the section name */
char *section_name;
as_bad (_("Unsupported section attribute -- 'a'"));
break;
case 'c': /* code section */
- flags |= SEC_CODE;
+ flags |= SEC_CODE;
break;
case 'd': /* section has initialized data */
flags |= SEC_DATA;
flags |= SEC_HAS_CONTENTS;
break;
case 'n': /* section can be discarded */
- flags &=~ SEC_LOAD;
+ flags &=~ SEC_LOAD;
break;
case 'R': /* Remove section at link time */
flags |= SEC_NEVER_LOAD;
static void
ppc_pe_function (ignore)
- int ignore;
+ int ignore ATTRIBUTE_UNUSED;
{
char *name;
char endc;
static void
ppc_pe_tocd (ignore)
- int ignore;
+ int ignore ATTRIBUTE_UNUSED;
{
if (tocdata_section == 0)
{
}
a->x_csect.x_smtyp = XTY_LD;
}
-
+
a->x_csect.x_parmhash = 0;
a->x_csect.x_snhash = 0;
if (symbol_get_tc (sym)->class == -1)
#endif /* OBJ_XCOFF */
\f
/* Turn a string in input_line_pointer into a floating point constant
- of type type, and store the appropriate bytes in *litp. The number
- of LITTLENUMS emitted is stored in *sizep . An error message is
+ of type TYPE, and store the appropriate bytes in *LITP. The number
+ of LITTLENUMS emitted is stored in *SIZEP. An error message is
returned, or NULL on OK. */
char *
litp += 2;
}
}
-
+
return NULL;
}
int
md_estimate_size_before_relax (fragp, seg)
- fragS *fragp;
- asection *seg;
+ fragS *fragp ATTRIBUTE_UNUSED;
+ asection *seg ATTRIBUTE_UNUSED;
{
abort ();
return 0;
void
md_convert_frag (abfd, sec, fragp)
- bfd *abfd;
- asection *sec;
- fragS *fragp;
+ bfd *abfd ATTRIBUTE_UNUSED;
+ asection *sec ATTRIBUTE_UNUSED;
+ fragS *fragp ATTRIBUTE_UNUSED;
{
abort ();
}
/*ARGSUSED*/
symbolS *
md_undefined_symbol (name)
- char *name;
+ char *name ATTRIBUTE_UNUSED;
{
return 0;
}
long
md_pcrel_from_section (fixp, sec)
fixS *fixp;
- segT sec;
+ segT sec ATTRIBUTE_UNUSED;
{
return fixp->fx_frag->fr_address + fixp->fx_where;
}
{
while (symbol_get_tc (csect)->next != (symbolS *) NULL
&& (symbol_get_frag (symbol_get_tc (csect)->next)->fr_address
- <= symbol_get_frag (fix->fx_addsy)->fr_address))
+ <= val))
{
/* If the csect address equals the symbol value, then we
have to look through the full symbol table to see
whether this is the csect we want. Note that we will
only get here if the csect has zero length. */
- if ((symbol_get_frag (csect)->fr_address
- == symbol_get_frag (fix->fx_addsy)->fr_address)
+ if ((symbol_get_frag (csect)->fr_address == val)
&& S_GET_VALUE (csect) == S_GET_VALUE (fix->fx_addsy))
{
symbolS *scan;
else if ((operand->flags & PPC_OPERAND_PARENS) != 0
&& operand->bits == 16
&& operand->shift == 0
- && operand->insert == NULL
&& fixp->fx_addsy != NULL
&& ppc_is_toc_sym (fixp->fx_addsy))
{
value, 4);
break;
+ case BFD_RELOC_64:
+ if (fixp->fx_pcrel)
+ fixp->fx_r_type = BFD_RELOC_64_PCREL;
+ /* fall through */
+ case BFD_RELOC_64_PCREL:
+ md_number_to_chars (fixp->fx_frag->fr_literal + fixp->fx_where,
+ value, 8);
+ break;
case BFD_RELOC_LO16:
case BFD_RELOC_16:
case BFD_RELOC_GPREL16:
{
char *where;
unsigned long insn;
-
+
/* Fetch the instruction, insert the fully resolved operand
value, and stuff the instruction back again. */
where = fixp->fx_frag->fr_literal + fixp->fx_where;
break;
default:
- fprintf(stderr,
+ fprintf (stderr,
_("Gas failure, reloc value %d\n"), fixp->fx_r_type);
fflush(stderr);
abort ();
arelent *
tc_gen_reloc (seg, fixp)
- asection *seg;
+ asection *seg ATTRIBUTE_UNUSED;
fixS *fixp;
{
arelent *reloc;
projects / deliverable / binutils-gdb.git / blobdiff